-/* Used in the run time stats calculations. */\r
-static uint32_t ulClocksPer10thOfAMilliSecond = 0UL;\r
+/* Addresses of registers in the Cortex-M debug hardware. */\r
+#define rtsDWT_CYCCNT ( *( ( volatile unsigned long * ) 0xE0001004 ) )\r
+#define rtsDWT_CONTROL ( *( ( volatile unsigned long * ) 0xE0001000 ) )\r
+#define rtsSCB_DEMCR ( *( ( volatile unsigned long * ) 0xE000EDFC ) )\r
+#define rtsTRCENA_BIT ( 0x01000000UL )\r
+#define rtsCOUNTER_ENABLE_BIT ( 0x01UL )\r
+\r
+/* Simple shift divide for scaling to avoid an overflow occurring too soon. The\r
+number of bits to shift depends on the clock speed. */\r
+#define runtimeSLOWER_CLOCK_SPEEDS ( 70000000UL )\r
+#define runtimeSHIFT_13 13\r
+#define runtimeOVERFLOW_BIT_13 ( 1UL << ( 32UL - runtimeSHIFT_13 ) )\r
+#define runtimeSHIFT_14 14\r
+#define runtimeOVERFLOW_BIT_14 ( 1UL << ( 32UL - runtimeSHIFT_14 ) )\r