Fix a few typos and remove the "register" keyword.

[freertos] / FreeRTOS / Source / portable / IAR / ARM_CM4F / port.c

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
index e5a3658554183bbd85a65c433b0d70b194618317..3cdd25b3048a49e5467c754993101fb2f27de034 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
@@ -1,48 +1,37 @@
 /*\r
 /*\r

-    FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r

 \r
 \r

-    FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
-    http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r

 \r
     ***************************************************************************\r
      *                                                                       *\r
 \r
     ***************************************************************************\r
      *                                                                       *\r

-     *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
-     *    Complete, revised, and edited pdf reference manuals are also       *\r
-     *    available.                                                         *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that has become a de facto standard.             *\r

      *                                                                       *\r
      *                                                                       *\r

-     *    Purchasing FreeRTOS documentation will not only help you, by       *\r
-     *    ensuring you get running as quickly as possible and with an        *\r
-     *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
-     *    the FreeRTOS project to continue with its mission of providing     *\r
-     *    professional grade, cross platform, de facto standard solutions    *\r
-     *    for microcontrollers - completely free of charge!                  *\r
+     *    Help yourself get started quickly and support the FreeRTOS         *\r
+     *    project by purchasing a FreeRTOS tutorial book, reference          *\r
+     *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r

      *                                                                       *\r
      *                                                                       *\r

-     *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
-     *                                                                       *\r
-     *    Thank you for using FreeRTOS, and thank you for your support!      *\r
+     *    Thank you!                                                         *\r

      *                                                                       *\r
     ***************************************************************************\r
 \r
      *                                                                       *\r
     ***************************************************************************\r
 \r

-\r

     This file is part of the FreeRTOS distribution.\r
 \r
     FreeRTOS is free software; you can redistribute it and/or modify it under\r
     the terms of the GNU General Public License (version 2) as published by the\r
     This file is part of the FreeRTOS distribution.\r
 \r
     FreeRTOS is free software; you can redistribute it and/or modify it under\r
     the terms of the GNU General Public License (version 2) as published by the\r

-    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r

 \r
 \r

-    >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
-    distribute a combined work that includes FreeRTOS without being obliged to\r
-    provide the source code for proprietary components outside of the FreeRTOS\r
-    kernel.\r
+    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+    >>! a combined work that includes FreeRTOS without being obliged to provide\r
+    >>! the source code for proprietary components outside of the FreeRTOS\r
+    >>! kernel.\r

 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r

-    FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
-    details. You should have received a copy of the GNU General Public License\r
-    and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
-    viewed here: http://www.freertos.org/a00114.html and also obtained by\r
-    writing to Real Time Engineers Ltd., contact details for whom are available\r
-    on the FreeRTOS WEB site.\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
+    link: http://www.freertos.org/a00114.html\r

 \r
     1 tab == 4 spaces!\r
 \r
 \r
     1 tab == 4 spaces!\r
 \r


@@ -55,21 +44,22 @@
      *                                                                       *\r
     ***************************************************************************\r
 \r
      *                                                                       *\r
     ***************************************************************************\r
 \r

-\r

     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
     license and Real Time Engineers Ltd. contact details.\r
 \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
     license and Real Time Engineers Ltd. contact details.\r
 \r
     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r

-    including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
-    fully thread aware and reentrant UDP/IP stack.\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r

 \r
     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
 \r
     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r

-    Integrity Systems, who sell the code with commercial support,\r
-    indemnification and middleware, under the OpenRTOS brand.\r
+    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and middleware.\r

 \r
     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
     engineered and independently SIL3 certified version for use in safety and\r
     mission critical applications that require provable dependability.\r
 \r
     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
     engineered and independently SIL3 certified version for use in safety and\r
     mission critical applications that require provable dependability.\r

+\r
+    1 tab == 4 spaces!\r

 */\r
 \r
 /*-----------------------------------------------------------\r
 */\r
 \r
 /*-----------------------------------------------------------\r


@@ -111,11 +101,15 @@
 #define portNVIC_PENDSV_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 #define portNVIC_SYSTICK_PRI                           ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 \r
 #define portNVIC_PENDSV_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
 #define portNVIC_SYSTICK_PRI                           ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
 \r

-/* Constants required to check the validity of an interrupt prority. */\r
+/* Constants required to check the validity of an interrupt priority. */\r

 #define portFIRST_USER_INTERRUPT_NUMBER                ( 16 )\r
 #define portNVIC_IP_REGISTERS_OFFSET_16        ( 0xE000E3F0 )\r
 #define portAIRCR_REG                                          ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )\r
 #define portFIRST_USER_INTERRUPT_NUMBER                ( 16 )\r
 #define portNVIC_IP_REGISTERS_OFFSET_16        ( 0xE000E3F0 )\r
 #define portAIRCR_REG                                          ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )\r

+#define portMAX_8_BIT_VALUE                                    ( ( unsigned char ) 0xff )\r
+#define portTOP_BIT_OF_BYTE                                    ( ( unsigned char ) 0x80 )\r
+#define portMAX_PRIGROUP_BITS                          ( ( unsigned char ) 7 )\r

 #define portPRIORITY_GROUP_MASK                                ( 0x07UL << 8UL )\r
 #define portPRIORITY_GROUP_MASK                                ( 0x07UL << 8UL )\r

+#define portPRIGROUP_SHIFT                                     ( 8UL )\r

 \r
 /* Constants required to manipulate the VFP. */\r
 #define portFPCCR                                                      ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
 \r
 /* Constants required to manipulate the VFP. */\r
 #define portFPCCR                                                      ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r


@@ -186,12 +180,13 @@ extern void vPortEnableVFP( void );
 #endif /* configUSE_TICKLESS_IDLE */\r
 \r
 /*\r
 #endif /* configUSE_TICKLESS_IDLE */\r
 \r
 /*\r

- * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure \r
+ * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure\r

  * FreeRTOS API functions are not called from interrupts that have been assigned\r
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
  */\r
 #if ( configASSERT_DEFINED == 1 )\r
         static unsigned char ucMaxSysCallPriority = 0;\r
  * FreeRTOS API functions are not called from interrupts that have been assigned\r
  * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
  */\r
 #if ( configASSERT_DEFINED == 1 )\r
         static unsigned char ucMaxSysCallPriority = 0;\r

+        static unsigned long ulMaxPRIGROUPValue = 0;\r

         static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
 #endif /* configASSERT_DEFINED */\r
 \r
         static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;\r
 #endif /* configASSERT_DEFINED */\r
 \r


@@ -239,6 +234,7 @@ portBASE_TYPE xPortStartScheduler( void )
        {\r
                volatile unsigned long ulOriginalPriority;\r
                volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r
        {\r
                volatile unsigned long ulOriginalPriority;\r
                volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );\r

+               volatile unsigned char ucMaxPriorityValue;\r

 \r
                /* Determine the maximum priority from which ISR safe FreeRTOS API\r
                functions can be called.  ISR safe functions are those that end in\r
 \r
                /* Determine the maximum priority from which ISR safe FreeRTOS API\r
                functions can be called.  ISR safe functions are those that end in\r


@@ -248,13 +244,29 @@ portBASE_TYPE xPortStartScheduler( void )
                Save the interrupt priority value that is about to be clobbered. */\r
                ulOriginalPriority = *pcFirstUserPriorityRegister;\r
 \r
                Save the interrupt priority value that is about to be clobbered. */\r
                ulOriginalPriority = *pcFirstUserPriorityRegister;\r
 \r

-               /* Write the configMAX_SYSCALL_INTERRUPT_PRIORITY value to an interrupt\r
-               priority register. */\r
-               *pcFirstUserPriorityRegister = configMAX_SYSCALL_INTERRUPT_PRIORITY;\r
+               /* Determine the number of priority bits available.  First write to all\r
+               possible bits. */\r
+               *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;\r
+\r
+               /* Read the value back to see how many bits stuck. */\r
+               ucMaxPriorityValue = *pcFirstUserPriorityRegister;\r
+\r
+               /* Use the same mask on the maximum system call priority. */\r
+               ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;\r
+\r
+               /* Calculate the maximum acceptable priority group value for the number\r
+               of bits read back. */\r
+               ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;\r
+               while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )\r
+               {\r
+                       ulMaxPRIGROUPValue--;\r
+                       ucMaxPriorityValue <<= ( unsigned char ) 0x01;\r
+               }\r

 \r
 \r

-               /* Read back the written priority to obtain its value as seen by the\r
-               hardware, which will only implement a subset of the priority bits. */\r
-               ucMaxSysCallPriority = *pcFirstUserPriorityRegister;\r
+               /* Shift the priority group value back to its position within the AIRCR\r
+               register. */\r
+               ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;\r
+               ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;\r

 \r
                /* Restore the clobbered interrupt priority register to its original\r
                value. */\r
 \r
                /* Restore the clobbered interrupt priority register to its original\r
                value. */\r


@@ -459,15 +471,17 @@ void xPortSysTickHandler( void )
 \r
                        /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG\r
                        again, then set portNVIC_SYSTICK_LOAD_REG back to its standard\r
 \r
                        /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG\r
                        again, then set portNVIC_SYSTICK_LOAD_REG back to its standard\r

-                       value. */\r
+                       value.  The critical section is used to ensure the tick interrupt\r
+                       can only execute once in the case that the reload register is near\r
+                       zero. */\r

                        portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r
                        portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;\r

-                       portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
-\r
-                       vTaskStepTick( ulCompleteTickPeriods );\r
-\r
-                       /* The counter must start by the time the reload value is reset. */\r
-                       configASSERT( portNVIC_SYSTICK_CURRENT_VALUE_REG );\r
-                       portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;\r
+                       portENTER_CRITICAL();\r
+                       {\r
+                               portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;\r
+                               vTaskStepTick( ulCompleteTickPeriods );\r
+                               portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;\r
+                       }\r
+                       portEXIT_CRITICAL();\r

                }\r
        }\r
 \r
                }\r
        }\r
 \r


@@ -511,43 +525,46 @@ __weak void vPortSetupTimerInterrupt( void )
                        /* Look up the interrupt's priority. */\r
                        ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];\r
 \r
                        /* Look up the interrupt's priority. */\r
                        ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];\r
 \r

-                       /* The following assertion will fail if a service routine (ISR) for \r
+                       /* The following assertion will fail if a service routine (ISR) for\r

                        an interrupt that has been assigned a priority above\r
                        configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API\r
                        an interrupt that has been assigned a priority above\r
                        configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API\r

-                       function.  ISR safe FreeRTOS API functions must *only* be called \r
+                       function.  ISR safe FreeRTOS API functions must *only* be called\r

                        from interrupts that have been assigned a priority at or below\r
                        configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
                        from interrupts that have been assigned a priority at or below\r
                        configMAX_SYSCALL_INTERRUPT_PRIORITY.\r

-                       \r
+\r

                        Numerically low interrupt priority numbers represent logically high\r
                        Numerically low interrupt priority numbers represent logically high\r

-                       interrupt priorities, therefore the priority of the interrupt must \r
-                       be set to a value equal to or numerically *higher* than \r
+                       interrupt priorities, therefore the priority of the interrupt must\r
+                       be set to a value equal to or numerically *higher* than\r

                        configMAX_SYSCALL_INTERRUPT_PRIORITY.\r
                        configMAX_SYSCALL_INTERRUPT_PRIORITY.\r

-                       \r
+\r

                        Interrupts that use the FreeRTOS API must not be left at their\r
                        default priority of     zero as that is the highest possible priority,\r
                        Interrupts that use the FreeRTOS API must not be left at their\r
                        default priority of     zero as that is the highest possible priority,\r

-                       which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY, \r
-                       and     therefore also guaranteed to be invalid.  \r
-                       \r
-                       FreeRTOS maintains separate thread and ISR API functions to ensure \r
+                       which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,\r
+                       and     therefore also guaranteed to be invalid.\r
+\r
+                       FreeRTOS maintains separate thread and ISR API functions to ensure\r

                        interrupt entry is as fast and simple as possible.\r
                        interrupt entry is as fast and simple as possible.\r

-                       \r
+\r

                        The following links provide detailed information:\r
                        http://www.freertos.org/RTOS-Cortex-M3-M4.html\r
                        http://www.freertos.org/FAQHelp.html */\r
                        configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );\r
                }\r
 \r
                        The following links provide detailed information:\r
                        http://www.freertos.org/RTOS-Cortex-M3-M4.html\r
                        http://www.freertos.org/FAQHelp.html */\r
                        configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );\r
                }\r
 \r

-               /* Priority grouping:  The interrupt controller (NVIC) allows the bits \r
-               that define each interrupt's priority to be split between bits that \r
+               /* Priority grouping:  The interrupt controller (NVIC) allows the bits\r
+               that define each interrupt's priority to be split between bits that\r

                define the interrupt's pre-emption priority bits and bits that define\r
                define the interrupt's pre-emption priority bits and bits that define\r

-               the interrupt's sub-priority.  For simplicity all bits must be defined \r
+               the interrupt's sub-priority.  For simplicity all bits must be defined\r

                to be pre-emption priority bits.  The following assertion will fail if\r
                to be pre-emption priority bits.  The following assertion will fail if\r

-               this is not the case (if some bits represent a sub-priority).  \r
-               \r
-               If CMSIS libraries are being used then the correct setting can be \r
-               achieved by calling     NVIC_SetPriorityGrouping( 0 ); before starting the \r
-               scheduler. */\r
-               configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) == 0 );\r
+               this is not the case (if some bits represent a sub-priority).\r
+\r
+               If the application only uses CMSIS libraries for interrupt\r
+               configuration then the correct setting can be achieved on all Cortex-M\r
+               devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the\r
+               scheduler.  Note however that some vendor specific peripheral libraries\r
+               assume a non-zero priority group setting, in which cases using a value\r
+               of zero will result in unpredicable behaviour. */\r
+               configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );\r

        }\r
 \r
 #endif /* configASSERT_DEFINED */\r
        }\r
 \r
 #endif /* configASSERT_DEFINED */\r