- case portINTERRUPT_YIELD:\r
-\r
- vPortTrace( "prvProcessPseudoInterrupts: Processing Yield\r\n" );\r
- lSwitchRequired = pdTRUE;\r
-\r
- /* Clear the interrupt pending bit. */\r
- ulPendingInterrupts &= ~( 1UL << portINTERRUPT_YIELD );\r
- break;\r
-\r
- case portINTERRUPT_TICK:\r
- \r
- /* Tick interrupts should only be processed if the \r
- critical nesting count is zero. The critical nesting \r
- count represents the interrupt mask on real target \r
- hardware. The thread that genereates ticks will not\r
- actually ask for the tick to be processed unless the\r
- critical nesting count is zero anyway, but it is \r
- possible that a tick is pending when a yield is \r
- performed (depending on if the simulation/emulation is\r
- set up to process yields while within a critical \r
- section. */\r
- vPortTrace( "prvProcessPseudoInterrupts: Processing tick event\r\n" );\r
- /* Process the tick itself. */\r
- vPortTrace( "prvProcessPseudoInterrupts: Incrementing tick\r\n" );\r
- vTaskIncrementTick();\r
- #if( configUSE_PREEMPTION != 0 )\r
- {\r
- /* A context switch is only automatically \r
- performed from the tick interrupt if the \r
- pre-emptive scheduler is being used. */\r
- lSwitchRequired = pdTRUE;\r
- }\r
- #endif\r
- \r
- /* Clear the interrupt pending bit. */\r
- ulPendingInterrupts &= ~( 1UL << portINTERRUPT_TICK );\r
-\r
- vPortTrace( "prvProcessPseudoInterrupts: Acking tick\r\n" );\r
- SetEvent( pvTickAcknowledgeEvent );\r
- break;\r
-\r
- default:\r
-\r
- /* Is a handler installed? */\r
- if( vIsrHandler[ i ] != NULL )\r
- {\r
- lSwitchRequired = pdTRUE;\r
-\r
- /* Run the actual handler. */\r
- vIsrHandler[ i ]();\r
-\r
- /* Clear the interrupt pending bit. */\r
- ulPendingInterrupts &= ~( 1UL << i );\r
-\r
- /* TODO: Need to have some sort of handshake \r
- event here for non-tick and none yield \r
- interrupts. */\r
- }\r
- break;\r