-@verbatim
-==================================================================
- The List
-------------------------------------------------------------------
-@endverbatim
-
-- JTAG/TAP changes:
- - update all drivers to use tap_get_tms_path_len API.
- - use tap_set_state everywhere to allow logging TAP state transitions
- - rename other tap_states to use standard JTAG names (suggested by ML)
- - retire jtag_add_end_state() and replace w/global variable. This also
- removes TAP_INVALID as an argument to jtag_add_xxxx(). The global variable
- as argument to jtag_add_xxxx() should eventually be phased out, but
- the global variable is useful in an interim phase where one needs to
- be bug by bug compatible before each change can be tested. Suggested
- by ØH. Michael Bruck also interested in this.
-
-- JTAG Interfaces:
- - autodetect devices present on the scan chain
- - implement 'discover_taps' command
- - FT2232 driver: (DH)
- - integrate FTD2XX High-Speed Device support
- - PATCH: https://lists.berlios.de/pipermail/openocd-development/2009-April/005479.html
- - massive set of changes (DH):
- - fixes non-recoverability of cable connect/reconnect
- - https://lists.berlios.de/pipermail/openocd-development/2009-May/006011.html
- - further cleanup (DH):
- - PATCH: https://lists.berlios.de/pipermail/openocd-development/2009-May/006112.html
- - fix outstanding bugs
- - J-Link driver: (ZW)
- - fix outstanding bugs
- - test with known targets (i.e. working with other interfaces)
- - test compatibility between v6.0 (yellow) and older units (e.g. v5.2)
- - TCP driver:
- - add TCP/IP client and server for remote JTAG interface control
- - Do others need some help? Probably....
-
-- Other Interfaces
- - SVF/XSVF:
- - pending tasks??
- - SPI/UART emulation:
- - (ab)use bit-banging JTAG interfaces to emulate SPI/UART
- - allow SPI to program flash, MCUs, etc.
- - SWD
-
-- Target Support:
- - general layer cleanup:
- - https://lists.berlios.de/pipermail/openocd-development/2009-May/006590.html
- - ARM11 improvements (MB?)
- - fix single stepping (reported by ØH)
- - implement missing functionality (grep FNC_INFO_NOTIMPLEMENTED ...)
- - Cortex A8 support (ML)
- - add target implementation (ML)
- - what else remains to be done?
- - MC1322x support (JW/DE?)
- - integrate and test support from JW (and DE?)
- - get working with a known good interface (i.e. not today's jlink)
- - AT91SAM92xx:
- - improvements for unknown-board-atmel-at91sam9260.cfg (RD)
- - STR9x: (ZW)
- - improvements to str912.cfg to be more general purpose
- - AVR: (SQ)
- - independently verify implementation
- - incrementally improve working prototype in trunk. (SQ)
- - work out how to debug this target
- - AVR debugging protocol.
- - FPGA:
- - improve things (??)
- - Coldfire (suggested by NC)
- - can we draw from the BDM project? @par
- http://bdm.sourceforge.net/
-
- - other targets? (suggestions always welcome)
-
-- CFI:
- - finish implementing bus width/chip width handling (suggested by NC)
- - factor vendor-specific code into separate source files
+@section thelisttcl TCL
+
+This section provides possible things to improve with OpenOCD's TCL support.
+
+- Fix problem with incorrect line numbers reported for a syntax
+ error in a reset init event.
+
+- organize the TCL configurations:
+ - provide more directory structure for boards/targets?
+ - factor configurations into layers (encapsulation and re-use)
+
+- Fix handling of variables between multiple command line "-c" and "-f"
+ parameters. Currently variables assigned through one such parameter
+ command/script are unset before the next one is invoked.
+
+- Isolate all TCL command support:
+ - Pure C CLI implementations using --disable-builtin-tcl.
+ - Allow developers to build new dongles using OpenOCD's JTAG core.
+ - At first, provide only low-level JTAG support; target layer and
+ above rely heavily on scripting event mechanisms.
+ - Allow full TCL support? add --with-tcl=/path/to/installed/tcl
+ - Move TCL support out of foo.[ch] and into foo_tcl.[ch] (other ideas?)
+ - See src/jtag/core.c and src/jtag/tcl.c for an example.
+ - allow some of these TCL command modules to be dynamically loadable?
+
+@section thelistjtag JTAG
+
+This section list issues that need to be resolved in the JTAG layer.
+
+@subsection thelistjtagcore JTAG Core
+
+The following tasks have been suggested for cleaning up the JTAG layer:
+
+- use tap_set_state everywhere to allow logging TAP state transitions
+- Encapsulate cmd_queue_cur_state and related variable handling.
+- add slick 32 bit versions of jtag_add_xxx_scan() that avoids
+buf_set_u32() calls and other evidence of poor impedance match between
+API and calling code. New API should cut down # of lines in calling
+code by 100's and make things clearer. Also potentially be supported
+directly in minidriver API for better embedded host performance.
+
+The following tasks have been suggested for adding new core JTAG support:
+
+- Improve autodetection of TAPs by supporting tcl escape procedures that
+ can configure discovered TAPs based on IDCODE value ... they could:
+ - Remove guessing for irlen
+ - Allow non-default irmask/ircapture values
+- SPI/UART emulation:
+ - (ab)use bit-banging JTAG interfaces to emulate SPI/UART
+ - allow SPI to program flash, MCUs, etc.
+
+@subsection thelistjtaginterfaces JTAG Interfaces
+
+There are some known bugs to fix in JTAG adapter drivers:
+
+- For JTAG_STATEMOVE to TAP_RESET, all drivers must ignore the current
+ recorded state. The tap_get_state() call won't necessarily return
+ the correct value, especially at server startup. Fix is easy: in
+ that case, always issue five clocks with TMS high.
+ - amt_jtagaccel.c
+ - arm-jtag-ew.c
+ - bitbang.c
+ - bitq.c
+ - gw16012.c
+ - jlink.c
+ - usbprog.c
+ - vsllink.c
+ - rlink/rlink.c
+- bug: USBprog is broken with new tms sequence; it needs 7-clock cycles.
+ Fix promised from Peter Denison openwrt at marshadder.org
+ Workaround: use "tms_sequence long" @par
+ https://lists.berlios.de/pipermail/openocd-development/2009-July/009426.html
+
+The following tasks have been suggested for improving OpenOCD's JTAG
+interface support:
+
+- rework USB communication to be more robust. Two possible options are:
+ -# use libusb-1.0.1 with libusb-compat-0.1.1 (non-blocking I/O wrapper)
+ -# rewrite implementation to use non-blocking I/O
+- J-Link driver:
+ - fix to work with long scan chains, such as R.Doss's svf test.
+- Autodetect USB based adapters; this should be easy on Linux. If there's
+ more than one, list the options; otherwise, just select that one.
+
+The following tasks have been suggested for adding new JTAG interfaces:
+
+- TCP driver: allow client/server for remote JTAG interface control.
+This requires a client and a server. The server is built into the
+normal OpenOCD and takes commands from the client and executes
+them on the interface returning the result of TCP/IP. The client
+is an OpenOCD which is built with a TCP/IP minidriver. The use
+of a minidriver is required to capture all the jtag_add_xxx()
+fn's at a high enough level and repackage these cmd's as
+TCP/IP packets handled by the server.
+
+@section thelistswd Serial Wire Debug
+
+- implement Serial Wire Debug interface
+
+@section thelistbs Boundary Scan Support
+
+- add STAPL support?
+- add BSDL support?
+
+A few possible options for the above:
+ -# Fake a TCL equivalent?
+ -# Integrate an existing library?
+ -# Write a new C implementation a la Jim?
+
+Once the above are completed:
+- add support for programming flash using boundary scan techniques
+- add integration with a modified gerber view program:
+ - provide means to view the PCB and select pins and traces
+ - allow use-cases such as the following:
+ - @b Stimulus
+ -# Double-click on a pin (or trace) with the mouse.
+ - @b Effects
+ -# The trace starts blinking, and
+ -# OpenOCD toggles the pin(s) 0/1.
+
+@section thelisttargets Target Support
+
+- Many common ARM cores could be autodetected using IDCODE
+- general layer cleanup: @par
+ https://lists.berlios.de/pipermail/openocd-development/2009-May/006590.html
+- regression: "reset halt" between 729(works) and 788(fails): @par
+https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
+- registers
+ - add flush-value operation, call them all on resume/reset
+- mcr/mrc target->type support
+ - missing from ARM920t, ARM966e, XScale.
+ It's possible that the current syntax is unable to support read-modify-write
+ operations(see arm966e).
+ - mcr/mrc - retire cp15 commands when there the mrc/mrc commands have been
+ tested from: arm926ejs, arm720t, cortex_a8
+- ARM7/9:
+ - clean up "arm9tdmi vector_catch". Available for some arm7 cores? @par
+https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html
+https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
+ - add reset option to allow programming embedded ice while srst is asserted.
+ Some CPUs will gate the JTAG clock when srst is asserted and in this case,
+ it is necessary to program embedded ice and then assert srst afterwards.
+- ARM926EJS:
+ - reset run/halt/step is not robust; needs testing to map out problems.
+- ARM11 improvements (MB?)
+ - add support for asserting srst to reset the core.
+ - Single stepping works, but should automatically
+ use hardware stepping if available.
+ - mdb can return garbage data if read byte operation fails for
+ a memory region(16 & 32 byte access modes may be supported). Is this
+ a bug in the .MX31 PDK init script? Try on i.MX31 PDK:
+ mdw 0xb80005f0 0x8, mdh 0xb80005f0 0x10, mdb 0xb80005f0 0x20. mdb returns
+ garabage.
+ - implement missing functionality (grep FNC_INFO_NOTIMPLEMENTED ...)
+- Thumb2 single stepping: ARM1156T2 needs simulator support
+- Cortex-A8 support (ML)
+ - add target implementation (ML)
+- Cortex-M3 support
+ - when stepping, only write dirtied registers (be faster)
+ - when connecting to halted core, fetch registers (startup is quirky)
+- Generic ARM run_algorithm() interface
+ - tagged struct wrapping ARM instructions and metadata
+ - not revision-specific (current: ARMv4+ARMv5 -or- ARMv6 -or- ARMv7)
+ - usable with at least arm_nandwrite() and generic CFI drivers
+- ETM
+ - don't show FIFOFULL registers if they're not supported
+ - use comparators to get more breakpoints and watchpoints
+ - add "etm drivers" command
+ - trace driver init() via examine() paths only, not setup()/reset
+- MC1322x support (JW/DE?)
+ - integrate and test support from JW (and DE?)
+ - get working with a known good interface (i.e. not today's jlink)
+- AT91SAM92xx:
+ - improvements for unknown-board-atmel-at91sam9260.cfg (RD)
+- STR9x: (ZW)
+ - improvements to str912.cfg to be more general purpose
+- AVR: (SQ)
+ - independently verify implementation
+ - incrementally improve working prototype in trunk. (SQ)
+ - work out how to debug this target
+ - AVR debugging protocol.
+- FPGA:
+ - Altera Nios Soft-CPU support
+- Coldfire (suggested by NC)
+ - can we draw from the BDM project? @par
+ http://bdm.sourceforge.net/
+
+ or the OSBDM package @par
+ http://forums.freescale.com/freescale/board/message?board.id=OSBDM08&thread.id=422
+
+@section thelistsvf SVF/XSVF
+
+- develop SVF unit tests
+- develop XSVF unit tests
+
+@section thelistflash Flash Support
+
+- finish documentation for the following flash drivers:
+ - avr
+ - pic32mx
+ - ocl
+ - str9xpec
+
+- Don't expect writing all-ones to be a safe way to write without
+ changing bit values. Minimally it loses on flash modules with
+ internal ECC, where it may change the ECC.
+ - NOR flash_write_unlock() does that between sectors
+ - there may be other cases too
+
+- Make sure all commands accept either a bank name or a bank number,
+ and be sure both identifiers show up in "flash banks" and "nand list".
+ Right now the user-friendly names are pretty much hidden...
+
+@subsection thelistflashcfi CFI
+
+- finish implementing bus width/chip width handling (suggested by NC)
+- factor vendor-specific code into separate source files