/*\r
- FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify\r
- it under the terms of the GNU General Public License as published by\r
- the Free Software Foundation; either version 2 of the License, or\r
- (at your option) any later version.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful,\r
- but WITHOUT ANY WARRANTY; without even the implied warranty of\r
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
- GNU General Public License for more details.\r
-\r
- You should have received a copy of the GNU General Public License\r
- along with FreeRTOS; if not, write to the Free Software\r
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
-\r
- A special exception to the GPL can be applied should you wish to distribute\r
- a combined work that includes FreeRTOS, without being obliged to provide\r
- the source code for any proprietary components. See the licensing section\r
- of http://www.FreeRTOS.org for full details of how and when the exception\r
- can be applied.\r
-\r
- ***************************************************************************\r
- See http://www.FreeRTOS.org for documentation, latest information, license\r
- and contact details. Please ensure to read the configuration and relevant\r
- port sections of the online documentation.\r
-\r
- Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
- with commercial development and support options.\r
- ***************************************************************************\r
+ FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ Alternative commercial license and support terms are also available upon\r
+ request. See the licensing section of http://www.FreeRTOS.org for full\r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * The FreeRTOS eBook and reference manual are available to purchase for a *\r
+ * small fee. Help yourself get started quickly while also helping the *\r
+ * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
*/\r
\r
/*\r
\r
/* Flag to indicate whether or not a task is blocked waiting for space on\r
the FIFO. */\r
-static portLONG lTaskWaiting = pdFALSE;\r
+static long lTaskWaiting = pdFALSE;\r
\r
/*\r
* See the serial2.h header file.\r
*/\r
-xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
+xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
{\r
xComPortHandle xReturn;\r
UART_InitTypeDef xUART1_Init;\r
GPIO_InitTypeDef GPIO_InitStructure;\r
\r
/* Create the queues used to hold Rx characters. */\r
- xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
+ xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
\r
/* Create the semaphore used to wake a task waiting for space to become\r
available in the FIFO. */\r
/* Enable the GPIO3 Clock */\r
SCU_APBPeriphClockConfig( __GPIO3, ENABLE );\r
\r
- /* Configure UART1_Rx pin GPIO3.2 */ \r
- GPIO_InitStructure.GPIO_Direction = GPIO_PinInput; \r
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; \r
- GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ; \r
- GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable; \r
- GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ; \r
- GPIO_Init( GPIO3, &GPIO_InitStructure ); \r
+ /* Configure UART1_Rx pin GPIO3.2 */\r
+ GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;\r
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;\r
+ GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;\r
+ GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;\r
+ GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;\r
+ GPIO_Init( GPIO3, &GPIO_InitStructure );\r
\r
- /* Configure UART1_Tx pin GPIO3.3 */ \r
- GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput; \r
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \r
- GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ; \r
- GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable; \r
- GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ; \r
- GPIO_Init( GPIO3, &GPIO_InitStructure ); \r
+ /* Configure UART1_Tx pin GPIO3.3 */\r
+ GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;\r
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;\r
+ GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;\r
+ GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;\r
+ GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;\r
+ GPIO_Init( GPIO3, &GPIO_InitStructure );\r
\r
\r
portENTER_CRITICAL();\r
{ \r
/* Configure the UART itself. */\r
- UART_DeInit( UART1 ); \r
+ UART_DeInit( UART1 ); \r
UART_Init( UART1, &xUART1_Init );\r
UART_ITConfig( UART1, UART_IT_Receive | UART_IT_Transmit, ENABLE );\r
UART1->ICR = serCLEAR_ALL_INTERRUPTS;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )\r
+signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )\r
{\r
/* The port handle is not required as this driver only supports one port. */\r
( void ) pxPort;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )\r
+void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )\r
{\r
-signed portCHAR *pxNext;\r
+signed char *pxNext;\r
\r
/* A couple of parameters that this port does not use. */\r
( void ) usStringLength;\r
( void ) pxPort;\r
\r
/* Send each character in the string, one at a time. */\r
- pxNext = ( signed portCHAR * ) pcString;\r
+ pxNext = ( signed char * ) pcString;\r
while( *pxNext )\r
{\r
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );\r
}\r
/*-----------------------------------------------------------*/\r
\r
-signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )\r
+signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )\r
{\r
portBASE_TYPE xReturn;\r
\r
if( UART1->FR & serTX_FIFO_FULL )\r
{\r
/* Wait for the interrupt letting us know there is space on the\r
- FIFO. It is ok to block in a critical section, interrupts will be \r
+ FIFO. It is ok to block in a critical section, interrupts will be\r
enabled for other tasks once we force a switch. */\r
lTaskWaiting = pdTRUE;\r
\r
- /* Just to be a bit different this driver uses a semaphore to \r
+ /* Just to be a bit different this driver uses a semaphore to\r
block the sending task when the FIFO is full. The standard COMTest\r
task assumes a queue of adequate length exists so does not use\r
- a block time. For this demo the block time is therefore hard \r
+ a block time. For this demo the block time is therefore hard\r
coded. */\r
xReturn = xSemaphoreTake( xTxFIFOSemaphore, serTX_BLOCK_TIME );\r
if( xReturn )\r
\r
void UART1_IRQHandler( void )\r
{\r
-signed portCHAR cChar;\r
-portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;\r
+signed char cChar;\r
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
\r
while( UART1->RIS & mainRXRIS )\r
{\r
character from the DR and place it in the queue of received\r
characters. */\r
cChar = UART1->DR;\r
- xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );\r
+ xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
} \r
\r
if( UART1->RIS & mainTXRIS )\r
{\r
/* This interrupt was caused by space becoming available on the Tx\r
FIFO, wake any task that is waiting to post (if any). */\r
- xTaskWokenByTx = xSemaphoreGiveFromISR( xTxFIFOSemaphore, xTaskWokenByTx );\r
+ xSemaphoreGiveFromISR( xTxFIFOSemaphore, &xHigherPriorityTaskWoken );\r
lTaskWaiting = pdFALSE;\r
}\r
\r
\r
/* If a task was woken by either a character being received or a character\r
being transmitted then we may need to switch to another task. */\r
- portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );\r
+ portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
}\r
\r
\r
projects / freertos / blobdiff