\r
#ifdef __cplusplus\r
extern "C" {\r
-#endif \r
+#endif\r
\r
#include "../../CMSIS/a2fxxxm3.h"\r
#include "mss_ethernet_mac.h"\r
#include "mss_ethernet_mac_user_cfg.h"\r
- \r
+\r
typedef uint32_t addr_t;\r
\r
\r
/***************************************************************************//**\r
* There should be one instance of this structure for each instance of\r
* the MAC in your system. MSS_MAC_init routine initializes this structure.\r
- * It is used to identify the various MACs in your system and an initilized \r
- * MAC instance's structure should be passed as first parameter to MAC functions \r
+ * It is used to identify the various MACs in your system and an initilized\r
+ * MAC instance's structure should be passed as first parameter to MAC functions\r
* to identify which MAC should perform the requested operation.\r
- * Software using the MAC driver should only need to create one single \r
- * instance of this data structure for each MAC hardware instance in \r
+ * Software using the MAC driver should only need to create one single\r
+ * instance of this data structure for each MAC hardware instance in\r
* the system. Using MAC_get_configuration routine, latest status of the driver\r
* may be read by receiving its flags field, similarly MAC_configure routine lets\r
* you modify some of these flags.\r
*/\r
+#include "net/pack_struct_start.h"\r
typedef struct {\r
addr_t base_address; /**< Register base address of the driver*/\r
uint8_t flags; /**< Configuration of the driver*/\r
int8_t last_error; /**< Index of last error happened inside the driver*/\r
uint8_t mac_address[6]; /**< MAC address of the drived instance*/\r
- uint8_t mac_filter_data[90]; /**< MAC filter data, 15 addresses to be used for \r
+ uint8_t mac_filter_data[90]; /**< MAC filter data, 15 addresses to be used for\r
received data filtering*/\r
uint16_t last_timer_value; /**< Last read value of timer */\r
uint32_t time_out_value; /**< Time out value */\r
- MSS_MAC_callback_t listener; /**< Pointer to the call-back function to be triggered \r
+ MSS_MAC_callback_t listener; /**< Pointer to the call-back function to be triggered\r
when a package is received*/\r
\r
/* transmit related info: */\r
uint32_t rx_desc_index; /**< index of the receive descriptor getting used*/\r
// uint8_t rx_buffers[RX_RING_SIZE][MSS_RX_BUFF_SIZE+4];/**< array of receive buffers*/\r
MAC_descriptor_t rx_descriptors[RX_RING_SIZE];/**< array of receive descriptors*/\r
- \r
+\r
uint8_t phy_address; /**< MII address of the connected PHY*/\r
- \r
+\r
struct {\r
uint32_t rx_interrupts; /**< Number of receive interrupts occurred.*/\r
- uint32_t rx_filtering_fail; /**< Number of received frames which did not pass \r
+ uint32_t rx_filtering_fail; /**< Number of received frames which did not pass\r
the address recognition process.*/\r
uint32_t rx_descriptor_error; /**< Number of occurrences of; no receive buffer was\r
available when trying to store the received data.*/\r
- uint32_t rx_runt_frame; /**< Number of occurrences of; the frame is damaged by \r
- a collision or by a premature termination before \r
+ uint32_t rx_runt_frame; /**< Number of occurrences of; the frame is damaged by\r
+ a collision or by a premature termination before\r
the end of a collision window.*/\r
- uint32_t rx_not_first; /**< Number of occurrences of; start of the frame is \r
+ uint32_t rx_not_first; /**< Number of occurrences of; start of the frame is\r
not the first descriptor of a frame.*/\r
- uint32_t rx_not_last; /**< Number of occurrences of; end of the frame is not \r
+ uint32_t rx_not_last; /**< Number of occurrences of; end of the frame is not\r
the first descriptor of a frame.*/\r
- uint32_t rx_frame_too_long; /**< Number of occurrences of; a current frame is \r
- longer than maximum size of 1,518 bytes, as specified \r
+ uint32_t rx_frame_too_long; /**< Number of occurrences of; a current frame is\r
+ longer than maximum size of 1,518 bytes, as specified\r
by 802.3.*/\r
- uint32_t rx_collision_seen; /**< Number of occurrences of; a late collision was seen \r
+ uint32_t rx_collision_seen; /**< Number of occurrences of; a late collision was seen\r
(collision after 64 bytes following SFD).*/\r
- uint32_t rx_crc_error; /**< Number of occurrences of; a CRC error has occurred \r
+ uint32_t rx_crc_error; /**< Number of occurrences of; a CRC error has occurred\r
in the received frame.*/\r
- uint32_t rx_fifo_overflow; /**< Number of frames not accepted due to the receive \r
+ uint32_t rx_fifo_overflow; /**< Number of frames not accepted due to the receive\r
FIFO overflow.*/\r
- uint32_t rx_missed_frame; /**< Number of frames not accepted due to the \r
+ uint32_t rx_missed_frame; /**< Number of frames not accepted due to the\r
unavailability of the receive descriptor.*/\r
\r
uint32_t tx_interrupts; /**< Number of transmit interrupts occurred.*/\r
- uint32_t tx_loss_of_carrier; /**< Number of occurrences of; a loss of the carrier \r
+ uint32_t tx_loss_of_carrier; /**< Number of occurrences of; a loss of the carrier\r
during a transmission.*/\r
uint32_t tx_no_carrier; /**< Number of occurrences of; the carrier was not asserted\r
by an external transceiver during the transmission.*/\r
- uint32_t tx_late_collision; /**< Number of occurrences of; a collision was detected \r
+ uint32_t tx_late_collision; /**< Number of occurrences of; a collision was detected\r
after transmitting 64 bytes.*/\r
- uint32_t tx_excessive_collision;/**< Number of occurrences of; the transmission was \r
+ uint32_t tx_excessive_collision;/**< Number of occurrences of; the transmission was\r
aborted after 16 retries.*/\r
uint32_t tx_collision_count; /**< Number of collisions occurred.*/\r
- uint32_t tx_underflow_error; /**< Number of occurrences of; the FIFO was empty during \r
+ uint32_t tx_underflow_error; /**< Number of occurrences of; the FIFO was empty during\r
the frame transmission.*/\r
} statistics;\r
-} MAC_instance_t __attribute__((packed));\r
+} MAC_instance_t\r
+#include "net/pack_struct_end.h"\r
\r
\r
/*------------------------------------------------------------------------------\r
uint32_t CSR0_TAP[3];\r
uint32_t CSR0_DBO;\r
uint32_t CSR0_RESERVED1[11];\r
- \r
+\r
uint32_t MAC_CSR_RESERVED0[32];\r
- \r
+\r
uint32_t CSR1[32];\r
- \r
+\r
uint32_t MAC_CSR_RESERVED1[32];\r
- \r
+\r
uint32_t CSR2[32];\r
- \r
+\r
uint32_t MAC_CSR_RESERVED2[32];\r
- \r
+\r
uint32_t CSR3[32];\r
- \r
+\r
uint32_t MAC_CSR_RESERVED3[32];\r
- \r
+\r
uint32_t CSR4[32];\r
- \r
+\r
uint32_t MAC_CSR_RESERVED4[32];\r
- \r
+\r
uint32_t CSR5_TI;\r
uint32_t CSR5_TPS;\r
uint32_t CSR5_TU;\r
- uint32_t CSR5_RESERVED0[2]; \r
+ uint32_t CSR5_RESERVED0[2];\r
uint32_t CSR5_UNF;\r
uint32_t CSR5_RI;\r
uint32_t CSR5_RU;\r
uint32_t CSR5_RESERVED3[9];\r
\r
uint32_t MAC_CSR_RESERVED5[32];\r
- \r
+\r
uint32_t CSR6_HP;\r
uint32_t CSR6_SR;\r
uint32_t CSR6_HO;\r
uint32_t CSR6_RESERVED5;\r
\r
uint32_t MAC_CSR_RESERVED6[32];\r
- \r
+\r
uint32_t CSR7_TIE;\r
uint32_t CSR7_TSE;\r
uint32_t CSR7_TUE;\r
uint32_t CSR7[15];\r
\r
uint32_t MAC_CSR_RESERVED7[32];\r
- \r
+\r
uint32_t CSR8[32];\r
\r
uint32_t MAC_CSR_RESERVED8[32];\r
- \r
+\r
uint32_t CSR9_SCS;\r
uint32_t CSR9_SCLK;\r
uint32_t CSR9_SDI;\r
uint32_t CSR9_RESERVED1[12];\r
\r
uint32_t MAC_CSR_RESERVED9[32];\r
- \r
+\r
uint32_t CSR10[32];\r
\r
uint32_t MAC_CSR_RESERVED10[32];\r
- \r
+\r
uint32_t CSR11_TIM[16];\r
uint32_t CSR11_CON;\r
uint32_t CSR11_NRP[3];\r
#define CSR5_TS_SHIFT 20\r
\r
/** 000 - Stopped; RESET or STOP TRANSMIT command issued. */\r
-#define CSR5_TS_STOPPED 0u \r
+#define CSR5_TS_STOPPED 0u\r
/** 001 - Running, fetching the transmit descriptor. */\r
-#define CSR5_TS_RUNNING_FD 1u \r
+#define CSR5_TS_RUNNING_FD 1u\r
/** 010 - Running, waiting for end of transmission. */\r
-#define CSR5_TS_RUNNING_WT 2u \r
+#define CSR5_TS_RUNNING_WT 2u\r
/** 011 - Running, transferring data buffer from host memory to FIFO. */\r
-#define CSR5_TS_RUNNING_TD 3u \r
+#define CSR5_TS_RUNNING_TD 3u\r
/** 101 - Running, setup packet. */\r
-#define CSR5_TS_RUNNING_SP 5u \r
+#define CSR5_TS_RUNNING_SP 5u\r
/** 110 - Suspended; FIFO underflow or unavailable descriptor. */\r
-#define CSR5_TS_SUSPENDED 6u \r
+#define CSR5_TS_SUSPENDED 6u\r
/** 111 - Running, closing transmit descriptor. */\r
-#define CSR5_TS_RUNNING_CD 7u \r
+#define CSR5_TS_RUNNING_CD 7u\r
\r
/*------------------------------------------------------------------------------\r
* CSR5_RS:\r
#define CSR5_RS_SHIFT 17\r
\r
/** 000 - Stopped; RESET or STOP RECEIVE command issued. */\r
-#define CSR5_RS_STOPPED 0u \r
+#define CSR5_RS_STOPPED 0u\r
/** 001 - Running, fetching the receive descriptor. */\r
-#define CSR5_RS_RUNNING_FD 1u \r
+#define CSR5_RS_RUNNING_FD 1u\r
/** 010 - Running, waiting for the end-of-receive packet before prefetch of the\r
- *next descriptor. */ \r
-#define CSR5_RS_RUNNING_WR 2u \r
+ *next descriptor. */\r
+#define CSR5_RS_RUNNING_WR 2u\r
/** 011 - Running, waiting for the receive packet. */\r
-#define CSR5_RS_RUNNING_RB 3u \r
+#define CSR5_RS_RUNNING_RB 3u\r
/** 100 - Suspended, unavailable receive buffer. */\r
-#define CSR5_RS_SUSPENDED 4u \r
+#define CSR5_RS_SUSPENDED 4u\r
/** 101 - Running, closing the receive descriptor. */\r
-#define CSR5_RS_RUNNING_CD 5u \r
-/** 111 - Running, transferring data from FIFO to host memory. */ \r
+#define CSR5_RS_RUNNING_CD 5u\r
+/** 111 - Running, transferring data from FIFO to host memory. */\r
#define CSR5_RS_RUNNING_TD 7u\r
\r
/*------------------------------------------------------------------------------\r
projects / freertos / blobdiff