\r
A special exception to the GPL can be applied should you wish to distribute\r
a combined work that includes FreeRTOS.org, without being obliged to provide\r
- the source code for any proprietary components. See the licensing section \r
+ the source code for any proprietary components. See the licensing section\r
of http://www.FreeRTOS.org for full details of how and when the exception\r
can be applied.\r
\r
***************************************************************************\r
- See http://www.FreeRTOS.org for documentation, latest information, license \r
- and contact details. Please ensure to read the configuration and relevant \r
+ See http://www.FreeRTOS.org for documentation, latest information, license\r
+ and contact details. Please ensure to read the configuration and relevant\r
port sections of the online documentation.\r
\r
Also see http://www.SafeRTOS.com a version that has been certified for use\r
/* FIFO setting for the UART. The FIFO is not used to create a better test. */\r
#define commsFIFO_SET ( 0x10 )\r
\r
-/* The string that is transmitted on the UART contains sequentially the \r
+/* The string that is transmitted on the UART contains sequentially the\r
characters from commsFIRST_TX_CHAR to commsLAST_TX_CHAR. */\r
#define commsFIRST_TX_CHAR '0'\r
#define commsLAST_TX_CHAR 'z'\r
GPIODirModeSet( GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1, GPIO_DIR_MODE_HW );\r
\r
/* Configure the UART for 8-N-1 operation. */\r
- UARTConfigSet( UART0_BASE, commsBAUD_RATE, UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE );\r
+ UARTConfigSetExpClk( UART0_BASE, SysCtlClockGet(), commsBAUD_RATE, UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE );\r
\r
/* We dont want to use the fifo. This is for test purposes to generate\r
as many interrupts as possible. */\r
\r
/* Enable both Rx and Tx interrupts. */\r
HWREG( UART0_BASE + UART_O_IM ) |= ( UART_INT_TX | UART_INT_RX );\r
+ IntPrioritySet( INT_UART0, configKERNEL_INTERRUPT_PRIORITY );\r
IntEnable( INT_UART0 );\r
}\r
/*-----------------------------------------------------------*/\r
if( ( HWREG(UART0_BASE + UART_O_FR ) & UART_FR_RXFF ) )\r
{\r
/* Get the char from the buffer and post it onto the queue of\r
- Rxed chars. Posting the character should wake the task that is \r
+ Rxed chars. Posting the character should wake the task that is\r
blocked on the queue waiting for characters. */\r
cRxedChar = ( portCHAR ) HWREG( UART0_BASE + UART_O_DR );\r
xTaskWokenByPost = xQueueSendFromISR( xCommsQueue, &cRxedChar, xTaskWokenByPost );\r
{\r
/* If a task was woken by the character being received then we force\r
a context switch to occur in case the task is of higher priority than\r
- the currently executing task (i.e. the task that this interrupt \r
+ the currently executing task (i.e. the task that this interrupt\r
interrupted.) */\r
portEND_SWITCHING_ISR( xTaskWokenByPost );\r
}\r
{\r
if( cExpectedChar == commsLAST_TX_CHAR )\r
{\r
- /* We have reached the end of the string - we now expect to \r
- receive the first character in the string again. The LED is \r
+ /* We have reached the end of the string - we now expect to\r
+ receive the first character in the string again. The LED is\r
toggled to indicate that the entire string was received without\r
error. */\r
vParTestToggleLED( commsRX_LED );\r