/*\r
- FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.\r
+ FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.\r
\r
- This file is part of the FreeRTOS.org distribution.\r
+ This file is part of the FreeRTOS distribution.\r
\r
- FreeRTOS.org is free software; you can redistribute it and/or modify\r
- it under the terms of the GNU General Public License as published by\r
- the Free Software Foundation; either version 2 of the License, or\r
- (at your option) any later version.\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ Alternative commercial license and support terms are also available upon\r
+ request. See the licensing section of http://www.FreeRTOS.org for full\r
+ license details.\r
\r
- FreeRTOS.org is distributed in the hope that it will be useful,\r
- but WITHOUT ANY WARRANTY; without even the implied warranty of\r
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
- GNU General Public License for more details.\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
\r
- You should have received a copy of the GNU General Public License\r
- along with FreeRTOS.org; if not, write to the Free Software\r
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
\r
- A special exception to the GPL can be applied should you wish to distribute\r
- a combined work that includes FreeRTOS.org, without being obliged to provide\r
- the source code for any proprietary components. See the licensing section\r
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\r
- ***************************************************************************\r
***************************************************************************\r
* *\r
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* *\r
***************************************************************************\r
- ***************************************************************************\r
\r
- Please ensure to read the configuration and relevant port sections of the\r
- online documentation.\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
\r
- http://www.FreeRTOS.org - Documentation, latest information, license and\r
- contact details.\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
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- http://www.SafeRTOS.com - A version that is certified for use in safety\r
- critical systems.\r
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- licensing and training services.\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
*/\r
\r
\r
\r
/* Demo app includes. */\r
#include "BlockQ.h"\r
-#include "death.h"\r
#include "crflash.h"\r
#include "partest.h"\r
#include "semtest.h"\r
-#include "PollQ.h"\r
#include "GenQTest.h"\r
#include "QPeek.h"\r
-#include "recmutex.h"\r
+#include "comtest2.h"\r
\r
/*-----------------------------------------------------------*/\r
\r
\r
/* Task priorities. */\r
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
-#define mainWEB_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
\r
/* Co-routines are used to flash the LEDs. */\r
#define mainNUM_FLASH_CO_ROUTINES ( 3 )\r
\r
+/* The baud rate used by the comtest tasks. */\r
+#define mainBAUD_RATE ( 38400 )\r
+\r
+/* There is no spare LED for the comtest tasks, so this is set to an invalid\r
+number. */\r
+#define mainCOM_LED ( 4 )\r
+\r
/*\r
* Configure the hardware for the demo.\r
*/\r
*/\r
static void prvCheckTask( void *pvParameters );\r
\r
+/*\r
+ * Implement the 'Reg test' functionality as described at the top of this file.\r
+ */\r
+static void vRegTest1Task( void *pvParameters );\r
+static void vRegTest2Task( void *pvParameters );\r
+\r
/*-----------------------------------------------------------*/\r
\r
/* Counters used to detect errors within the reg test tasks. */\r
vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
vStartQueuePeekTasks();\r
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+ vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
\r
/* For demo purposes use some co-routines to flash the LEDs. */\r
vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
/* Create the check task. */\r
xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
\r
+\r
+ /* Start the reg test tasks - defined in this file. */\r
+ xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
+ xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
+\r
/* Start the scheduler. */\r
vTaskStartScheduler();\r
\r
\r
static void prvCheckTask( void *pvParameters )\r
{\r
-unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
+unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
portTickType xLastExecutionTime;\r
+volatile unsigned portBASE_TYPE uxUnusedStack;\r
\r
( void ) pvParameters;\r
\r
{\r
ulError |= 0x20UL;\r
}\r
+ \r
+ if( xAreComTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulError |= 0x40UL;\r
+ }\r
+\r
+ if( ulLastRegTest1Count == ulRegTest1Counter )\r
+ {\r
+ ulError |= 0x1000UL;\r
+ }\r
+\r
+ if( ulLastRegTest2Count == ulRegTest2Counter )\r
+ {\r
+ ulError |= 0x1000UL;\r
+ }\r
+\r
+ ulLastRegTest1Count = ulRegTest1Counter;\r
+ ulLastRegTest2Count = ulRegTest2Counter;\r
\r
/* If an error has been found then increase our cycle rate, and in so\r
doing increase the rate at which the check task LED toggles. */\r
\r
/* Toggle the LED each itteration. */\r
vParTestToggleLED( mainCHECK_LED );\r
+ \r
+ /* For demo only - how much unused stack does this task have? */\r
+ uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
}\r
}\r
/*-----------------------------------------------------------*/\r
( void ) n;\r
for( ;; ) {}\r
}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vRegTest1Task( void *pvParameters )\r
+{\r
+ /* Sanity check - did we receive the parameter expected? */\r
+ if( pvParameters != &ulRegTest1Counter )\r
+ {\r
+ /* Change here so the check task can detect that an error occurred. */\r
+ for( ;; )\r
+ {\r
+ }\r
+ }\r
+\r
+ /* Set all the registers to known values, then check that each retains its\r
+ expected value - as described at the top of this file. If an error is\r
+ found then the loop counter will no longer be incremented allowing the check\r
+ task to recognise the error. */\r
+ asm volatile ( "reg_test_1_start: \n\t"\r
+ " moveq #1, d0 \n\t"\r
+ " moveq #2, d1 \n\t"\r
+ " moveq #3, d2 \n\t"\r
+ " moveq #4, d3 \n\t"\r
+ " moveq #5, d4 \n\t"\r
+ " moveq #6, d5 \n\t"\r
+ " moveq #7, d6 \n\t"\r
+ " moveq #8, d7 \n\t"\r
+ " move #9, a0 \n\t"\r
+ " move #10, a1 \n\t"\r
+ " move #11, a2 \n\t"\r
+ " move #12, a3 \n\t"\r
+ " move #13, a4 \n\t"\r
+ " move #14, a5 \n\t"\r
+ " move #15, a6 \n\t"\r
+ " \n\t"\r
+ " cmpi.l #1, d0 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " cmpi.l #2, d1 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " cmpi.l #3, d2 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " cmpi.l #4, d3 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " cmpi.l #5, d4 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " cmpi.l #6, d5 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " cmpi.l #7, d6 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " cmpi.l #8, d7 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " move a0, d0 \n\t"\r
+ " cmpi.l #9, d0 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " move a1, d0 \n\t"\r
+ " cmpi.l #10, d0 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " move a2, d0 \n\t"\r
+ " cmpi.l #11, d0 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " move a3, d0 \n\t"\r
+ " cmpi.l #12, d0 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " move a4, d0 \n\t"\r
+ " cmpi.l #13, d0 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " move a5, d0 \n\t"\r
+ " cmpi.l #14, d0 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " move a6, d0 \n\t"\r
+ " cmpi.l #15, d0 \n\t"\r
+ " bne reg_test_1_error \n\t"\r
+ " move ulRegTest1Counter, d0 \n\t"\r
+ " addq #1, d0 \n\t"\r
+ " move d0, ulRegTest1Counter \n\t"\r
+ " bra reg_test_1_start \n\t"\r
+ "reg_test_1_error: \n\t"\r
+ " bra reg_test_1_error \n\t"\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vRegTest2Task( void *pvParameters )\r
+{\r
+ /* Sanity check - did we receive the parameter expected? */\r
+ if( pvParameters != &ulRegTest2Counter )\r
+ {\r
+ /* Change here so the check task can detect that an error occurred. */\r
+ for( ;; )\r
+ {\r
+ }\r
+ }\r
+\r
+ /* Set all the registers to known values, then check that each retains its\r
+ expected value - as described at the top of this file. If an error is\r
+ found then the loop counter will no longer be incremented allowing the check\r
+ task to recognise the error. */\r
+ asm volatile ( "reg_test_2_start: \n\t"\r
+ " moveq #10, d0 \n\t"\r
+ " moveq #20, d1 \n\t"\r
+ " moveq #30, d2 \n\t"\r
+ " moveq #40, d3 \n\t"\r
+ " moveq #50, d4 \n\t"\r
+ " moveq #60, d5 \n\t"\r
+ " moveq #70, d6 \n\t"\r
+ " moveq #80, d7 \n\t"\r
+ " move #90, a0 \n\t"\r
+ " move #100, a1 \n\t"\r
+ " move #110, a2 \n\t"\r
+ " move #120, a3 \n\t"\r
+ " move #130, a4 \n\t"\r
+ " move #140, a5 \n\t"\r
+ " move #150, a6 \n\t"\r
+ " \n\t"\r
+ " cmpi.l #10, d0 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " cmpi.l #20, d1 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " cmpi.l #30, d2 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " cmpi.l #40, d3 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " cmpi.l #50, d4 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " cmpi.l #60, d5 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " cmpi.l #70, d6 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " cmpi.l #80, d7 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " move a0, d0 \n\t"\r
+ " cmpi.l #90, d0 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " move a1, d0 \n\t"\r
+ " cmpi.l #100, d0 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " move a2, d0 \n\t"\r
+ " cmpi.l #110, d0 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " move a3, d0 \n\t"\r
+ " cmpi.l #120, d0 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " move a4, d0 \n\t"\r
+ " cmpi.l #130, d0 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " move a5, d0 \n\t"\r
+ " cmpi.l #140, d0 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " move a6, d0 \n\t"\r
+ " cmpi.l #150, d0 \n\t"\r
+ " bne reg_test_2_error \n\t"\r
+ " move ulRegTest1Counter, d0 \n\t"\r
+ " addq #1, d0 \n\t"\r
+ " move d0, ulRegTest2Counter \n\t"\r
+ " bra reg_test_2_start \n\t"\r
+ "reg_test_2_error: \n\t"\r
+ " bra reg_test_2_error \n\t"\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
\r