/*\r
- FreeRTOS.org V5.0.3 - Copyright (C) 2003-2008 Richard Barry.\r
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
\r
This file is part of the FreeRTOS.org distribution.\r
\r
#include "FreeRTOS.h"\r
#include "task.h"\r
\r
+/* Constants used to configure the interrupts. */\r
#define portPRESCALE_VALUE 64\r
#define portPRESCALE_REG_SETTING ( 5 << 8 )\r
#define portPIT_INTERRUPT_ENABLED ( 0x08 )\r
#define configPIT0_INTERRUPT_VECTOR ( 55 )\r
\r
+/*\r
+ * FreeRTOS.org requires two interrupts - a tick interrupt generated from a\r
+ * timer source, and a spare interrupt vector used for context switching.\r
+ * The configuration below uses PIT0 for the former, and vector 16 for the\r
+ * latter. **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO\r
+ * NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided\r
+ * here for using alternative interrupt sources.\r
+ *\r
+ * To change the tick interrupt source:\r
+ *\r
+ * 1) Modify vApplicationSetupInterrupts() below to be correct for whichever\r
+ * peripheral is to be used to generate the tick interrupt.\r
+ *\r
+ * 2) Change the name of the function __cs3_isr_interrupt_119() defined within\r
+ * this file to be correct for the interrupt vector used by the timer peripheral.\r
+ * The name of the function should contain the vector number, so by default vector\r
+ * number 119 is being used.\r
+ *\r
+ * 3) Make sure the tick interrupt is cleared within the interrupt handler function.\r
+ * Currently __cs3_isr_interrupt_119() clears the PIT0 interrupt.\r
+ *\r
+ * To change the spare interrupt source:\r
+ *\r
+ * 1) Modify vApplicationSetupInterrupts() below to be correct for whichever\r
+ * interrupt vector is to be used. Make sure you use a spare interrupt on interrupt\r
+ * controller 0, otherwise the register used to request context switches will also\r
+ * require modification. By default vector 16 is used which is free on most MCF52xxx\r
+ * devices.\r
+ *\r
+ * 2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h\r
+ * to be correct for your chosen interrupt vector.\r
+ *\r
+ * 3) Change the name of the function __cs3_isr_interrupt_80() within portasm.S\r
+ * to be correct for whichever vector number is being used. By default interrupt\r
+ * controller 0 vector number 16 is used, which corresponds to vector number 80.\r
+ */\r
void vApplicationSetupInterrupts( void )\r
{\r
const unsigned portSHORT usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ );\r
\r
- /* Configure interrupt priority and level and unmask interrupt. */\r
+ /* Configure interrupt priority and level and unmask interrupt for PIT0. */\r
MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );\r
MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );\r
\r
- MCF_INTC0_ICR63 = ( 0 | configKERNEL_INTERRUPT_PRIORITY << 3 );\r
- MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK63 );\r
+ /* Do the same for vector 16 (interrupt controller 0). I don't think the\r
+ write to MCF_INTC0_IMRH is actually required here but is included for\r
+ completeness. */\r
+ MCF_INTC0_ICR16 = ( 0 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );\r
+ MCF_INTC0_IMRH &= ~( MCF_INTC_IPRL_INT16 );\r
\r
+ /* Configure PIT0 to generate the RTOS tick. */\r
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;\r
MCF_PIT0_PCSR = ( portPRESCALE_REG_SETTING | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );\r
MCF_PIT0_PMR = usCompareMatchValue;\r
{\r
unsigned portLONG ulSavedInterruptMask;\r
\r
+ /* Clear the PIT0 interrupt. */\r
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;\r
+\r
+ /* Increment the RTOS tick. */\r
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();\r
vTaskIncrementTick();\r
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );\r
\r
+ /* If we are using the pre-emptive scheduler then also request a\r
+ context switch as incrementing the tick could have unblocked a task. */\r
#if configUSE_PREEMPTION == 1\r
{\r
taskYIELD();\r