/*\r
- FreeRTOS.org V5.0.3 - Copyright (C) 2003-2008 Richard Barry.\r
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.\r
\r
This file is part of the FreeRTOS.org distribution.\r
\r
/*\r
* FreeRTOS.org requires two interrupts - a tick interrupt generated from a\r
* timer source, and a spare interrupt vector used for context switching.\r
- * The configuration below uses PIT0 for the former, and vector 63 for the\r
+ * The configuration below uses PIT0 for the former, and vector 16 for the\r
* latter. **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO\r
* NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided\r
* here for using alternative interrupt sources.\r
* 1) Modify vApplicationSetupInterrupts() below to be correct for whichever\r
* interrupt vector is to be used. Make sure you use a spare interrupt on interrupt\r
* controller 0, otherwise the register used to request context switches will also\r
- * require modification.\r
+ * require modification. By default vector 16 is used which is free on most MCF52xxx\r
+ * devices.\r
*\r
* 2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h\r
* to be correct for your chosen interrupt vector.\r
*\r
- * 3) Change the name of the function __cs3_isr_interrupt_127() within portasm.S\r
+ * 3) Change the name of the function __cs3_isr_interrupt_80() within portasm.S\r
* to be correct for whichever vector number is being used. By default interrupt\r
- * controller 0 number 63 is used, which corresponds to vector number 127.
+ * controller 0 vector number 16 is used, which corresponds to vector number 80.\r
*/\r
void vApplicationSetupInterrupts( void )\r
{\r
MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );\r
MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );\r
\r
- /* Do the same for vector 63 (interrupt controller 0. I don't think the\r
+ /* Do the same for vector 16 (interrupt controller 0). I don't think the\r
write to MCF_INTC0_IMRH is actually required here but is included for\r
completeness. */\r
- MCF_INTC0_ICR63 = ( 0 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );\r
- MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK63 );\r
+ MCF_INTC0_ICR16 = ( 0 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );\r
+ MCF_INTC0_IMRH &= ~( MCF_INTC_IPRL_INT16 );\r
\r
/* Configure PIT0 to generate the RTOS tick. */\r
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;\r