Comment and spell check the STM32L152 demo project.

[freertos] / Demo / Cortex_STM32L152_IAR / serial.c

diff --git a/Demo/Cortex_STM32L152_IAR/serial.c b/Demo/Cortex_STM32L152_IAR/serial.c
index fd3a15094b1fa64d7e204f6820817c05ddd85f7f..0668d49d137be384859f2ec7d25427997a738902 100644 (file)
--- a/Demo/Cortex_STM32L152_IAR/serial.c
+++ b/Demo/Cortex_STM32L152_IAR/serial.c
@@ -53,6 +53,15 @@
 \r
 /*\r
        BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.\r
+       \r
+       ***Note*** This example uses queues to send each character into an interrupt\r
+       service routine and out of an interrupt service routine individually.  This\r
+       is done to demonstrate queues being used in an interrupt, and to deliberately\r
+       load the system to test the FreeRTOS port.  It is *NOT* meant to be an \r
+       example of an efficient implementation.  An efficient implementation should\r
+       use FIFO's or DMA if available, and only use FreeRTOS API functions when \r
+       enough has been received to warrant a task being unblocked to process the\r
+       data.\r
 */\r
 \r
 /* Scheduler includes. */\r
@@ -71,7 +80,6 @@
 /* Misc defines. */\r
 #define serINVALID_QUEUE                               ( ( xQueueHandle ) 0 )\r
 #define serNO_BLOCK                                            ( ( portTickType ) 0 )\r
-#define serTX_BLOCK_TIME                               ( 40 / portTICK_RATE_MS )\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
@@ -94,7 +102,7 @@ NVIC_InitTypeDef NVIC_InitStructure;
        xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
        xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
        \r
-       /* If the queue/semaphore was created correctly then setup the serial port\r
+       /* If the queues were created correctly then setup the serial port\r
        hardware. */\r
        if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )\r
        {\r
@@ -200,12 +208,12 @@ portCHAR cChar;
 \r
        if( USART_GetITStatus( USART3, USART_IT_TXE ) == SET )\r
        {\r
-               /* The interrupt was caused by the THR becoming empty.  Are there any\r
-               more characters to transmit? */\r
+               /* The interrupt was caused by the TX register becoming empty.  Are \r
+               there any more characters to transmit? */\r
                if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
                {\r
                        /* A character was retrieved from the queue so can be sent to the\r
-                       THR now. */\r
+                       USART now. */\r
                        USART_SendData( USART3, cChar );\r
                }\r
                else\r
@@ -216,10 +224,18 @@ portCHAR cChar;
        \r
        if( USART_GetITStatus( USART3, USART_IT_RXNE ) == SET )\r
        {\r
+               /* A character has been received on the USART, send it to the Rx\r
+               handler task. */\r
                cChar = USART_ReceiveData( USART3 );\r
                xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
        }       \r
 \r
+       /* If sending or receiving from a queue has caused a task to unblock, and\r
+       the unblocked task has a priority equal to or higher than the currently \r
+       running task (the task this ISR interrupted), then xHigherPriorityTaskWoken \r
+       will have automatically been set to pdTRUE within the queue send or receive \r
+       function.  portEND_SWITCHING_ISR() will then ensure that this ISR returns \r
+       directly to the higher priority unblocked task. */\r
        portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
 }\r
 \r