]> git.sur5r.net Git - freertos/blobdiff - Demo/MB91460_Softune/SRC/main.c
Remove unnecessary use of portLONG, portCHAR and portSHORT.
[freertos] / Demo / MB91460_Softune / SRC / main.c
index 25e1b7daaa615b37dbc0d7ac431e04c7c16248e7..ce2e1175d3255b6096bd450ed9faecd4a4f28fc4 100644 (file)
@@ -1,43 +1,49 @@
 /*\r
-       FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.\r
+    FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.\r
 \r
-       This file is part of the FreeRTOS.org distribution.\r
+    This file is part of the FreeRTOS distribution.\r
 \r
-       FreeRTOS.org is free software; you can redistribute it and/or modify\r
-       it under the terms of the GNU General Public License as published by\r
-       the Free Software Foundation; either version 2 of the License, or\r
-       (at your option) any later version.\r
+    FreeRTOS is free software; you can redistribute it and/or modify it    under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation and modified by the FreeRTOS exception.\r
+    **NOTE** The exception to the GPL is included to allow you to distribute a\r
+    combined work that includes FreeRTOS without being obliged to provide the\r
+    source code for proprietary components outside of the FreeRTOS kernel.\r
+    Alternative commercial license and support terms are also available upon\r
+    request.  See the licensing section of http://www.FreeRTOS.org for full\r
+    license details.\r
 \r
-       FreeRTOS.org is distributed in the hope that it will be useful,\r
-       but WITHOUT ANY WARRANTY; without even the implied warranty of\r
-       MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
-       GNU General Public License for more details.\r
+    FreeRTOS is distributed in the hope that it will be useful,    but WITHOUT\r
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
+    more details.\r
 \r
-       You should have received a copy of the GNU General Public License\r
-       along with FreeRTOS.org; if not, write to the Free Software\r
-       Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
+    You should have received a copy of the GNU General Public License along\r
+    with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+    Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
 \r
-       A special exception to the GPL can be applied should you wish to distribute\r
-       a combined work that includes FreeRTOS.org, without being obliged to provide\r
-       the source code for any proprietary components.  See the licensing section\r
-       of http://www.FreeRTOS.org for full details of how and when the exception\r
-       can be applied.\r
 \r
-       ***************************************************************************\r
+    ***************************************************************************\r
+    *                                                                         *\r
+    * The FreeRTOS eBook and reference manual are available to purchase for a *\r
+    * small fee. Help yourself get started quickly while also helping the     *\r
+    * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *\r
+    *                                                                         *\r
+    ***************************************************************************\r
 \r
-       Please ensure to read the configuration and relevant port sections of the \r
-       online documentation.\r
+    1 tab == 4 spaces!\r
 \r
-       +++ http://www.FreeRTOS.org +++\r
-       Documentation, latest information, license and contact details.  \r
+    Please ensure to read the configuration and relevant port sections of the\r
+    online documentation.\r
 \r
-       +++ http://www.SafeRTOS.com +++\r
-       A version that is certified for use in safety critical systems.\r
+    http://www.FreeRTOS.org - Documentation, latest information, license and\r
+    contact details.\r
 \r
-       +++ http://www.OpenRTOS.com +++\r
-       Commercial support, development, porting, licensing and training services.\r
+    http://www.SafeRTOS.com - A version that is certified for use in safety\r
+    critical systems.\r
 \r
-       ***************************************************************************\r
+    http://www.OpenRTOS.com - Commercial support, development, porting,\r
+    licensing and training services.\r
 */\r
 \r
 \r
 #include "flash.h"\r
 #include "integer.h"\r
 #include "comtest2.h"\r
-#include "PollQ.h"\r
 #include "semtest.h"\r
 #include "BlockQ.h"\r
 #include "dynamic.h"\r
 #include "flop.h"\r
 #include "GenQTest.h"\r
 #include "QPeek.h"\r
-#include "BlockTim.h"\r
+#include "blocktim.h"\r
 #include "death.h"\r
 #include "taskutility.h"\r
 #include "partest.h"\r
+#include "crflash.h"\r
        \r
 /* Demo task priorities. */\r
 #define mainWATCHDOG_TASK_PRIORITY             ( tskIDLE_PRIORITY + 5 )\r
 #define mainCHECK_TASK_PRIORITY                        ( tskIDLE_PRIORITY + 4 )\r
-#define mainUTILITY_TASK_PRIORITY              ( tskIDLE_PRIORITY + 3 )\r
+#define mainUTILITY_TASK_PRIORITY              ( tskIDLE_PRIORITY )\r
 #define mainSEM_TEST_PRIORITY                  ( tskIDLE_PRIORITY + 3 )\r
 #define mainCOM_TEST_PRIORITY                  ( tskIDLE_PRIORITY + 2 )\r
-#define mainQUEUE_POLL_PRIORITY                        ( tskIDLE_PRIORITY + 2 )\r
 #define mainQUEUE_BLOCK_PRIORITY               ( tskIDLE_PRIORITY + 2 )\r
 #define mainDEATH_PRIORITY                             ( tskIDLE_PRIORITY + 1 )\r
 #define mainLED_TASK_PRIORITY                  ( tskIDLE_PRIORITY + 1 )\r
@@ -130,6 +135,9 @@ LCD represent LEDs]*/
 /* The number of interrupt levels to use. */\r
 #define mainINTERRUPT_LEVELS   ( 31 )\r
 \r
+/* The number of 'flash' co-routines to create - each toggles a different LED. */\r
+#define mainNUM_FLASH_CO_ROUTINES      ( 8 )\r
+\r
 /*---------------------------------------------------------------------------*/\r
 \r
 /* \r
@@ -164,9 +172,6 @@ static void vSecondRegisterTestTask( void *pvParameters );
 register test tasks. */\r
 unsigned portLONG ulRegTestError = pdFALSE;\r
 \r
-/* Variables used to ensure the register check tasks are still executing. */\r
-static volatile unsigned portLONG ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL;\r
-\r
 /*---------------------------------------------------------------------------*/\r
 \r
 /* Start all the demo application tasks, then start the scheduler. */\r
@@ -179,7 +184,6 @@ void main(void)
        vStartLEDFlashTasks( mainLED_TASK_PRIORITY );   \r
        vStartIntegerMathTasks( tskIDLE_PRIORITY );\r
        vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED - 1 );\r
-       vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
        vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
        vStartBlockingQueueTasks ( mainQUEUE_BLOCK_PRIORITY );  \r
        vStartDynamicPriorityTasks();   \r
@@ -187,6 +191,7 @@ void main(void)
        vStartGenericQueueTasks( mainGENERIC_QUEUE_PRIORITY );\r
        vStartQueuePeekTasks();\r
        vCreateBlockTimeTasks();\r
+       vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
 \r
        /* Start the 'Check' task which is defined in this file. */\r
        xTaskCreate( prvErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );    \r
@@ -255,7 +260,6 @@ portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY, xLastExecutionTime;
 static portSHORT prvCheckOtherTasksAreStillRunning( void )\r
 {\r
 portBASE_TYPE lReturn = pdPASS;\r
-static unsigned portLONG ulLastRegTest1Counter = 0UL, ulLastRegTest2Counter = 0UL;\r
 \r
        /* The demo tasks maintain a count that increments every cycle of the task\r
        provided that the task has never encountered an error.  This function \r
@@ -268,11 +272,6 @@ static unsigned portLONG ulLastRegTest1Counter = 0UL, ulLastRegTest2Counter = 0U
                lReturn = pdFAIL;\r
        }\r
 \r
-       if( xArePollingQueuesStillRunning() != pdTRUE )\r
-       {\r
-               lReturn = pdFAIL;\r
-       }\r
-\r
        if( xAreComTestTasksStillRunning() != pdTRUE )\r
        {\r
                lReturn = pdFAIL;\r
@@ -324,22 +323,6 @@ static unsigned portLONG ulLastRegTest1Counter = 0UL, ulLastRegTest2Counter = 0U
                lReturn = pdFAIL;\r
        }\r
 \r
-       /* Are the register test tasks still running? */\r
-       if( ulLastRegTest1Counter == ulRegTest1Counter )\r
-       {\r
-               lReturn = pdFAIL;\r
-       }\r
-       \r
-       if( ulLastRegTest2Counter == ulRegTest2Counter )\r
-       {\r
-               lReturn = pdFAIL;\r
-       }\r
-\r
-       /* Record the current values of the register check cycle counters so we\r
-       can ensure they are still running the next time this function is called. */\r
-       ulLastRegTest1Counter = ulRegTest1Counter;\r
-       ulLastRegTest2Counter = ulRegTest2Counter;\r
-\r
        return lReturn;\r
 }\r
 /*-----------------------------------------------------------*/\r
@@ -373,6 +356,8 @@ static void prvSetupHardware( void )
                #if WATCHDOG == WTC_IN_IDLE\r
                        Kick_Watchdog();\r
                #endif\r
+\r
+               vCoRoutineSchedule();\r
        }\r
 #else\r
        #if WATCHDOG == WTC_IN_IDLE\r
@@ -408,11 +393,7 @@ extern volatile unsigned portLONG ulCriticalNesting;
        /* Fills the registers with known values (different to the values\r
        used in vSecondRegisterTestTask()), then checks that the registers still\r
        all contain the expected value.  This is done to test the context save\r
-       and restore mechanism as this task is swapped onto and off of the CPU.\r
-\r
-       The critical nesting depth is also saved as part of the context so also\r
-       check this maintains an expected value. */\r
-       ulCriticalNesting = 0x12345678;\r
+       and restore mechanism as this task is swapped onto and off of the CPU. */\r
 \r
        for( ;; )\r
        {\r
@@ -436,70 +417,56 @@ extern volatile unsigned portLONG ulCriticalNesting;
                        LDI #0x11111111, R13\r
                        CMP R13, R0\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x22222222, R13\r
                        CMP R13, R1\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x33333333, R13\r
                        CMP R13, R2\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x44444444, R13\r
                        CMP R13, R3\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x55555555, R13\r
                        CMP R13, R4\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x66666666, R13\r
                        CMP R13, R5\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x77777777, R13\r
                        CMP R13, R6\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x88888888, R13\r
                        CMP R13, R7\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x99999999, R13\r
                        CMP R13, R8\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0xaaaaaaaa, R13\r
                        CMP R13, R9\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0xbbbbbbbb, R13\r
                        CMP R13, R10\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0xcccccccc, R13\r
                        CMP R13, R11\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        LDI #0xdddddddd, R13\r
                        CMP R13, R12\r
                        BNE First_Set_Error\r
-                       NOP\r
 \r
                        BRA First_Start_Next_Loop\r
-                       NOP\r
 \r
                First_Set_Error:\r
 \r
@@ -513,13 +480,6 @@ extern volatile unsigned portLONG ulCriticalNesting;
 \r
 \r
                #pragma endasm\r
-\r
-               ulRegTest1Counter++;\r
-\r
-               if( ulCriticalNesting != 0x12345678 )\r
-               {\r
-                       ulRegTestError = pdTRUE;\r
-               }\r
        }\r
 }\r
 /*-----------------------------------------------------------*/\r
@@ -531,11 +491,7 @@ extern volatile unsigned portLONG ulCriticalNesting;
        /* Fills the registers with known values (different to the values\r
        used in vFirstRegisterTestTask()), then checks that the registers still\r
        all contain the expected value.  This is done to test the context save\r
-       and restore mechanism as this task is swapped onto and off of the CPU.\r
-\r
-       The critical nesting depth is also saved as part of the context so also\r
-       check this maintains an expected value. */\r
-       ulCriticalNesting = 0x87654321;\r
+       and restore mechanism as this task is swapped onto and off of the CPU. */\r
 \r
        for( ;; )\r
        {\r
@@ -543,6 +499,7 @@ extern volatile unsigned portLONG ulCriticalNesting;
                        ;Load known values into each register.\r
                        LDI     #0x11111111, R1\r
                        LDI     #0x22222222, R2\r
+                       INT #40H\r
                        LDI     #0x33333333, R3\r
                        LDI #0x44444444, R4\r
                        LDI     #0x55555555, R5\r
@@ -550,6 +507,7 @@ extern volatile unsigned portLONG ulCriticalNesting;
                        LDI     #0x77777777, R7\r
                        LDI     #0x88888888, R8\r
                        LDI     #0x99999999, R9\r
+                       INT #40H\r
                        LDI     #0xaaaaaaaa, R10\r
                        LDI     #0xbbbbbbbb, R11\r
                        LDI     #0xcccccccc, R12\r
@@ -559,70 +517,60 @@ extern volatile unsigned portLONG ulCriticalNesting;
                        LDI #0x11111111, R13\r
                        CMP R13, R1\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x22222222, R13\r
                        CMP R13, R2\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x33333333, R13\r
                        CMP R13, R3\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x44444444, R13\r
                        CMP R13, R4\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x55555555, R13\r
                        CMP R13, R5\r
                        BNE Second_Set_Error\r
-                       NOP\r
+\r
+                       INT #40H\r
 \r
                        LDI #0x66666666, R13\r
                        CMP R13, R6\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x77777777, R13\r
                        CMP R13, R7\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x88888888, R13\r
                        CMP R13, R8\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0x99999999, R13\r
                        CMP R13, R9\r
                        BNE Second_Set_Error\r
-                       NOP\r
+\r
+                       INT #40H\r
 \r
                        LDI #0xaaaaaaaa, R13\r
                        CMP R13, R10\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0xbbbbbbbb, R13\r
                        CMP R13, R11\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0xcccccccc, R13\r
                        CMP R13, R12\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        LDI #0xdddddddd, R13\r
                        CMP R13, R0\r
                        BNE Second_Set_Error\r
-                       NOP\r
 \r
                        BRA Second_Start_Next_Loop\r
-                       NOP\r
 \r
                Second_Set_Error:\r
 \r
@@ -636,13 +584,6 @@ extern volatile unsigned portLONG ulCriticalNesting;
 \r
 \r
                #pragma endasm\r
-\r
-               ulRegTest2Counter++;\r
-\r
-               if( ulCriticalNesting != 0x87654321 )\r
-               {\r
-                       ulRegTestError = pdTRUE;\r
-               }\r
        }\r
 }\r
 /*-----------------------------------------------------------*/\r