+/*\r
+ FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ FreeRTOS supports many tools and architectures. V7.0.0 is sponsored by:\r
+ Atollic AB - Atollic provides professional embedded systems development\r
+ tools for C/C++ development, code analysis and test automation.\r
+ See http://www.atollic.com\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
.extern pxCurrentTCB\r
- .extern vTaskISRHandler\r
+ .extern XIntc_DeviceInterruptHandler\r
.extern vTaskSwitchContext\r
.extern uxCriticalNesting\r
.extern pulISRStack\r
\r
.global _interrupt_handler\r
.global VPortYieldASM\r
- .global vStartFirstTask\r
+ .global vPortStartFirstTask\r
\r
\r
.macro portSAVE_CONTEXT\r
+\r
/* Make room for the context on the stack. */\r
addik r1, r1, -132\r
- /* Save r31 so it can then be used. */\r
+\r
+ /* Save r31 so it can then be used as a temporary. */\r
swi r31, r1, 4\r
+\r
/* Copy the msr into r31 - this is stacked later. */\r
mfs r31, rmsr\r
+\r
/* Stack general registers. */\r
swi r30, r1, 12\r
swi r29, r1, 16\r
swi r4, r1, 116\r
swi r3, r1, 120\r
swi r2, r1, 124\r
+\r
/* Stack the critical section nesting value. */\r
lwi r3, r0, uxCriticalNesting\r
swi r3, r1, 128\r
+\r
/* Save the top of stack value to the TCB. */\r
lwi r3, r0, pxCurrentTCB\r
sw r1, r0, r3\r
.endm\r
\r
.macro portRESTORE_CONTEXT\r
+\r
/* Load the top of stack value from the TCB. */\r
lwi r3, r0, pxCurrentTCB\r
lw r1, r0, r3 \r
+\r
/* Restore the general registers. */\r
lwi r31, r1, 4 \r
lwi r30, r1, 12 \r
lwi r4, r1, 116\r
lwi r2, r1, 124\r
\r
+ /* Reload the rmsr from the stack. */\r
+ lwi r3, r1, 8\r
+ mts rmsr, r3\r
+\r
/* Load the critical nesting value. */\r
lwi r3, r1, 128\r
swi r3, r0, uxCriticalNesting\r
\r
- /* Obtain the MSR value from the stack. */\r
- lwi r3, r1, 8\r
-\r
- /* Are interrupts enabled in the MSR? If so return using an return from \r
- interrupt instruction to ensure interrupts are enabled only once the task\r
- is running again. */\r
- andi r3, r3, 2\r
- beqid r3, 36\r
- or r0, r0, r0\r
+ /* Test the critical nesting value. If it is non zero then the task last\r
+ exited the running state using a yield. If it is zero, then the task\r
+ last exited the running state through an interrupt. */\r
+ xori r3, r3, 0\r
+ bnei r3, exit_from_yield\r
\r
- /* Reload the rmsr from the stack, clear the enable interrupt bit in the\r
- value before saving back to rmsr register, then return enabling interrupts\r
- as we return. */\r
- lwi r3, r1, 8\r
- andi r3, r3, ~2\r
- mts rmsr, r3\r
+ /* r3 was being used as a temporary. Now restore its true value from the\r
+ stack. */\r
lwi r3, r1, 120\r
- addik r1, r1, 132\r
- rtid r14, 0\r
- or r0, r0, r0\r
\r
- /* Reload the rmsr from the stack, place it in the rmsr register, and\r
- return without enabling interrupts. */\r
- lwi r3, r1, 8\r
- mts rmsr, r3\r
- lwi r3, r1, 120\r
+ /* Remove the stack frame. */\r
addik r1, r1, 132\r
- rtsd r14, 0\r
+\r
+ /* Return using rtid so interrupts are re-enabled as this function is\r
+ exited. */\r
+ rtid r14, 0\r
or r0, r0, r0\r
\r
.endm\r
.text\r
.align 2\r
\r
+/* This function is used to exit portRESTORE_CONTEXT() if the task being\r
+returned to last left the Running state by calling taskYIELD() (rather than\r
+being preempted by an interrupt. */\r
+exit_from_yield:\r
+\r
+ /* r3 was being used as a temporary. Now restore its true value from the\r
+ stack. */\r
+ lwi r3, r1, 120\r
+\r
+ /* Remove the stack frame. */\r
+ addik r1, r1, 132\r
+\r
+ /* Return to the task. */\r
+ rtsd r14, 0\r
+ or r0, r0, r0\r
+\r
\r
_interrupt_handler:\r
+\r
portSAVE_CONTEXT\r
- /* Entered via an interrupt so interrupts must be enabled in msr. */\r
- ori r31, r31, 2\r
+\r
/* Stack msr. */\r
swi r31, r1, 8\r
- /* Stack the return address. As we entered via an interrupt we do\r
- not need to modify the return address prior to stacking. */\r
+\r
+ /* Stack the return address. */\r
swi r14, r1, 76\r
- /* Now switch to use the ISR stack. */\r
- lwi r3, r0, pulISRStack\r
- add r1, r3, r0\r
- bralid r15, vTaskISRHandler\r
+\r
+ /* Switch to the ISR stack. */\r
+ lwi r1, r0, pulISRStack\r
+\r
+ /* Execute any pending interrupts. */\r
+ bralid r15, XIntc_DeviceInterruptHandler\r
or r0, r0, r0\r
+\r
+ /* Restore the context of the next task scheduled to execute. */\r
portRESTORE_CONTEXT\r
\r
\r
VPortYieldASM:\r
+\r
portSAVE_CONTEXT\r
+\r
/* Stack msr. */\r
swi r31, r1, 8\r
- /* Modify the return address so we return to the instruction after the\r
- exception. */\r
+\r
+ /* Modify the return address so a return is done to the instruction after\r
+ the call to VPortYieldASM. */\r
addi r14, r14, 8\r
swi r14, r1, 76\r
- /* Now switch to use the ISR stack. */\r
- lwi r3, r0, pulISRStack\r
- add r1, r3, r0\r
+\r
+ /* Switch to use the ISR stack. */\r
+ lwi r1, r0, pulISRStack\r
+\r
+ /* Select the next task to execute. */\r
bralid r15, vTaskSwitchContext\r
or r0, r0, r0\r
+\r
+ /* Restore the context of the next task scheduled to execute. */\r
portRESTORE_CONTEXT\r
\r
-vStartFirstTask:\r
+vPortStartFirstTask:\r
+\r
portRESTORE_CONTEXT\r
\r
\r
projects / freertos / blobdiff