Update lwIP port layer for the Microblaze Ethernet Lite IP.

[freertos] / Demo / PPC405_FPU_Xilinx_Virtex4_GCC / system.xmp

diff --git a/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/system.xmp b/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/system.xmp
index 0e1cb57a51583c0d9c292df1d0051208a0aab0c4..4a7a93ca7cb4962ef4cf482b9320253f46f52957 100644 (file)
--- a/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/system.xmp
+++ b/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/system.xmp
@@ -69,6 +69,6 @@ ProgStart:
 StackSize: \r
 HeapSize: \r
 LinkerScript: RTOSDemo/RTOSDemo_linker_script.ld\r
-ProgCCFlags: -I./RTOSDemo/flop -I../../Source/portable/GCC/PPC405_Xilinx -I./ppc405_0/include/  -IRTOSDemo/   -I. -I./RTOSDemo/ -I../Common/include/ -I../../Source/include/ -I./ppc405_0/include/ -I./ppc405_0/include -D GCC_PPC405 -mregnames -Wextra\r
+ProgCCFlags: -I./RTOSDemo/flop -I../../Source/portable/GCC/PPC405_Xilinx -I./ppc405_0/include/  -IRTOSDemo/   -I. -I./RTOSDemo/ -I../Common/include/ -I../../Source/include/ -I./ppc405_0/include/ -I./ppc405_0/include -D GCC_PPC405 -mregnames\r
 CompileInXps: 1\r
 NonXpsApp: 0\r