PPC405 work in progress.

[freertos] / Demo / PPC405_Xilinx_Virtex4_GCC / RTOSDemo / serial / serial.c

diff --git a/Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/serial/serial.c b/Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/serial/serial.c
index ce211944b815f3e6cd6494b6fb400395fe4ecfe3..d4c1750e5cd26c7795f6c42639daf6e03b691fda 100644 (file)
--- a/Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/serial/serial.c
+++ b/Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/serial/serial.c
@@ -54,8 +54,11 @@
 #include "serial.h"\r
 \r
 /* Microblaze driver includes. */\r
+#include "xparameters.h"\r
+#include "xuartlite.h"\r
 #include "xuartlite_l.h"\r
 #include "xintc_l.h"\r
+#include "xintc.h"\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
@@ -64,11 +67,16 @@ transmitted. */
 static xQueueHandle xRxedChars; \r
 static xQueueHandle xCharsForTx; \r
 \r
+static XUartLite xUART;\r
+\r
+static void vSerialISR( XUartLite *pxUART );\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
 {\r
 unsigned portLONG ulControlReg, ulMask;\r
+extern XIntc xInterruptController;\r
 \r
        /* NOTE: The baud rate used by this driver is determined by the hardware\r
        parameterization of the UART Lite peripheral, and the baud value passed to\r
@@ -80,18 +88,15 @@ unsigned portLONG ulControlReg, ulMask;
 \r
        if( ( xRxedChars ) && ( xCharsForTx ) )\r
        {\r
-               /* Disable the interrupt. */\r
-               XUartLite_mDisableIntr( XPAR_RS232_UART_BASEADDR );\r
-               \r
-               /* Flush the fifos. */\r
-               ulControlReg = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );\r
-               XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_CONTROL_REG_OFFSET, ulControlReg | XUL_CR_FIFO_TX_RESET | XUL_CR_FIFO_RX_RESET );\r
-\r
-               /* Register the handler. */\r
-               XExc_RegisterHandler( XEXC_ID_UART0_INT, ( XExceptionHandler ) vSerialISR, ( void * ) 0 );\r
-\r
-               /* Enable the interrupt again. */\r
-               XUartLite_mEnableIntr( XPAR_RS232_UART_BASEADDR );\r
+\r
+               XUartLite_Initialize( &xUART, XPAR_RS232_UART_DEVICE_ID );\r
+               XUartLite_ResetFifos( &xUART );\r
+               XUartLite_DisableInterrupt( &xUART );\r
+\r
+               if( xPortInstallInterruptHandler( XPAR_OPB_INTC_0_RS232_UART_INTERRUPT_INTR, ( XInterruptHandler )vSerialISR, (void *)&xUART ) == pdPASS )\r
+               {               \r
+                       XUartLite_EnableInterrupt( &xUART );\r
+               }\r
        }\r
        \r
        return ( xComPortHandle ) 0;\r
@@ -162,21 +167,20 @@ void vSerialClose( xComPortHandle xPort )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vSerialISR( void *pvBaseAddress )\r
+static void vSerialISR( XUartLite *pxUART )\r
 {\r
 unsigned portLONG ulISRStatus;\r
 portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;\r
 portCHAR cChar;\r
 \r
-       /* Determine the cause of the interrupt. */\r
-    ulISRStatus = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );\r
+    ulISRStatus = XIo_In32( pxUART->RegBaseAddress + XUL_STATUS_REG_OFFSET );\r
 \r
-    if( ( ulISRStatus & ( XUL_SR_RX_FIFO_FULL | XUL_SR_RX_FIFO_VALID_DATA ) ) != 0 )\r
-       {\r
+    if( ( ulISRStatus & (XUL_SR_RX_FIFO_FULL | XUL_SR_RX_FIFO_VALID_DATA ) ) != 0 )\r
+    {\r
                /* A character is available - place it in the queue of received\r
                characters.  This might wake a task that was blocked waiting for \r
                data. */\r
-               cChar = ( portCHAR )XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );\r
+               cChar = ( portCHAR ) XIo_In32( pxUART->RegBaseAddress + XUL_RX_FIFO_OFFSET );\r
                xTaskWokenByRx = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByRx );\r
     }\r
 \r
@@ -187,8 +191,9 @@ portCHAR cChar;
                task that was waiting for space to become available on the Tx queue. */\r
                if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )\r
                {\r
-                       XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );\r
+                       XIo_Out32( pxUART->RegBaseAddress + XUL_TX_FIFO_OFFSET, cChar );\r
                }\r
+\r
     }\r
 \r
        /* If we woke any tasks we may require a context switch. */\r
@@ -197,3 +202,6 @@ portCHAR cChar;
                portYIELD_FROM_ISR();\r
        }\r
 }\r
+\r
+\r
+\r