Change interface between the MAC and uIP task in the RX62N/RDK/Renesas demo to use...

[freertos] / Demo / RX600_RX62N-RDK_Renesas / RTOSDemo / webserver / EMAC.c

diff --git a/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/webserver/EMAC.c b/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/webserver/EMAC.c
index 88dd2809496a226ff15b5c4a3bb04d3bac359479..53951cff8419ffd027b8805db4c99f46dc149ff0 100644 (file)
--- a/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/webserver/EMAC.c
+++ b/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/webserver/EMAC.c
@@ -246,23 +246,29 @@ unsigned long ulBytesReceived;
 \r
        if( ulBytesReceived > 0 )\r
        {\r
-               pxCurrentRxDesc->status &= ~( FP1 | FP0 );\r
-               pxCurrentRxDesc->status |= ACT;                 \r
-\r
-               if( EDMAC.EDRRR.LONG == 0x00000000L )\r
-               {\r
-                       /* Restart Ethernet if it has stopped */\r
-                       EDMAC.EDRRR.LONG = 0x00000001L;\r
-               }\r
-\r
                /* Mark the pxDescriptor buffer as free as uip_buf is going to be set to\r
                the buffer that contains the received data. */\r
                prvReturnBuffer( uip_buf );\r
-               \r
+\r
+               /* Point uip_buf to the data about ot be processed. */\r
                uip_buf = ( void * ) pxCurrentRxDesc->buf_p;\r
+               \r
+               /* Allocate a new buffer to the descriptor, as uip_buf is now using it's\r
+               old descriptor. */\r
+               pxCurrentRxDesc->buf_p = prvGetNextBuffer();\r
+\r
+               /* Prepare the descriptor to go again. */\r
+               pxCurrentRxDesc->status &= ~( FP1 | FP0 );\r
+               pxCurrentRxDesc->status |= ACT;\r
 \r
                /* Move onto the next buffer in the ring. */\r
                pxCurrentRxDesc = pxCurrentRxDesc->next;\r
+               \r
+               if( EDMAC.EDRRR.LONG == 0x00000000L )\r
+               {\r
+                       /* Restart Ethernet if it has stopped */\r
+                       EDMAC.EDRRR.LONG = 0x00000001L;\r
+               }\r
        }\r
 \r
        return ulBytesReceived;\r
@@ -504,7 +510,6 @@ static void prvConfigureEtherCAndEDMAC( void )
        /* Set the EDMAC interrupt priority. */\r
        _IPR( _ETHER_EINT ) = configKERNEL_INTERRUPT_PRIORITY;\r
 \r
-       /* TODO:    Check   bit 5   */\r
        /* Enable interrupts of interest only. */\r
        EDMAC.EESIPR.LONG = emacTX_END_INTERRUPT | emacRX_END_INTERRUPT;\r
        ETHERC.RFLR.LONG = 1518;                                        /* Ether payload is 1500+ CRC */\r
@@ -521,7 +526,8 @@ static void prvConfigureEtherCAndEDMAC( void )
        EDMAC.TFTR.LONG = 0x00000000;                           /* Threshold of Tx_FIFO */\r
        EDMAC.FDR.LONG = 0x00000000;                            /* Transmit fifo & receive fifo is 256 bytes */\r
        EDMAC.RMCR.LONG = 0x00000003;                           /* Receive function is normal mode(continued) */\r
-       \r
+       ETHERC.ECMR.BIT.PRM = 0;                                        /* Ensure promiscuous mode is off. */\r
+               \r
        /* Enable the interrupt... */\r
        _IEN( _ETHER_EINT ) = 1;        \r
 }\r
@@ -532,19 +538,14 @@ void vEMAC_ISR_Handler( void )
 {\r
 unsigned long ul = EDMAC.EESR.LONG;\r
 long lHigherPriorityTaskWoken = pdFALSE;\r
-extern xSemaphoreHandle xEMACSemaphore;\r
-static long ulTxEndInts = 0;\r
+extern xQueueHandle xEMACEventQueue;\r
+const unsigned long ulRxEvent = uipETHERNET_RX_EVENT;\r
 \r
        /* Has a Tx end occurred? */\r
        if( ul & emacTX_END_INTERRUPT )\r
        {\r
-               ++ulTxEndInts;\r
-               if( ulTxEndInts >= 2 )\r
-               {\r
-                       /* Only return the buffer to the pool once both Txes have completed. */\r
-                       prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p );\r
-                       ulTxEndInts = 0;\r
-               }\r
+               /* Only return the buffer to the pool once both Txes have completed. */\r
+               prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p );\r
                EDMAC.EESR.LONG = emacTX_END_INTERRUPT;\r
        }\r
 \r
@@ -552,7 +553,7 @@ static long ulTxEndInts = 0;
        if( ul & emacRX_END_INTERRUPT )\r
        {\r
                /* Make sure the Ethernet task is not blocked waiting for a packet. */\r
-               xSemaphoreGiveFromISR( xEMACSemaphore, &lHigherPriorityTaskWoken );\r
+               xQueueSendFromISR( xEMACEventQueue, &ulRxEvent, &lHigherPriorityTaskWoken );\r
                portYIELD_FROM_ISR( lHigherPriorityTaskWoken );\r
                EDMAC.EESR.LONG = emacRX_END_INTERRUPT;\r
        }\r