FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public \r
- License and the FreeRTOS license exception along with FreeRTOS; if not it \r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
by writing to Richard Barry, contact details for whom are available on the\r
FreeRTOS WEB site.\r
\r
licensing and training services.\r
*/\r
\r
-/* \r
+/* ****************************************************************************\r
* This project includes a lot of tasks and tests and is therefore complex.\r
* If you would prefer a much simpler project to get started with then select\r
* the 'Blinky' build configuration within the HEW IDE.\r
+ * ****************************************************************************\r
*\r
* Creates all the demo application tasks, then starts the scheduler. The web\r
* documentation provides more details of the standard demo application tasks,\r
* which provide no particular functionality but do provide a good example of\r
* how to use the FreeRTOS API. The tasks defined in flop.c are included in the\r
* set of standard demo tasks to ensure the floating point unit gets some\r
- * exercise. \r
+ * exercise.\r
*\r
- * In addition to the standard demo tasks, the following tasks and tests are \r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
* defined and/or created within this file:\r
*\r
+ * Webserver ("uIP") task - This serves a number of dynamically generated WEB\r
+ * pages to a standard WEB browser. The IP and MAC addresses are configured by\r
+ * constants defined at the bottom of FreeRTOSConfig.h. Use either a standard\r
+ * Ethernet cable to connect through a hug, or a cross over (point to point)\r
+ * cable to connect directly. Ensure the IP address used is compatible with the\r
+ * IP address of the machine running the browser - the easiest way to achieve\r
+ * this is to ensure the first three octets of the IP addresses are the same.\r
+ *\r
* "Reg test" tasks - These fill the registers with known values, then check\r
* that each register still contains its expected value. Each task uses\r
- * different values. The tasks run with very low priority so get preempted \r
- * very frequently. A check variable is incremented on each iteration of the \r
- * test loop. A register containing an unexpected value is indicative of an \r
- * error in the context switching mechanism and will result in a branch to a \r
+ * different values. The tasks run with very low priority so get preempted\r
+ * very frequently. A check variable is incremented on each iteration of the\r
+ * test loop. A register containing an unexpected value is indicative of an\r
+ * error in the context switching mechanism and will result in a branch to a\r
* null loop - which in turn will prevent the check variable from incrementing\r
* any further and allow the check task (described below) to determine that an\r
- * error has occurred. The nature of the reg test tasks necessitates that they \r
+ * error has occurred. The nature of the reg test tasks necessitates that they\r
* are written in assembly code.\r
*\r
* "Check" task - This only executes every five seconds but has a high priority\r
* rate increasing to 200ms being a visual indication that at least one task has\r
* reported unexpected behaviour.\r
*\r
- * "High frequency timer test" - A high frequency periodic interrupt is \r
- * generated using a timer - the interrupt is assigned a priority above \r
+ * "High frequency timer test" - A high frequency periodic interrupt is\r
+ * generated using a timer - the interrupt is assigned a priority above\r
* configMAX_SYSCALL_INTERRUPT_PRIORITY so should not be effected by anything\r
- * the kernel is doing. The interrupt service routine measures the number of \r
- * counts a separate timer performs between each interrupt to determine the \r
- * jitter in the interrupt timing.\r
+ * the kernel is doing. The frequency and priority of the interrupt, in\r
+ * combination with other standard tests executed in this demo, should result\r
+ * in interrupts nesting at least 3 and probably 4 deep. This test is only\r
+ * included in build configurations that have the optimiser switched on. In\r
+ * optimised builds the count of high frequency ticks is used as the time base\r
+ * for the run time stats.\r
*\r
* *NOTE 1* If LED5 is toggling every 5 seconds then all the demo application\r
- * tasks are executing as expected and no errors have been reported in any \r
+ * tasks are executing as expected and no errors have been reported in any\r
* tasks. The toggle rate increasing to 200ms indicates that at least one task\r
* has reported unexpected behaviour.\r
- * \r
+ *\r
* *NOTE 2* vApplicationSetupTimerInterrupt() is called by the kernel to let\r
* the application set up a timer to generate the tick interrupt. In this\r
- * example a compare match timer is used for this purpose. \r
+ * example a compare match timer is used for this purpose.\r
*\r
* *NOTE 3* The CPU must be in Supervisor mode when the scheduler is started.\r
- * The PowerON_Reset_PC() supplied in resetprg.c with this demo has \r
+ * The PowerON_Reset_PC() supplied in resetprg.c with this demo has\r
* Change_PSW_PM_to_UserMode() commented out to ensure this is the case.\r
*\r
* *NOTE 4* The IntQueue common demo tasks test interrupt nesting and make use\r
*/\r
\r
/* Standard includes. */\r
-#include "string.h"\r
+#include <string.h>\r
+#include <stdio.h>\r
\r
/* Hardware specific includes. */\r
#include "iodefine.h"\r
#include "recmutex.h"\r
#include "flop.h"\r
\r
-/* Values that are passed into the reg test tasks using the task parameter. The \r
+/* Values that are passed into the reg test tasks using the task parameter. The\r
tasks check that the values are passed in correctly. */\r
#define mainREG_TEST_1_PARAMETER ( 0x12121212UL )\r
#define mainREG_TEST_2_PARAMETER ( 0x12345678UL )\r
#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
\r
+/* The WEB server uses string handling functions, which in turn use a bit more\r
+stack than most of the other tasks. */\r
+#define mainuIP_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 )\r
+\r
/* The LED toggled by the check task. */\r
#define mainCHECK_LED ( 5 )\r
\r
#define mainNO_ERROR_CYCLE_TIME ( 5000 / portTICK_RATE_MS )\r
\r
/* The rate at which mainCHECK_LED will toggle when an error has been reported\r
-by at least one task. Controlled by the check task as described at the top of \r
+by at least one task. Controlled by the check task as described at the top of\r
this file. */\r
#define mainERROR_CYCLE_TIME ( 200 / portTICK_RATE_MS )\r
\r
-/* The period of the peripheral clock in nano seconds. This is used to calculate\r
-the jitter time in nano seconds as part of the high frequency timer test. The\r
-clock driving the timer is divided by 8. */\r
-#define mainNS_PER_CLOCK ( ( unsigned long ) ( ( 1.0 / ( ( double ) configPERIPHERAL_CLOCK_HZ ) / 8.0 ) * 1000000000.0 ) )\r
\r
/*\r
* vApplicationMallocFailedHook() will only be called if\r
* function that will execute if a call to pvPortMalloc() fails.\r
* pvPortMalloc() is called internally by the kernel whenever a task, queue or\r
* semaphore is created. It is also called by various parts of the demo\r
- * application. \r
+ * application.\r
*/\r
void vApplicationMallocFailedHook( void );\r
\r
void vApplicationIdleHook( void );\r
\r
/*\r
- * vApplicationStackOverflowHook() will only be called if \r
- * configCHECK_FOR_STACK_OVERFLOW is set to a non-zero value. The handle and \r
+ * vApplicationStackOverflowHook() will only be called if\r
+ * configCHECK_FOR_STACK_OVERFLOW is set to a non-zero value. The handle and\r
* name of the offending task should be passed in the function parameters, but\r
* it is possible that the stack overflow will have corrupted these - in which\r
* case pxCurrentTCB can be inspected to find the same information.\r
* The actual implementation of the reg test functionality, which, because of\r
* the direct register access, have to be in assembly.\r
*/\r
-extern void prvRegTest1Implementation( void );\r
-extern void prvRegTest2Implementation( void );\r
+static void prvRegTest1Implementation( void ) __attribute__((naked));\r
+static void prvRegTest2Implementation( void ) __attribute__((naked));\r
\r
\r
/*\r
*/\r
static void prvCheckTask( void *pvParameters );\r
\r
-/* Variables that are incremented on each iteration of the reg test tasks - \r
+/*\r
+ * Contains the implementation of the WEB server.\r
+ */\r
+extern void vuIP_Task( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Variables that are incremented on each iteration of the reg test tasks -\r
provided the tasks have not reported any errors. The check task inspects these\r
-variables to ensure they are still incrementing as expected. If a variable \r
+variables to ensure they are still incrementing as expected. If a variable\r
stops incrementing then it is likely that its associate task has stalled. */\r
unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL;\r
\r
+/* The status message that is displayed at the bottom of the "task stats" web\r
+page, which is served by the uIP task. This will report any errors picked up\r
+by the reg test task. */\r
+static const char *pcStatusMessage = NULL;\r
+\r
/*-----------------------------------------------------------*/\r
\r
void main(void)\r
xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL );\r
xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL );\r
\r
+ /* The web server task. */\r
+// xTaskCreate( vuIP_Task, "uIP", mainuIP_STACK_SIZE, NULL, mainuIP_TASK_PRIORITY, NULL );\r
+\r
/* Start the check task as described at the top of this file. */\r
xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE * 3, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
\r
\r
/* Start the tasks running. */\r
vTaskStartScheduler();\r
- \r
+\r
/* If all is well we will never reach here as the scheduler will now be\r
running. If we do reach here then it is likely that there was insufficient\r
heap available for the idle task to be created. */\r
static volatile unsigned long ulLastRegTest1CycleCount = 0UL, ulLastRegTest2CycleCount = 0UL;\r
portTickType xNextWakeTime, xCycleFrequency = mainNO_ERROR_CYCLE_TIME;\r
extern void vSetupHighFrequencyTimer( void );\r
-extern volatile unsigned short usMaxJitter;\r
-volatile unsigned long ulActualJitter = 0;\r
-static char cErrorText[ 100 ];\r
\r
/* If this is being executed then the kernel has been started. Start the high\r
- frequency timer test as described at the top of this file. This is only \r
+ frequency timer test as described at the top of this file. This is only\r
included in the optimised build configuration - otherwise it takes up too much\r
CPU time. */\r
#ifdef INCLUDE_HIGH_FREQUENCY_TIMER_TEST\r
/* Increase the rate at which this task cycles, which will increase the\r
rate at which mainCHECK_LED flashes to give visual feedback that an error\r
has occurred. */\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: GenQueue" );\r
+ pcStatusMessage = "Error: GenQueue";\r
}\r
else if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: QueuePeek" );\r
+ pcStatusMessage = "Error: QueuePeek\r\n";\r
}\r
else if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: BlockQueue" );\r
+ pcStatusMessage = "Error: BlockQueue\r\n";\r
}\r
else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: BlockTime" );\r
+ pcStatusMessage = "Error: BlockTime\r\n";\r
}\r
else if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: SemTest" );\r
+ pcStatusMessage = "Error: SemTest\r\n";\r
}\r
else if( xArePollingQueuesStillRunning() != pdTRUE )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: PollQueue" );\r
+ pcStatusMessage = "Error: PollQueue\r\n";\r
}\r
else if( xIsCreateTaskStillRunning() != pdTRUE )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: Death" );\r
+ pcStatusMessage = "Error: Death\r\n";\r
}\r
else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: IntMath" );\r
+ pcStatusMessage = "Error: IntMath\r\n";\r
}\r
else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: RecMutex" );\r
+ pcStatusMessage = "Error: RecMutex\r\n";\r
}\r
else if( xAreIntQueueTasksStillRunning() != pdPASS )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: IntQueue" );\r
+ pcStatusMessage = "Error: IntQueue\r\n";\r
}\r
else if( xAreMathsTaskStillRunning() != pdPASS )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: Flop" );\r
+ pcStatusMessage = "Error: Flop\r\n";\r
}\r
\r
/* Check the reg test tasks are still cycling. They will stop incrementing\r
their loop counters if they encounter an error. */\r
if( ulRegTest1CycleCount == ulLastRegTest1CycleCount )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: RegTest1" );\r
+ pcStatusMessage = "Error: RegTest1\r\n";\r
}\r
\r
if( ulRegTest2CycleCount == ulLastRegTest2CycleCount )\r
{\r
- xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: RegTest2" );\r
+ pcStatusMessage = "Error: RegTest2\r\n";\r
}\r
- \r
+\r
ulLastRegTest1CycleCount = ulRegTest1CycleCount;\r
ulLastRegTest2CycleCount = ulRegTest2CycleCount;\r
- \r
- /* Toggle the check LED to give an indication of the system status. If \r
- the LED toggles every 5 seconds then everything is ok. A faster toggle \r
+\r
+ /* Toggle the check LED to give an indication of the system status. If\r
+ the LED toggles every 5 seconds then everything is ok. A faster toggle\r
indicates an error. */\r
vParTestToggleLED( mainCHECK_LED );\r
- \r
- /* Calculate the maximum jitter experienced by the high frequency timer \r
- test and print it out. It is ok to use printf without worrying about \r
- mutual exclusion as it is not used anywhere else in this demo. */\r
- //sprintf( cTempBuf, "%s [%fns]\n", "Max Jitter = ", ( ( float ) usMaxJitter ) * mainNS_PER_CLOCK );\r
- ulActualJitter = ( ( unsigned long ) usMaxJitter ) * mainNS_PER_CLOCK;\r
- \r
- if( xCycleFrequency == mainERROR_CYCLE_TIME )\r
+\r
+ /* Ensure the LED toggles at a faster rate if an error has occurred. */\r
+ if( pcStatusMessage != NULL )\r
{\r
- /* Just for break point. */\r
- portNOP();\r
+ xCycleFrequency = mainERROR_CYCLE_TIME;\r
}\r
}\r
}\r
/*-----------------------------------------------------------*/\r
\r
-/* The RX port uses this callback function to configure its tick interrupt. \r
+/* The RX port uses this callback function to configure its tick interrupt.\r
This allows the application to choose the tick interrupt source. */\r
void vApplicationSetupTimerInterrupt( void )\r
{\r
/* Enable compare match timer 0. */\r
MSTP( CMT0 ) = 0;\r
- \r
+\r
/* Interrupt on compare match. */\r
CMT0.CMCR.BIT.CMIE = 1;\r
- \r
+\r
/* Set the compare match value. */\r
CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 );\r
- \r
+\r
/* Divide the PCLK by 8. */\r
CMT0.CMCR.BIT.CKS = 0;\r
- \r
+\r
/* Enable the interrupt... */\r
_IEN( _CMT0_CMI0 ) = 1;\r
- \r
+\r
/* ...and set its priority to the application defined kernel priority. */\r
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;\r
- \r
+\r
/* Start the timer. */\r
CMT.CMSTR0.BIT.STR0 = 1;\r
}\r
of this file. */\r
void vApplicationIdleHook( void )\r
{\r
-static volatile unsigned long ulIdleLoopCount = 0UL;\r
-\r
- ulIdleLoopCount++;\r
}\r
/*-----------------------------------------------------------*/\r
\r
taskDISABLE_INTERRUPTS();\r
}\r
}\r
- \r
+\r
/* This is an asm function that never returns. */\r
- prvRegTest1Implementation(); \r
+ prvRegTest1Implementation();\r
}\r
/*-----------------------------------------------------------*/\r
\r
}\r
/*-----------------------------------------------------------*/\r
\r
+char *pcGetTaskStatusMessage( void )\r
+{\r
+ /* Not bothered about a critical section here although technically because of\r
+ the task priorities the pointer could change it will be atomic if not near\r
+ atomic and its not critical. */\r
+ if( pcStatusMessage == NULL )\r
+ {\r
+ return "All tasks running without error";\r
+ }\r
+ else\r
+ {\r
+ return ( char * ) pcStatusMessage;\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
\r
+/* This function is explained in the comments at the top of this file. */\r
+static void prvRegTest1Implementation( void )\r
+{\r
+ __asm volatile\r
+ (\r
+ /* Put a known value in each register. */\r
+ "MOV #1, R1 \n" \\r
+ "MOV #2, R2 \n" \\r
+ "MOV #3, R3 \n" \\r
+ "MOV #4, R4 \n" \\r
+ "MOV #5, R5 \n" \\r
+ "MOV #6, R6 \n" \\r
+ "MOV #7, R7 \n" \\r
+ "MOV #8, R8 \n" \\r
+ "MOV #9, R9 \n" \\r
+ "MOV #10, R10 \n" \\r
+ "MOV #11, R11 \n" \\r
+ "MOV #12, R12 \n" \\r
+ "MOV #13, R13 \n" \\r
+ "MOV #14, R14 \n" \\r
+ "MOV #15, R15 \n" \\r
+ \r
+ /* Loop, checking each itteration that each register still contains the\r
+ expected value. */\r
+ "TestLoop1: \n" \\r
+\r
+ /* Push the registers that are going to get clobbered. */\r
+ "PUSHM R14-R15 \n" \\r
+ \r
+ /* Increment the loop counter to show this task is still getting CPU time. */\r
+ "MOV #_ulRegTest1CycleCount, R14 \n" \\r
+ "MOV [ R14 ], R15 \n" \\r
+ "ADD #1, R15 \n" \\r
+ "MOV R15, [ R14 ] \n" \\r
+ \r
+ /* Yield to extend the test coverage. Set the bit in the ITU SWINTR register. */\r
+ "MOV #1, R14 \n" \\r
+ "MOV #0872E0H, R15 \n" \\r
+ "MOV.B R14, [R15] \n" \\r
+ "NOP \n" \\r
+ "NOP \n" \\r
+ \r
+ /* Restore the clobbered registers. */\r
+ "POPM R14-R15 \n" \\r
+ \r
+ /* Now compare each register to ensure it still contains the value that was\r
+ set before this loop was entered. */\r
+ "CMP #1, R1 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #2, R2 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #3, R3 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #4, R4 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #5, R5 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #6, R6 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #7, R7 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #8, R8 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #9, R9 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #10, R10 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #11, R11 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #12, R12 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #13, R13 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #14, R14 \n" \\r
+ "BNE RegTest1Error \n" \\r
+ "CMP #15, R15 \n" \\r
+ "BNE RegTest1Error \n" \\r
+\r
+ /* All comparisons passed, start a new itteratio of this loop. */\r
+ "BRA TestLoop1 \n" \\r
+ \r
+ "RegTest1Error: \n" \\r
+ /* A compare failed, just loop here so the loop counter stops incrementing\r
+ - causing the check task to indicate the error. */\r
+ "BRA RegTest1Error "\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
\r
-\r
+/* This function is explained in the comments at the top of this file. */\r
+static void prvRegTest2Implementation( void )\r
+{\r
+ __asm volatile\r
+ (\r
+ /* Put a known value in each register. */\r
+ "MOV #10H, R1 \n" \\r
+ "MOV #20H, R2 \n" \\r
+ "MOV #30H, R3 \n" \\r
+ "MOV #40H, R4 \n" \\r
+ "MOV #50H, R5 \n" \\r
+ "MOV #60H, R6 \n" \\r
+ "MOV #70H, R7 \n" \\r
+ "MOV #80H, R8 \n" \\r
+ "MOV #90H, R9 \n" \\r
+ "MOV #100H, R10 \n" \\r
+ "MOV #110H, R11 \n" \\r
+ "MOV #120H, R12 \n" \\r
+ "MOV #130H, R13 \n" \\r
+ "MOV #140H, R14 \n" \\r
+ "MOV #150H, R15 \n" \\r
+ \r
+ /* Loop, checking each itteration that each register still contains the\r
+ expected value. */\r
+ "TestLoop2: \n" \\r
+\r
+ /* Push the registers that are going to get clobbered. */\r
+ "PUSHM R14-R15 \n" \\r
+ \r
+ /* Increment the loop counter to show this task is still getting CPU time. */\r
+ "MOV #_ulRegTest2CycleCount, R14 \n" \\r
+ "MOV [ R14 ], R15 \n" \\r
+ "ADD #1, R15 \n" \\r
+ "MOV R15, [ R14 ] \n" \\r
+ \r
+ /* Restore the clobbered registers. */\r
+ "POPM R14-R15 \n" \\r
+ \r
+ /* Now compare each register to ensure it still contains the value that was\r
+ set before this loop was entered. */\r
+ "CMP #10H, R1 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #20H, R2 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #30H, R3 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #40H, R4 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #50H, R5 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #60H, R6 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #70H, R7 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #80H, R8 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #90H, R9 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #100H, R10 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #110H, R11 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #120H, R12 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #130H, R13 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #140H, R14 \n" \\r
+ "BNE RegTest2Error \n" \\r
+ "CMP #150H, R15 \n" \\r
+ "BNE RegTest2Error \n" \\r
+\r
+ /* All comparisons passed, start a new itteratio of this loop. */\r
+ "BRA TestLoop2 \n" \\r
+ \r
+ "RegTest2Error: \n" \\r
+ /* A compare failed, just loop here so the loop counter stops incrementing\r
+ - causing the check task to indicate the error. */\r
+ "BRA RegTest2Error "\r
+ );\r
+}\r
\r