--- /dev/null
+/******************************************************************************\r
+ * AVR32 AT32UC3A1256 XLINK command file for AVR32 IAR C/C++ Compiler.\r
+ *\r
+ * The assumed memory layout is the one of the AT32UC3A1256:\r
+ *\r
+ * Start Stop Name Type\r
+ * ---------- ---------- ----- --------------\r
+ * 0x00000000 0x0000FFFF SRAM RAM\r
+ * 0x80000000 0x8003FFFF FLASH FLASH\r
+ *\r
+ * Usage: xlink your_file(s) -f xcl-file libraries\r
+ *\r
+ * - Compiler: IAR EWAVR32\r
+ * - Supported devices: AVR32 AT32UC3A1256\r
+ *\r
+ * - author Atmel Corporation: http://www.atmel.com \n\r
+ * Support and FAQ: http://support.atmel.no/\r
+ *\r
+ ******************************************************************************/\r
+\r
+/* Copyright (c) 2007, Atmel Corporation All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of ATMEL may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND\r
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,\r
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\r
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\r
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\r
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF\r
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+\r
+/************************************************************************/\r
+/* The following segments are defined in this link file: */\r
+/* */\r
+/* Code segments */\r
+/* CODE32 -- Program code used by __code32 functions. */\r
+/* RESET -- Reset code. */\r
+/* EVSEG -- Exception vector handlers. */\r
+/* */\r
+/* Constant segments */\r
+/* INITTAB -- Segment initializer table. */\r
+/* DIFUNCT -- Dynamic initialization vector used by C++. */\r
+/* SWITCH -- Switch tables. */\r
+/* ACTAB -- Table of pointers to acall functions. */\r
+/* */\r
+/* DATA21_ID -- Initialization data for DATA21_I. */\r
+/* DATA32_ID -- Initialization data for DATA32_I. */\r
+/* DATA32_C -- Constant __data32 data. */\r
+/* */\r
+/* CHECKSUM -- Checksum segment. */\r
+/* */\r
+/* Data segments */\r
+/* DATA21_I -- Initialized __data21 data with non-zero */\r
+/* initial value. */\r
+/* DATA32_I -- Initialized __data32 data with non-zero */\r
+/* initial value. */\r
+/* DATA21_Z -- Initialized __data21 data with zero initial value. */\r
+/* DATA32_Z -- Initialized __data32 data with zero initial value. */\r
+/* DATA21_N -- Non-initialized __data21. */\r
+/* DATA32_N -- Non-initialized __data32. */\r
+/* SSTACK -- The system stack. */\r
+/* CSTACK -- The application stack. */\r
+/* HEAP -- The heap used by malloc and free. */\r
+/* */\r
+/************************************************************************/\r
+\r
+/************************************************************************/\r
+/* Define CPU */\r
+/************************************************************************/\r
+\r
+-cavr32\r
+\r
+// Declare the IPR0 memory location\r
+-DIPR0=FFFF0800\r
+\r
+/************************************************************************/\r
+/* Reset code is located at address 0x80000000 and up. */\r
+/************************************************************************/\r
+\r
+-Z(CODE)RESET=80000000-8003FFFF\r
+\r
+/************************************************************************/\r
+/* The exception handler code is located at address 0x80000000 */\r
+/* and up. Make sure that the exception table gets properly */\r
+/* allocated. By using the special -Z@ allocation primitive, the */\r
+/* placement is guaranteed to be at _EVBASE and onwards. */\r
+/************************************************************************/\r
+\r
+-Z@(CODE)EVTAB=80004000-8003FFFF\r
+-Z@(CODE)EV100=80004100-8003FFFF\r
+-P(CODE)EVSEG=80004000-8003FFFF\r
+\r
+/************************************************************************/\r
+/* Allocate code and const segments. */\r
+/************************************************************************/\r
+\r
+-P(CODE)CODE32=80000000-8003FFFF\r
+-P(CONST)DATA32_C=80000000-8003FFFF\r
+\r
+// Initializers\r
+-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF\r
+-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF\r
+-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF\r
+\r
+-Z(CONST)ACTAB,HTAB=80000000-8003FFFF\r
+\r
+/************************************************************************/\r
+/* Allocate the read/write segments that are mapped to RAM. */\r
+/************************************************************************/\r
+\r
+-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF\r
+-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF\r
+-Z(DATA)TRACEBUFFER=00000004-0000FFFF\r
+\r
+-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF\r
+-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF\r
+-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF\r
+\r
+/************************************************************************/\r
+/* End of File */\r
+/************************************************************************/\r
projects / freertos / blobdiff