-//*----------------------------------------------------------------------------\r
-//* ATMEL Microcontroller Software Support - ROUSSET -\r
-//*----------------------------------------------------------------------------\r
-//* The software is delivered "AS IS" without warranty or condition of any\r
-//* kind, either express, implied or statutory. This includes without\r
-//* limitation any warranty or condition with respect to merchantability or\r
-//* fitness for any particular purpose, or against the infringements of\r
-//* intellectual property rights of others.\r
-//*----------------------------------------------------------------------------\r
-//* File Name : Cstartup_SAM7.c\r
-//* Object : Low level initializations written in C for IAR\r
-//* tools\r
-//* 1.0 08/Sep/04 JPP : Creation\r
-//* 1.10 10/Sep/04 JPP : Update AT91C_CKGR_PLLCOUNT filed\r
-//*----------------------------------------------------------------------------\r
+//-----------------------------------------------------------------------------\r
+// ATMEL Microcontroller Software Support - ROUSSET -\r
+//-----------------------------------------------------------------------------\r
+// DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+//-----------------------------------------------------------------------------\r
+// File Name : Cstartup_SAM7.c\r
+// Object : Low level initialisations written in C for Tools\r
+// For AT91SAM7X256 with 2 flash plane\r
+// Creation : JPP 14-Sep-2006\r
+//-----------------------------------------------------------------------------\r
\r
\r
-// Include the board file description\r
#include "Board.h"\r
-//#include "init.h"\r
-#include <string.h>\r
-\r
-// The following functions must be write in ARM mode this function called directly\r
-// by exception vector\r
+// The following functions must be write in ARM mode this function called\r
+// directly by exception vector\r
extern void AT91F_Spurious_handler(void);\r
extern void AT91F_Default_IRQ_handler(void);\r
extern void AT91F_Default_FIQ_handler(void);\r
\r
-\r
//*----------------------------------------------------------------------------\r
//* \fn AT91F_LowLevelInit\r
//* \brief This function performs very low level HW initialization\r
-//* this function can be use a Stack, depending the compilation\r
+//* this function can use a Stack, depending the compilation\r
//* optimization mode\r
//*----------------------------------------------------------------------------\r
-void AT91F_LowLevelInit( void);\r
-void AT91F_LowLevelInit( void ) @ "ICODE"\r
+void AT91F_LowLevelInit(void) @ "ICODE"\r
{\r
- int i;\r
- AT91PS_PMC pPMC = AT91C_BASE_PMC;\r
+ unsigned char i;\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ // EFC Init\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS ;\r
\r
- //* Set Flash Waite sate\r
- // Single Cycle Access at Up to 30 MHz, or 40\r
- // if MCK = 47923200 I have 50 Cycle for 1 useconde ( flied MC_FMR->FMCN\r
- AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN)&(75 <<16)) | AT91C_MC_FWS_1FWS ;\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ // Init PMC Step 1. Enable Main Oscillator\r
+ // Main Oscillator startup time is board specific:\r
+ // Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms\r
+ // (0x40 for AT91C_CKGR_OSCOUNT field)\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));\r
+ // Wait Main Oscillator stabilization\r
+ while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));\r
\r
- //* Watchdog Disable\r
- AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ // Init PMC Step 2.\r
+ // Set PLL to 96MHz (96,109MHz) and UDP Clock to 48MHz\r
+ // PLL Startup time depends on PLL RC filter: worst case is choosen\r
+ // UDP Clock (48,058MHz) is compliant with the Universal Serial Bus\r
+ // Specification (+/- 0.25% for full speed)\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ AT91C_BASE_PMC->PMC_PLLR = AT91C_CKGR_USBDIV_1 |\r
+ (16 << 8) |\r
+ (AT91C_CKGR_MUL & (72 << 16)) |\r
+ (AT91C_CKGR_DIV & 14);\r
+ // Wait for PLL stabilization\r
+ while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) );\r
+ // Wait until the master clock is established for the case we already\r
+ // turn on the PLL\r
+ while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );\r
\r
- \r
- // If we are running off a j-link then the PLL will have already been setup.\r
- if( !( pPMC->PMC_MCKR & AT91C_PMC_CSS_PLL_CLK ) )\r
- {\r
- //* Set MCK at 47 923 200\r
- // 1 Enabling the Main Oscillator:\r
- // SCK = 1/32768 = 30.51 uSeconde\r
- // Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms\r
- pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | AT91C_CKGR_MOSCEN ));\r
- // Wait the startup time\r
- while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));\r
- // 2 Checking the Main Oscillator Frequency (Optional)\r
- // 3 Setting PLL and divider:\r
- // - div by 5 Fin = 3,6864 =(18,432 / 5)\r
- // - Mul 25+1: Fout = 95,8464 =(3,6864 *26)\r
- // for 96 MHz the erroe is 0.16%\r
- //eld out NOT USED = 0 Fi\r
- pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 5) |\r
- (AT91C_CKGR_PLLCOUNT & (28<<8)) |\r
- (AT91C_CKGR_MUL & (25<<16)));\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ // Init PMC Step 3.\r
+ // Selection of Master Clock MCK equal to (Processor Clock PCK) PLL/2=48MHz\r
+ // The PMC_MCKR register must not be programmed in a single write operation\r
+ // (see. Product Errata Sheet)\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;\r
+ // Wait until the master clock is established\r
+ while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );\r
\r
- // Wait the startup time\r
- while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));\r
- // 4. Selection of Master Clock and Processor Clock\r
- // select the PLL clock divided by 2\r
+ AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;\r
+ // Wait until the master clock is established\r
+ while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );\r
\r
- pPMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 ;\r
- while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ // Disable Watchdog (write once register)\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;\r
\r
- \r
- pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK ;\r
- while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));\r
- } \r
- \r
- // Set up the default interrupts handler vectors\r
- AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;\r
- for (i=1;i < 31; i++)\r
- {\r
- AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;\r
- }\r
- AT91C_BASE_AIC->AIC_SPU = (int) AT91F_Spurious_handler ;\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ // Init AIC: assign corresponding handler for each interrupt source\r
+ ///////////////////////////////////////////////////////////////////////////\r
+ AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;\r
+ for (i = 1; i < 31; i++) {\r
+ AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;\r
+ }\r
+ AT91C_BASE_AIC->AIC_SPU = (unsigned int) AT91F_Spurious_handler;\r
}\r
-\r
-\r
-\r
projects / freertos / blobdiff