]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c
Add in the CORTEX_A53_64-bit_UltraScale_MPSoC demo application (a demo has been inclu...
[freertos] / FreeRTOS / Demo / CORTEX_A53_64-bit_UltraScale_MPSoC / RTOSDemo_A53 / src / FreeRTOS_tick_config.c
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c
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+/*\r
+    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+    All rights reserved\r
+\r
+    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
+\r
+    ***************************************************************************\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
+    ***************************************************************************\r
+\r
+    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+    FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
+    link: http://www.freertos.org/a00114.html\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS provides completely free yet professionally developed,    *\r
+     *    robust, strictly quality controlled, supported, and cross          *\r
+     *    platform software that is more than just the market leader, it     *\r
+     *    is the industry's de facto standard.                               *\r
+     *                                                                       *\r
+     *    Help yourself get started quickly while simultaneously helping     *\r
+     *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
+     *    tutorial book, reference manual, or both:                          *\r
+     *    http://www.FreeRTOS.org/Documentation                              *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
+    the FAQ page "My application does not run, what could be wrong?".  Have you\r
+    defined configASSERT()?\r
+\r
+    http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+    embedded software for free we request you assist our global community by\r
+    participating in the support forum.\r
+\r
+    http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+    be as productive as possible as early as possible.  Now you can receive\r
+    FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+    Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+    http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+    Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+    http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+    Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
+    licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+    engineered and independently SIL3 certified version for use in safety and\r
+    mission critical applications that require provable dependability.\r
+\r
+    1 tab == 4 spaces!\r
+*/\r
+\r
+/* FreeRTOS includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Xilinx includes. */\r
+#include "platform.h"\r
+#include "xttcps.h"\r
+#include "xscugic.h"\r
+\r
+/* Timer used to generate the tick interrupt. */\r
+static XTtcPs xRTOSTickTimerInstance;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vConfigureTickInterrupt( void )\r
+{\r
+BaseType_t xStatus;\r
+XTtcPs_Config *pxTimerConfiguration;\r
+uint16_t usInterval;\r
+uint8_t ucPrescale;\r
+const uint8_t ucLevelSensitive = 1;\r
+extern XScuGic xInterruptController;\r
+\r
+       pxTimerConfiguration = XTtcPs_LookupConfig( XPAR_XTTCPS_3_DEVICE_ID );\r
+\r
+       /* Initialise the device. */\r
+       xStatus = XTtcPs_CfgInitialize( &xRTOSTickTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress );\r
+\r
+       if( xStatus != XST_SUCCESS )\r
+       {\r
+               /* Not sure how to do this before XTtcPs_CfgInitialize is called as\r
+               *xRTOSTickTimerInstance is set within XTtcPs_CfgInitialize(). */\r
+               XTtcPs_Stop( &xRTOSTickTimerInstance );\r
+               xStatus = XTtcPs_CfgInitialize( &xRTOSTickTimerInstance, pxTimerConfiguration, pxTimerConfiguration->BaseAddress );\r
+               configASSERT( xStatus == XST_SUCCESS );\r
+       }\r
+\r
+       /* Set the options. */\r
+       XTtcPs_SetOptions( &xRTOSTickTimerInstance, ( XTTCPS_OPTION_INTERVAL_MODE | XTTCPS_OPTION_WAVE_DISABLE ) );\r
+\r
+       /* Derive values from the tick rate. */\r
+       XTtcPs_CalcIntervalFromFreq( &xRTOSTickTimerInstance, configTICK_RATE_HZ, &( usInterval ), &( ucPrescale ) );\r
+\r
+       /* Set the interval and prescale. */\r
+       XTtcPs_SetInterval( &xRTOSTickTimerInstance, usInterval );\r
+       XTtcPs_SetPrescaler( &xRTOSTickTimerInstance, ucPrescale );\r
+\r
+       /* The priority must be the lowest possible. */\r
+       XScuGic_SetPriorityTriggerType( &xInterruptController, XPAR_XTTCPS_3_INTR, portLOWEST_USABLE_INTERRUPT_PRIORITY << portPRIORITY_SHIFT, ucLevelSensitive );\r
+\r
+       /* Connect to the interrupt controller. */\r
+       xStatus = XScuGic_Connect( &xInterruptController, XPAR_XTTCPS_3_INTR, (Xil_ExceptionHandler) FreeRTOS_Tick_Handler, ( void * ) &xRTOSTickTimerInstance );\r
+       configASSERT( xStatus == XST_SUCCESS);\r
+\r
+       /* Enable the interrupt in the GIC. */\r
+       XScuGic_Enable( &xInterruptController, XPAR_XTTCPS_3_INTR );\r
+\r
+       /* Enable the interrupts in the timer. */\r
+       XTtcPs_EnableInterrupts( &xRTOSTickTimerInstance, XTTCPS_IXR_INTERVAL_MASK );\r
+\r
+       /* Start the timer. */\r
+       XTtcPs_Start( &xRTOSTickTimerInstance );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vClearTickInterrupt( void )\r
+{\r
+volatile uint32_t ulInterruptStatus;\r
+\r
+       /* Read the interrupt status, then write it back to clear the interrupt. */\r
+       ulInterruptStatus = XTtcPs_GetInterruptStatus( &xRTOSTickTimerInstance );\r
+       XTtcPs_ClearInterruptStatus( &xRTOSTickTimerInstance, ulInterruptStatus );\r
+       __asm volatile( "DSB SY" );\r
+       __asm volatile( "ISB SY" );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationIRQHandler( uint32_t ulICCIAR )\r
+{\r
+extern const XScuGic_Config XScuGic_ConfigTable[];\r
+static const XScuGic_VectorTableEntry *pxVectorTable = XScuGic_ConfigTable[ XPAR_SCUGIC_SINGLE_DEVICE_ID ].HandlerTable;\r
+uint32_t ulInterruptID;\r
+const XScuGic_VectorTableEntry *pxVectorEntry;\r
+\r
+       /* Interrupts cannot be re-enabled until the source of the interrupt is\r
+       cleared. The ID of the interrupt is obtained by bitwise ANDing the ICCIAR\r
+       value with 0x3FF. */\r
+       ulInterruptID = ulICCIAR & 0x3FFUL;\r
+       if( ulInterruptID < XSCUGIC_MAX_NUM_INTR_INPUTS )\r
+       {\r
+               /* Call the function installed in the array of installed handler\r
+               functions. */\r
+               pxVectorEntry = &( pxVectorTable[ ulInterruptID ] );\r
+               configASSERT( pxVectorEntry );\r
+               pxVectorEntry->Handler( pxVectorEntry->CallBackRef );\r
+       }\r
+}\r
+\r
+\r
+\r