Update the Xilinx UltraScale+ 64-bit demo to use the hardware definition and BSP...

[freertos] / FreeRTOS / Demo / CORTEX_A53_64-bit_UltraScale_MPSoC / RTOSDemo_A53_bsp / psu_cortexa53_0 / libsrc / wdtps_v3_0 / src / xwdtps.c

diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53_bsp/psu_cortexa53_0/libsrc/wdtps_v3_0/src/xwdtps.c b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53_bsp/psu_cortexa53_0/libsrc/wdtps_v3_0/src/xwdtps.c
index 1a3eb0834790bc1240291de148e9ec8affa22a41..fc5db32fe586c8eeb1030abec952d9002bc24b87 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53_bsp/psu_cortexa53_0/libsrc/wdtps_v3_0/src/xwdtps.c
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53_bsp/psu_cortexa53_0/libsrc/wdtps_v3_0/src/xwdtps.c
@@ -33,6 +33,8 @@
 /**
 *
 * @file xwdtps.c
+* @addtogroup wdtps_v3_0
+* @{
 *
 * Contains the implementation of interface functions of the XWdtPs driver.
 * See xwdtps.h for a description of the driver.
@@ -481,3 +483,4 @@ void XWdtPs_SetControlValue(XWdtPs *InstancePtr, u8 Control, u32 Value)
        XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_CCR_OFFSET,
                          Register);
 }
+/** @} */