/*\r
- FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
\r
+ ***************************************************************************\r
>>! NOTE: The modification to the GPL is included to allow you to !<<\r
>>! distribute a combined work that includes FreeRTOS without being !<<\r
>>! obliged to provide the source code for proprietary components !<<\r
>>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
link: http://www.freertos.org/a00114.html\r
\r
- 1 tab == 4 spaces!\r
-\r
***************************************************************************\r
* *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
* *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
* *\r
***************************************************************************\r
\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
\r
http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
engineered and independently SIL3 certified version for use in safety and\r
* In addition to the standard demo tasks, the following tasks and tests are\r
* defined and/or created within this file:\r
*\r
- * FreeRTOS+CLI command console. The command console is access through the\r
- * UART to USB connector on the _RB_. For\r
- * reasons of robustness testing the UART driver is deliberately written to be\r
- * inefficient and should not be used as a template for a production driver.\r
- * Type "help" to see a list of registered commands. The FreeRTOS+CLI license\r
- * is different to the FreeRTOS license, see http://www.FreeRTOS.org/cli for\r
- * license and usage details. The default baud rate is 115200.\r
+ * "FreeRTOS+CLI command console" - The command console is access using the USB\r
+ * CDC driver provided by Atmel. It is accessed through the USB connector\r
+ * marked J6 SAMA5D3 Xplained board. Type "help" to see a list of registered\r
+ * commands. The FreeRTOS+CLI license is different to the FreeRTOS license, see\r
+ * http://www.FreeRTOS.org/cli for license and usage details. The default baud\r
+ * rate is 115200.\r
*\r
* "Reg test" tasks - These fill both the core and floating point registers with\r
* known values, then check that each register maintains its expected value for\r
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )\r
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
-#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL )\r
+#define mainCDC_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2UL )\r
#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )\r
#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY )\r
\r
-/* The priority used by the UART command console task. */\r
+/* The initial priority used by the UART command console task. */\r
#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )\r
\r
-/* The LED used by the check timer. */\r
+/* The LED used by the check task. */\r
#define mainCHECK_LED ( 0 )\r
\r
/* A block time of zero simply means "don't block". */\r
#define mainDONT_BLOCK ( 0UL )\r
\r
-/* The period after which the check timer will expire, in ms, provided no errors\r
-have been reported by any of the standard demo tasks. ms are converted to the\r
-equivalent in ticks using the portTICK_PERIOD_MS constant. */\r
-#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_PERIOD_MS )\r
+/* The period of the check task, in ms, provided no errors have been reported by\r
+any of the standard demo tasks. ms are converted to the equivalent in ticks\r
+using the pdMS_TO_TICKS() macro constant. */\r
+#define mainNO_ERROR_CHECK_TASK_PERIOD pdMS_TO_TICKS( 3000UL )\r
\r
-/* The period at which the check timer will expire, in ms, if an error has been\r
-reported in one of the standard demo tasks. ms are converted to the equivalent\r
-in ticks using the portTICK_PERIOD_MS constant. */\r
-#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_PERIOD_MS )\r
+/* The period of the check task, in ms, if an error has been reported in one of\r
+the standard demo tasks. ms are converted to the equivalent in ticks using the\r
+pdMS_TO_TICKS() macro. */\r
+#define mainERROR_CHECK_TASK_PERIOD pdMS_TO_TICKS( 200UL )\r
\r
/* Parameters that are passed into the register check tasks solely for the\r
purpose of ensuring parameters are passed into tasks correctly. */\r
/*\r
* The task that manages the FreeRTOS+CLI input and output.\r
*/\r
-extern void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );\r
+extern void vUSBCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority );\r
\r
/*\r
* A high priority task that does nothing other than execute at a pseudo random\r
\r
/* The following two variables are used to communicate the status of the\r
register check tasks to the check task. If the variables keep incrementing,\r
-then the register check tasks has not discovered any errors. If a variable\r
+then the register check tasks have not discovered any errors. If a variable\r
stops incrementing, then an error has been found. */\r
volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
\r
/*-----------------------------------------------------------*/\r
-#warning Check demo and source folders for _RB_\r
+\r
void main_full( void )\r
{\r
- /* Start all the other standard demo/test tasks. They have not particular\r
+ /* Start all the other standard demo/test tasks. They have no particular\r
functionality, but do demonstrate how to use the FreeRTOS API and test the\r
kernel port. */\r
-//_RB_ vStartInterruptQueueTasks();\r
+ vStartInterruptQueueTasks();\r
vStartDynamicPriorityTasks();\r
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
vCreateBlockTimeTasks();\r
\r
/* Start the tasks that implements the command console on the UART, as\r
described above. */\r
-//_RB_ vUARTCommandConsoleStart( mainUART_COMMAND_CONSOLE_STACK_SIZE, mainUART_COMMAND_CONSOLE_TASK_PRIORITY );\r
+ vUSBCommandConsoleStart( mainCDC_COMMAND_CONSOLE_STACK_SIZE, mainUART_COMMAND_CONSOLE_TASK_PRIORITY );\r
\r
/* Register the standard CLI commands. */\r
-//_RB_ vRegisterSampleCLICommands();\r
+ vRegisterSampleCLICommands();\r
\r
/* Create the register check tasks, as described at the top of this file */\r
xTaskCreate( prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL );\r
that they are all still running, and that none have detected an error. */\r
if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
{\r
-//_RB_ ulErrorFound = pdTRUE;\r
+ ulErrorFound = pdTRUE;\r
}\r
\r
if( xAreMathsTaskStillRunning() != pdTRUE )\r
}\r
\r
/* The following line will only execute if the task parameter is found to\r
- be incorrect. The check timer will detect that the regtest loop counter is\r
+ be incorrect. The check task will detect that the regtest loop counter is\r
not being incremented and flag an error. */\r
vTaskDelete( NULL );\r
}\r
}\r
\r
/* The following line will only execute if the task parameter is found to\r
- be incorrect. The check timer will detect that the regtest loop counter is\r
+ be incorrect. The check task will detect that the regtest loop counter is\r
not being incremented and flag an error. */\r
vTaskDelete( NULL );\r
}\r
\r
static void prvPseudoRandomiser( void *pvParameters )\r
{\r
-const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL, ulMinDelay = ( 35 / portTICK_PERIOD_MS );\r
+const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL, ulMinDelay = ( 35 / portTICK_PERIOD_MS ), ulIBit = ( 1UL << 7UL );\r
volatile uint32_t ulNextRand = ( uint32_t ) &pvParameters, ulValue;\r
\r
+ /* A few minor port tests before entering the randomiser loop.\r
+\r
+ At this point interrupts should be enabled. */\r
+ configASSERT( ( __get_CPSR() & ulIBit ) == 0 );\r
+\r
+ /* The CPU does not have an interrupt mask register, so critical sections\r
+ have to globally disable interrupts. Therefore entering a critical section\r
+ should leave the I bit set. */\r
+ taskENTER_CRITICAL();\r
+ configASSERT( ( __get_CPSR() & ulIBit ) == ulIBit );\r
+\r
+ /* Nest the critical sections. */\r
+ taskENTER_CRITICAL();\r
+ configASSERT( ( __get_CPSR() & ulIBit ) == ulIBit );\r
+\r
+ /* After yielding the I bit should still be set. Note yielding is possible\r
+ in a critical section as each task maintains its own critical section\r
+ nesting count so some tasks are in critical sections and others are not -\r
+ however this is *not* something task code should do! */\r
+ taskYIELD();\r
+ configASSERT( ( __get_CPSR() & ulIBit ) == ulIBit );\r
+\r
+ /* The I bit should not be cleared again until both critical sections have\r
+ been exited. */\r
+ taskEXIT_CRITICAL();\r
+ taskYIELD();\r
+ configASSERT( ( __get_CPSR() & ulIBit ) == ulIBit );\r
+ taskEXIT_CRITICAL();\r
+ configASSERT( ( __get_CPSR() & ulIBit ) == 0 );\r
+ taskYIELD();\r
+ configASSERT( ( __get_CPSR() & ulIBit ) == 0 );\r
+\r
/* This task does nothing other than ensure there is a little bit of\r
disruption in the scheduling pattern of the other tasks. Normally this is\r
done by generating interrupts at pseudo random times. */\r