Core kernel code:

[freertos] / FreeRTOS / Demo / CORTEX_A5_SAMA5D4x_EK_IAR / main.c

diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c
index 20ff22c95c7ef593dc4a1caad3a8b9ee4fee8e1c..abbc5d8115b5990faa09e06cb16869e3fc4341db 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c
@@ -124,19 +124,13 @@ void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );
 void vApplicationTickHook( void );\r
 \r
 /* Prototype for the IRQ handler called by the generic Cortex-A5 RTOS port\r
-layer.  The address of the ISR is passed into this function as a parameter.\r
-Note this level of indirection could be removed by creating a SAMA5 specific\r
-port layer that calls the IRQ directly from the port layer rather than via this\r
-application callback. */\r
-void vApplicationIRQHandler( uint32_t ulInterruptVectorAddress );\r
+layer. */\r
+void vApplicationIRQHandler( void );\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
 int main( void )\r
 {\r
-//extern int atmel_main( void );\r
-//atmel_main();\r
-\r
        /* Configure the hardware ready to run the demo. */\r
        prvSetupHardware();\r
 \r
@@ -161,13 +155,21 @@ static void prvSetupHardware( void )
     /* Disable watchdog */\r
     WDT_Disable( WDT );\r
 \r
-       /* Set protect mode in the AIC for easier debugging. */\r
-//     AIC->AIC_DCR |= AIC_DCR_PROT;\r
+       /* Set protect mode in the AIC for easier debugging.  THIS IS COMMENTED OUT\r
+       AS IT RESULTS IN SPURIOUS INTERRUPTS.\r
+       AIC->AIC_DCR |= AIC_DCR_PROT; */\r
 \r
        /* Configure ports used by LEDs. */\r
        vParTestInitialise();\r
 \r
-//_RB_ CP15_EnableIcache();\r
+       #if defined (ddram)\r
+       {\r
+               MMU_Initialize( ( uint32_t * ) 0x20C000 );\r
+               CP15_EnableMMU();\r
+               CP15_EnableDcache();\r
+               CP15_EnableIcache();\r
+       }\r
+       #endif\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -178,8 +180,9 @@ void vApplicationMallocFailedHook( void )
        internally by FreeRTOS API functions that create tasks, queues, software\r
        timers, and semaphores.  The size of the FreeRTOS heap is set by the\r
        configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */\r
-       taskDISABLE_INTERRUPTS();\r
-       for( ;; );\r
+\r
+       /* Force an assert. */\r
+       configASSERT( ( volatile void * ) NULL );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -191,8 +194,9 @@ void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
        /* Run time stack overflow checking is performed if\r
        configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2.  This hook\r
        function is called if a stack overflow is detected. */\r
-       taskDISABLE_INTERRUPTS();\r
-       for( ;; );\r
+\r
+       /* Force an assert. */\r
+       configASSERT( ( volatile void * ) NULL );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -254,19 +258,19 @@ void vApplicationTickHook( void )
 \r
 /* The function called by the RTOS port layer after it has managed interrupt\r
 entry. */\r
-void vApplicationIRQHandler( uint32_t ulInterruptVectorAddress )\r
+void vApplicationIRQHandler( void )\r
 {\r
 typedef void (*ISRFunction_t)( void );\r
 ISRFunction_t pxISRFunction;\r
 volatile uint32_t * pulAIC_IVR = ( uint32_t * ) configINTERRUPT_VECTOR_ADDRESS;\r
 \r
-       /* On the SAMA5 the parameter is a pointer to the ISR handling function. */\r
-       pxISRFunction = ( ISRFunction_t ) ulInterruptVectorAddress;\r
+       /* Obtain the address of the interrupt handler from the AIR. */\r
+       pxISRFunction = ( ISRFunction_t ) *pulAIC_IVR;\r
 \r
        /* Write back to the SAMA5's interrupt controller's IVR register in case the\r
        CPU is in protect mode.  If the interrupt controller is not in protect mode\r
        then this write is not necessary. */\r
-       *pulAIC_IVR = 0;\r
+       *pulAIC_IVR = ( uint32_t ) pxISRFunction;\r
 \r
        /* Ensure the write takes before re-enabling interrupts. */\r
        __DSB();\r
@@ -277,4 +281,3 @@ volatile uint32_t * pulAIC_IVR = ( uint32_t * ) configINTERRUPT_VECTOR_ADDRESS;
        pxISRFunction();\r
 }\r
 \r
-\r