--- /dev/null
+/**\r
+ * \file\r
+ *\r
+ * Copyright (c) 2012 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ * Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+#ifndef _SAM3XA_EFC0_INSTANCE_\r
+#define _SAM3XA_EFC0_INSTANCE_\r
+\r
+/* ========== Register definition for EFC0 peripheral ========== */\r
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))\r
+#define REG_EFC0_FMR (0x400E0A00U) /**< \brief (EFC0) EEFC Flash Mode Register */\r
+#define REG_EFC0_FCR (0x400E0A04U) /**< \brief (EFC0) EEFC Flash Command Register */\r
+#define REG_EFC0_FSR (0x400E0A08U) /**< \brief (EFC0) EEFC Flash Status Register */\r
+#define REG_EFC0_FRR (0x400E0A0CU) /**< \brief (EFC0) EEFC Flash Result Register */\r
+#else\r
+#define REG_EFC0_FMR (*(RwReg*)0x400E0A00U) /**< \brief (EFC0) EEFC Flash Mode Register */\r
+#define REG_EFC0_FCR (*(WoReg*)0x400E0A04U) /**< \brief (EFC0) EEFC Flash Command Register */\r
+#define REG_EFC0_FSR (*(RoReg*)0x400E0A08U) /**< \brief (EFC0) EEFC Flash Status Register */\r
+#define REG_EFC0_FRR (*(RoReg*)0x400E0A0CU) /**< \brief (EFC0) EEFC Flash Result Register */\r
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */\r
+\r
+#endif /* _SAM3XA_EFC0_INSTANCE_ */\r