/* SiLabs library includes. */\r
#include "em_cmu.h"\r
#include "em_rtc.h"\r
+#include "em_burtc.h"\r
#include "em_rmu.h"\r
#include "em_int.h"\r
#include "sleep.h"\r
\r
+#define lpINCLUDE_TEST_TIMER 1\r
+\r
/* SEE THE COMMENTS ABOVE THE DEFINITION OF configCREATE_LOW_POWER_DEMO IN\r
FreeRTOSConfig.h\r
This file contains functions that will override the default implementations\r
*/\r
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
\r
+/* If lpINCLUDE_TEST_TIMER is defined then the BURTC is used to generate\r
+interrupts that will wake the processor prior to the expected idle time\r
+completing. The timer interval can be altered to test different\r
+scenarios. */\r
+#if( lpINCLUDE_TEST_TIMER == 1 )\r
+ static void prvSetupTestTimer( void );\r
+#endif\r
+\r
/*-----------------------------------------------------------*/\r
\r
/* Calculate how many clock increments make up a single tick period. */\r
RTC_IntDisable( RTC_IFC_COMP0 );\r
\r
/* The tick interrupt must be set to the lowest priority possible. */\r
- NVIC_SetPriority( RTC_IRQn, configKERNEL_INTERRUPT_PRIORITY );\r
+ NVIC_SetPriority( RTC_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY );\r
NVIC_ClearPendingIRQ( RTC_IRQn );\r
NVIC_EnableIRQ( RTC_IRQn );\r
RTC_CompareSet( 0, ulReloadValueForOneTick );\r
RTC_IntClear( RTC_IFC_COMP0 );\r
RTC_IntEnable( RTC_IF_COMP0 );\r
RTC_Enable( true );\r
+\r
+ /* If lpINCLUDE_TEST_TIMER is defined then the BURTC is used to generate\r
+ interrupts that will wake the processor prior to the expected idle time\r
+ completing. The timer interval can be altered to test different\r
+ scenarios. */\r
+ #if( lpINCLUDE_TEST_TIMER == 1 )\r
+ prvSetupTestTimer();\r
+ #endif\r
}\r
/*-----------------------------------------------------------*/\r
\r
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )\r
{\r
-uint32_t ulReloadValue, ulCompleteTickPeriods, ulCurrentCount;\r
+uint32_t ulReloadValue, ulCompleteTickPeriods, ulCountBeforeSleep, ulCountAfterSleep;\r
eSleepModeStatus eSleepAction;\r
TickType_t xModifiableIdleTime;\r
\r
in some tiny drift of the time maintained by the kernel with respect to\r
calendar time. The count is latched before stopping the timer as stopping\r
the timer appears to clear the count. */\r
- ulCurrentCount = RTC_CounterGet();\r
+ ulCountBeforeSleep = RTC_CounterGet();\r
RTC_Enable( false );\r
\r
+ /* If this function is re-entered before one complete tick period then the\r
+ reload value might be to take into account a partial tick, but just reading\r
+ the count assumes it is counting up to a full ticks worth - so add in the\r
+ different if any. */\r
+ ulCountBeforeSleep += ( ulReloadValueForOneTick - RTC_CompareGet( 0 ) );\r
+\r
/* Enter a critical section but don't use the taskENTER_CRITICAL() method as\r
that will mask interrupts that should exit sleep mode. */\r
INT_Disable();\r
{\r
/* Restart tick and count up to whatever was left of the current time\r
slice. */\r
- RTC_CompareSet( 0, ulReloadValueForOneTick - ulCurrentCount );\r
+ RTC_CompareSet( 0, ( ulReloadValueForOneTick - ulCountBeforeSleep ) + ulStoppedTimerCompensation );\r
RTC_Enable( true );\r
\r
/* Re-enable interrupts - see comments above the cpsid instruction()\r
{\r
/* Adjust the reload value to take into account that the current time\r
slice is already partially complete. */\r
- ulReloadValue -= ulCurrentCount;\r
+ ulReloadValue -= ulCountBeforeSleep;\r
RTC_CompareSet( 0, ulReloadValue );\r
\r
/* Restart the RTC. */\r
result in some tiny drift of the time maintained by the kernel with\r
respect to calendar time. The count value is latched before stopping\r
the timer as stopping the timer appears to clear the count. */\r
- ulCurrentCount = RTC_CounterGet();\r
+ ulCountAfterSleep = RTC_CounterGet();\r
RTC_Enable( false );\r
\r
/* Re-enable interrupts - see comments above the cpsid instruction()\r
function is called with the scheduler suspended the actual tick\r
processing will not occur until after this function has exited.\r
Reset the reload value with whatever remains of this tick period. */\r
- ulReloadValue = ulReloadValueForOneTick - ulCurrentCount;\r
+ ulReloadValue = ulReloadValueForOneTick - ulCountAfterSleep;\r
RTC_CompareSet( 0, ulReloadValue );\r
\r
/* The tick interrupt handler will already have pended the tick\r
{\r
/* Something other than the tick interrupt ended the sleep. How\r
many complete tick periods passed while the processor was\r
- sleeping? */\r
- ulCompleteTickPeriods = ulCurrentCount / ulReloadValueForOneTick;\r
+ sleeping? Add back in the adjustment that was made to the reload\r
+ value to account for the fact that a time slice was part way through\r
+ when this function was called. */\r
+ ulCountAfterSleep += ulCountBeforeSleep;\r
+ ulCompleteTickPeriods = ulCountAfterSleep / ulReloadValueForOneTick;\r
\r
/* The reload value is set to whatever fraction of a single tick\r
period remains. */\r
- ulReloadValue = ulCurrentCount - ( ulCompleteTickPeriods * ulReloadValueForOneTick );\r
+ ulCountAfterSleep -= ( ulCompleteTickPeriods * ulReloadValueForOneTick );\r
+ ulReloadValue = ulReloadValueForOneTick - ulCountAfterSleep;\r
+\r
if( ulReloadValue == 0 )\r
{\r
/* There is no fraction remaining. */\r
\r
void RTC_IRQHandler( void )\r
{\r
- if( ulTickFlag == pdFALSE )\r
+ ulTickFlag = pdTRUE;\r
+\r
+ if( RTC_CompareGet( 0 ) != ulReloadValueForOneTick )\r
{\r
/* Set RTC interrupt to one RTOS tick period. */\r
RTC_Enable( false );\r
RTC_CompareSet( 0, ulReloadValueForOneTick );\r
- ulTickFlag = pdTRUE;\r
RTC_Enable( true );\r
}\r
\r
}\r
portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );\r
}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( lpINCLUDE_TEST_TIMER == 1 )\r
+\r
+ /* If lpINCLUDE_TEST_TIMER is defined then the BURTC is used to generate\r
+ interrupts that will wake the processor prior to the expected idle time\r
+ completing. The timer interval can be altered to test different\r
+ scenarios. */\r
+ static void prvSetupTestTimer( void )\r
+ {\r
+ BURTC_Init_TypeDef xBURTCInitStruct = BURTC_INIT_DEFAULT;\r
+ const uint32_t ulBURTClockHz = 2000UL, ulInterruptFrequency = 1000UL;\r
+ const uint32_t ulReload = ( ulBURTClockHz / ulInterruptFrequency );\r
+\r
+ /* Ensure LE modules are accessible. */\r
+ CMU_ClockEnable( cmuClock_CORELE, true );\r
+\r
+ /* Enable access to BURTC registers. */\r
+ RMU_ResetControl( rmuResetBU, false );\r
+\r
+ /* Generate periodic interrupts from BURTC. */\r
+ xBURTCInitStruct.mode = burtcModeEM3; /* Operational in EM3. */\r
+ xBURTCInitStruct.clkSel = burtcClkSelULFRCO;/* ULFRCO clock. */\r
+ xBURTCInitStruct.clkDiv = burtcClkDiv_1; /* 2kHz ULFRCO clock. */\r
+ xBURTCInitStruct.compare0Top = true; /* Wrap on COMP0. */\r
+ BURTC_IntDisable( BURTC_IF_COMP0 );\r
+ BURTC_Init( &xBURTCInitStruct );\r
+\r
+ NVIC_SetPriority( BURTC_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY );\r
+ NVIC_ClearPendingIRQ( BURTC_IRQn );\r
+ NVIC_EnableIRQ( BURTC_IRQn );\r
+ BURTC_CompareSet( 0, ulReload );\r
+ BURTC_IntClear( BURTC_IF_COMP0 );\r
+ BURTC_IntEnable( BURTC_IF_COMP0 );\r
+ BURTC_CounterReset();\r
+ }\r
+\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if( lpINCLUDE_TEST_TIMER == 1 )\r
\r
-#endif /* ( configCREATE_LOW_POWER_DEMO == 1 ) */\r
+ /* If lpINCLUDE_TEST_TIMER is defined then the BURTC is used to generate\r
+ interrupts that will wake the processor prior to the expected idle time\r
+ completing. The timer interval can be altered to test different\r
+ scenarios. */\r
+ volatile uint32_t ulTestTimerCounts = 0;\r
+\r
+ void BURTC_IRQHandler( void )\r
+ {\r
+ /* Nothing to do here - just testing the code in the scenario where a\r
+ tickless idle period is ended prior to the expected maximum idle time\r
+ expiring. */\r
+ BURTC_IntClear( _RTC_IFC_MASK );\r
+ ulTestTimerCounts++;\r
+ }\r
+\r
+#endif\r
+/*-----------------------------------------------------------*/\r
\r
+#endif /* ( configCREATE_LOW_POWER_DEMO == 2 ) */\r
projects / freertos / blobdiff