Add Pearl Gecko demo.

[freertos] / FreeRTOS / Demo / CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio / Source / SilLabs_Code / Device / SiliconLabs / EFM32GG / Source / system_efm32gg.c

diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio/Source/SilLabs_Code/Device/SiliconLabs/EFM32GG/Source/system_efm32gg.c b/FreeRTOS/Demo/CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio/Source/SilLabs_Code/Device/SiliconLabs/EFM32GG/Source/system_efm32gg.c
index 6497069de4a054268979bd2f9c16d3641e5946a0..cd4b7abf7229583c7f7a57041ce3c18724f2d720 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio/Source/SilLabs_Code/Device/SiliconLabs/EFM32GG/Source/system_efm32gg.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio/Source/SilLabs_Code/Device/SiliconLabs/EFM32GG/Source/system_efm32gg.c
@@ -1,10 +1,10 @@
 /***************************************************************************//**\r
  * @file system_efm32gg.c\r
  * @brief CMSIS Cortex-M3 System Layer for EFM32GG devices.\r
- * @version 4.0.0\r
+ * @version 4.2.1\r
  ******************************************************************************\r
  * @section License\r
- * <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>\r
+ * <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>\r
  ******************************************************************************\r
  *\r
  * Permission is granted to anyone to use this software for any purpose,\r
@@ -54,27 +54,27 @@
 /* SW footprint. */\r
 \r
 #ifndef EFM32_HFXO_FREQ\r
-#ifdef _EFM32_GIANT_FAMILY\r
 #define EFM32_HFXO_FREQ (48000000UL)\r
-#else\r
-#define EFM32_HFXO_FREQ (32000000UL)\r
-#endif\r
 #endif\r
+\r
+#define EFM32_HFRCO_MAX_FREQ (28000000UL)\r
+\r
 /* Do not define variable if HF crystal oscillator not present */\r
 #if (EFM32_HFXO_FREQ > 0)\r
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */\r
-/** System HFXO clock. */ \r
+/** System HFXO clock. */\r
 static uint32_t SystemHFXOClock = EFM32_HFXO_FREQ;\r
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */\r
 #endif\r
 \r
-#ifndef EFM32_LFXO_FREQ \r
+#ifndef EFM32_LFXO_FREQ\r
 #define EFM32_LFXO_FREQ (EFM32_LFRCO_FREQ)\r
 #endif\r
+\r
 /* Do not define variable if LF crystal oscillator not present */\r
 #if (EFM32_LFXO_FREQ > 0)\r
 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */\r
-/** System LFXO clock. */ \r
+/** System LFXO clock. */\r
 static uint32_t SystemLFXOClock = EFM32_LFXO_FREQ;\r
 /** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */\r
 #endif\r
@@ -123,13 +123,11 @@ uint32_t SystemCoreClock;
 uint32_t SystemCoreClockGet(void)\r
 {\r
   uint32_t ret;\r
-  \r
+\r
   ret = SystemHFClockGet();\r
-#if defined (_EFM32_GIANT_FAMILY)\r
   /* Leopard/Giant Gecko has an additional divider */\r
   ret =  ret / (1 + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK)>>_CMU_CTRL_HFCLKDIV_SHIFT));\r
-#endif\r
-  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >> \r
+  ret >>= (CMU->HFCORECLKDIV & _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) >>\r
           _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT;\r
 \r
   /* Keep CMSIS variable up-to-date just in case */\r
@@ -139,6 +137,23 @@ uint32_t SystemCoreClockGet(void)
 }\r
 \r
 \r
+/***************************************************************************//**\r
+ * @brief\r
+ *   Get the maximum core clock frequency.\r
+ *\r
+ * @note\r
+ *   This is an EFR32 proprietary function, not part of the CMSIS definition.\r
+ *\r
+ * @return\r
+ *   The maximum core clock frequency in Hz.\r
+ ******************************************************************************/\r
+uint32_t SystemMaxCoreClockGet(void)\r
+{\r
+  return (EFM32_HFRCO_MAX_FREQ > EFM32_HFXO_FREQ ? \\r
+          EFM32_HFRCO_MAX_FREQ : EFM32_HFXO_FREQ);\r
+}\r
+\r
+\r
 /***************************************************************************//**\r
  * @brief\r
  *   Get the current HFCLK frequency.\r
@@ -152,7 +167,7 @@ uint32_t SystemCoreClockGet(void)
 uint32_t SystemHFClockGet(void)\r
 {\r
   uint32_t ret;\r
-  \r
+\r
   switch (CMU->STATUS & (CMU_STATUS_HFRCOSEL | CMU_STATUS_HFXOSEL |\r
                          CMU_STATUS_LFRCOSEL | CMU_STATUS_LFXOSEL))\r
   {\r
@@ -165,11 +180,11 @@ uint32_t SystemHFClockGet(void)
       ret = 0;\r
 #endif\r
       break;\r
-      \r
+\r
     case CMU_STATUS_LFRCOSEL:\r
       ret = EFM32_LFRCO_FREQ;\r
       break;\r
-      \r
+\r
     case CMU_STATUS_HFXOSEL:\r
 #if (EFM32_HFXO_FREQ > 0)\r
       ret = SystemHFXOClock;\r
@@ -179,7 +194,7 @@ uint32_t SystemHFClockGet(void)
       ret = 0;\r
 #endif\r
       break;\r
-      \r
+\r
     default: /* CMU_STATUS_HFRCOSEL */\r
       switch (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK)\r
       {\r