Add Pearl Gecko demo.

[freertos] / FreeRTOS / Demo / CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio / Source / SilLabs_Code / emlib / em_rtc.c

diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio/Source/SilLabs_Code/emlib/em_rtc.c b/FreeRTOS/Demo/CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio/Source/SilLabs_Code/emlib/em_rtc.c
index 481aeb8235c1b7625357f46cf973b93e0b1581a9..02ce80c6b131b5564cf75ded154b13ad329848c8 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio/Source/SilLabs_Code/emlib/em_rtc.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Gecko_Starter_Kit_Simplicity_Studio/Source/SilLabs_Code/emlib/em_rtc.c
@@ -1,10 +1,10 @@
 /***************************************************************************//**\r
  * @file em_rtc.c\r
  * @brief Real Time Counter (RTC) Peripheral API\r
- * @version 4.0.0\r
+ * @version 4.2.1\r
  *******************************************************************************\r
  * @section License\r
- * <b>(C) Copyright 2014 Silicon Labs, http://www.silabs.com</b>\r
+ * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>\r
  *******************************************************************************\r
  *\r
  * Permission is granted to anyone to use this software for any purpose,\r
@@ -30,12 +30,11 @@
  *\r
  ******************************************************************************/\r
 \r
-\r
 #include "em_rtc.h"\r
 #if defined(RTC_COUNT) && (RTC_COUNT > 0)\r
 \r
 #include "em_assert.h"\r
-#include "em_bitband.h"\r
+#include "em_bus.h"\r
 \r
 /***************************************************************************//**\r
  * @addtogroup EM_Library\r
@@ -82,7 +81,7 @@
  *   Bitmask corresponding to SYNCBUSY register defined bits, indicating\r
  *   registers that must complete any ongoing synchronization.\r
  ******************************************************************************/\r
-__STATIC_INLINE void RTC_Sync(uint32_t mask)\r
+__STATIC_INLINE void regSync(uint32_t mask)\r
 {\r
   /* Avoid deadlock if modifying the same register twice when freeze mode is */\r
   /* activated. */\r
@@ -121,18 +120,18 @@ uint32_t RTC_CompareGet(unsigned int comp)
   /* Initialize selected compare value */\r
   switch (comp)\r
   {\r
-  case 0:\r
-    ret = RTC->COMP0;\r
-    break;\r
-\r
-  case 1:\r
-    ret = RTC->COMP1;\r
-    break;\r
-\r
-  default:\r
-    /* Unknown compare register selected */\r
-    ret = 0;\r
-    break;\r
+    case 0:\r
+      ret = RTC->COMP0;\r
+      break;\r
+\r
+    case 1:\r
+      ret = RTC->COMP1;\r
+      break;\r
+\r
+    default:\r
+      /* Unknown compare register selected */\r
+      ret = 0;\r
+      break;\r
   }\r
 \r
   return ret;\r
@@ -148,7 +147,7 @@ uint32_t RTC_CompareGet(unsigned int comp)
  *   low frequency domain. If the same register is modified before a previous\r
  *   update has completed, this function will stall until the previous\r
  *   synchronization has completed. This only applies to the Gecko Family, see\r
- *   comment in the RTC_Sync() internal function call.\r
+ *   comment in the regSync() internal function call.\r
  *\r
  * @param[in] comp\r
  *   Compare register to set, either 0 or 1\r
@@ -163,33 +162,34 @@ void RTC_CompareSet(unsigned int comp, uint32_t value)
   uint32_t          syncbusy;\r
 #endif\r
 \r
-  EFM_ASSERT(RTC_COMP_REG_VALID(comp) &&\r
-             ((value & ~(_RTC_COMP0_COMP0_MASK >> _RTC_COMP0_COMP0_SHIFT)) == 0));\r
+  EFM_ASSERT(RTC_COMP_REG_VALID(comp)\r
+             && ((value & ~(_RTC_COMP0_COMP0_MASK\r
+                            >> _RTC_COMP0_COMP0_SHIFT)) == 0));\r
 \r
   /* Initialize selected compare value */\r
   switch (comp)\r
   {\r
-  case 0:\r
-    compReg = &(RTC->COMP0);\r
+    case 0:\r
+      compReg = &(RTC->COMP0);\r
 #if defined(_EFM32_GECKO_FAMILY)\r
-    syncbusy = RTC_SYNCBUSY_COMP0;\r
+      syncbusy = RTC_SYNCBUSY_COMP0;\r
 #endif\r
-    break;\r
+      break;\r
 \r
-  case 1:\r
-    compReg = &(RTC->COMP1);\r
+    case 1:\r
+      compReg = &(RTC->COMP1);\r
 #if defined(_EFM32_GECKO_FAMILY)\r
-    syncbusy = RTC_SYNCBUSY_COMP1;\r
+      syncbusy = RTC_SYNCBUSY_COMP1;\r
 #endif\r
-    break;\r
+      break;\r
 \r
-  default:\r
-    /* Unknown compare register selected, abort */\r
-    return;\r
+    default:\r
+      /* Unknown compare register selected, abort */\r
+      return;\r
   }\r
 #if defined(_EFM32_GECKO_FAMILY)\r
   /* LF register about to be modified require sync. busy check */\r
-  RTC_Sync(syncbusy);\r
+  regSync(syncbusy);\r
 #endif\r
 \r
   *compReg = value;\r
@@ -205,7 +205,7 @@ void RTC_CompareSet(unsigned int comp, uint32_t value)
  *   requires synchronization into the low frequency domain. If this register is\r
  *   modified before a previous update to the same register has completed, this\r
  *   function will stall until the previous synchronization has completed. This\r
- *   only applies to the Gecko Family, see comment in the RTC_Sync() internal\r
+ *   only applies to the Gecko Family, see comment in the regSync() internal\r
  *   function call.\r
  *\r
  * @param[in] enable\r
@@ -215,16 +215,16 @@ void RTC_Enable(bool enable)
 {\r
 #if defined(_EFM32_GECKO_FAMILY)\r
   /* LF register about to be modified require sync. busy check */\r
-  RTC_Sync(RTC_SYNCBUSY_CTRL);\r
+  regSync(RTC_SYNCBUSY_CTRL);\r
 #endif\r
 \r
-  BITBAND_Peripheral(&(RTC->CTRL), _RTC_CTRL_EN_SHIFT, (unsigned int) enable);\r
+  BUS_RegBitWrite(&(RTC->CTRL), _RTC_CTRL_EN_SHIFT, enable);\r
 \r
 #if defined(_EFM32_GECKO_FAMILY)\r
   /* Wait for CTRL to be updated before returning, because calling code may\r
      depend upon that the CTRL register is updated after this function has\r
      returned. */\r
-  RTC_Sync(RTC_SYNCBUSY_CTRL);\r
+  regSync(RTC_SYNCBUSY_CTRL);\r
 #endif\r
 }\r
 \r
@@ -293,7 +293,7 @@ void RTC_FreezeEnable(bool enable)
  *   synchronization into the low frequency domain. If this register is\r
  *   modified before a previous update to the same register has completed, this\r
  *   function will stall until the previous synchronization has completed. This\r
- *   only applies to the Gecko Family, see comment in the RTC_Sync() internal\r
+ *   only applies to the Gecko Family, see comment in the regSync() internal\r
  *   function call.\r
  *\r
  * @param[in] init\r
@@ -328,7 +328,7 @@ void RTC_Init(const RTC_Init_TypeDef *init)
 \r
 #if defined(_EFM32_GECKO_FAMILY)\r
   /* LF register about to be modified require sync. busy check */\r
-  RTC_Sync(RTC_SYNCBUSY_CTRL);\r
+  regSync(RTC_SYNCBUSY_CTRL);\r
 #endif\r
 \r
   RTC->CTRL = tmp;\r
@@ -354,7 +354,7 @@ void RTC_Reset(void)
   /* Wait for CTRL, COMP0 and COMP1 to be updated before returning, because the\r
      calling code may depend upon that the register values are updated after\r
      this function has returned. */\r
-  RTC_Sync(RTC_SYNCBUSY_CTRL | RTC_SYNCBUSY_COMP0 | RTC_SYNCBUSY_COMP1);\r
+  regSync(RTC_SYNCBUSY_CTRL | RTC_SYNCBUSY_COMP0 | RTC_SYNCBUSY_COMP1);\r
 #endif\r
 }\r
 \r