]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/Debug_IAR/Obj/croutine.xcl
Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+).
[freertos] / FreeRTOS / Demo / CORTEX_M0+_LPC51U68_LPCXpresso / Debug_IAR / Obj / croutine.xcl
diff --git a/FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/Debug_IAR/Obj/croutine.xcl b/FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/Debug_IAR/Obj/croutine.xcl
new file mode 100644 (file)
index 0000000..df83753
--- /dev/null
@@ -0,0 +1,363 @@
+"C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\croutine.c"\r
+-std=c11\r
+-ferror-limit=0\r
+-fbracket-depth=512\r
+-MD\r
+-MF\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\Debug_IAR\Obj\croutine.pbi.dep\r
+-o\r
+croutine.pbi\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\portable\IAR\ARM_CM0\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\Common\include\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\app\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\device\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\IAR_specific\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\r
+-I\r
+C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\inc\r
+-I\r
+C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\inc\c\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\include\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\portable\IAR\ARM_CM0\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\Common\include\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\app\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\device\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\IAR_specific\r
+-I\r
+C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\r
+-D__CHAR_BITS__=8\r
+-D__CHAR_MAX__=0xff\r
+-D__CHAR_MIN__=0\r
+-D__CHAR_SIZE__=1\r
+-D__UNSIGNED_CHAR_MAX__=0xff\r
+-D__SIGNED_CHAR_MAX__=127\r
+-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)\r
+-D__CHAR_ALIGN__=1\r
+-D__SHORT_SIZE__=2\r
+-D__UNSIGNED_SHORT_MAX__=0xffff\r
+-D__SIGNED_SHORT_MAX__=32767\r
+-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)\r
+-D__SHORT_ALIGN__=2\r
+-D__INT_SIZE__=4\r
+-D__UNSIGNED_INT_MAX__=0xffffffffU\r
+-D__SIGNED_INT_MAX__=2147483647\r
+-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)\r
+-D__INT_ALIGN__=4\r
+-D__LONG_SIZE__=4\r
+-D__UNSIGNED_LONG_MAX__=0xffffffffUL\r
+-D__SIGNED_LONG_MAX__=2147483647L\r
+-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)\r
+-D__LONG_ALIGN__=4\r
+-D__LONG_LONG_SIZE__=8\r
+-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL\r
+-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL\r
+-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)\r
+-D__LONG_LONG_ALIGN__=8\r
+-D__INT8_T_TYPE__=signed char\r
+-D__INT8_T_MAX__=127\r
+-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)\r
+-D__UINT8_T_TYPE__=unsigned char\r
+-D__UINT8_T_MAX__=0xff\r
+-D__INT8_SIZE_PREFIX__="hh"\r
+-D__INT16_T_TYPE__=signed short int\r
+-D__INT16_T_MAX__=32767\r
+-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)\r
+-D__UINT16_T_TYPE__=unsigned short int\r
+-D__UINT16_T_MAX__=0xffff\r
+-D__INT16_SIZE_PREFIX__="h"\r
+-D__INT32_T_TYPE__=signed int\r
+-D__INT32_T_MAX__=2147483647\r
+-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)\r
+-D__UINT32_T_TYPE__=unsigned int\r
+-D__UINT32_T_MAX__=0xffffffffU\r
+-D__INT32_SIZE_PREFIX__=""\r
+-D__INT64_T_TYPE__=signed long long int\r
+-D__INT64_T_MAX__=9223372036854775807LL\r
+-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)\r
+-D__UINT64_T_TYPE__=unsigned long long int\r
+-D__UINT64_T_MAX__=0xffffffffffffffffULL\r
+-D__INT64_SIZE_PREFIX__="ll"\r
+-D__INT_LEAST8_T_TYPE__=signed char\r
+-D__INT_LEAST8_T_MAX__=127\r
+-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)\r
+-D__UINT_LEAST8_T_TYPE__=unsigned char\r
+-D__UINT_LEAST8_T_MAX__=0xff\r
+-D__INT8_C_SUFFIX__=\r
+-D__UINT8_C_SUFFIX__=\r
+-D__INT_LEAST8_SIZE_PREFIX__="hh"\r
+-D__INT_LEAST16_T_TYPE__=signed short int\r
+-D__INT_LEAST16_T_MAX__=32767\r
+-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)\r
+-D__UINT_LEAST16_T_TYPE__=unsigned short int\r
+-D__UINT_LEAST16_T_MAX__=0xffff\r
+-D__INT16_C_SUFFIX__=\r
+-D__UINT16_C_SUFFIX__=\r
+-D__INT_LEAST16_SIZE_PREFIX__="h"\r
+-D__INT_LEAST32_T_TYPE__=signed int\r
+-D__INT_LEAST32_T_MAX__=2147483647\r
+-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)\r
+-D__UINT_LEAST32_T_TYPE__=unsigned int\r
+-D__UINT_LEAST32_T_MAX__=0xffffffffU\r
+-D__INT32_C_SUFFIX__=\r
+-D__UINT32_C_SUFFIX__=U\r
+-D__INT_LEAST32_SIZE_PREFIX__=""\r
+-D__INT_LEAST64_T_TYPE__=signed long long int\r
+-D__INT_LEAST64_T_MAX__=9223372036854775807LL\r
+-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)\r
+-D__UINT_LEAST64_T_TYPE__=unsigned long long int\r
+-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL\r
+-D__INT64_C_SUFFIX__=LL\r
+-D__UINT64_C_SUFFIX__=ULL\r
+-D__INT_LEAST64_SIZE_PREFIX__="ll"\r
+-D__INT_FAST8_T_TYPE__=signed int\r
+-D__INT_FAST8_T_MAX__=2147483647\r
+-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)\r
+-D__UINT_FAST8_T_TYPE__=unsigned int\r
+-D__UINT_FAST8_T_MAX__=0xffffffffU\r
+-D__INT_FAST8_SIZE_PREFIX__=""\r
+-D__INT_FAST16_T_TYPE__=signed int\r
+-D__INT_FAST16_T_MAX__=2147483647\r
+-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)\r
+-D__UINT_FAST16_T_TYPE__=unsigned int\r
+-D__UINT_FAST16_T_MAX__=0xffffffffU\r
+-D__INT_FAST16_SIZE_PREFIX__=""\r
+-D__INT_FAST32_T_TYPE__=signed int\r
+-D__INT_FAST32_T_MAX__=2147483647\r
+-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)\r
+-D__UINT_FAST32_T_TYPE__=unsigned int\r
+-D__UINT_FAST32_T_MAX__=0xffffffffU\r
+-D__INT_FAST32_SIZE_PREFIX__=""\r
+-D__INT_FAST64_T_TYPE__=signed long long int\r
+-D__INT_FAST64_T_MAX__=9223372036854775807LL\r
+-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)\r
+-D__UINT_FAST64_T_TYPE__=unsigned long long int\r
+-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL\r
+-D__INT_FAST64_SIZE_PREFIX__="ll"\r
+-D__INTMAX_T_TYPE__=signed long long int\r
+-D__INTMAX_T_MAX__=9223372036854775807LL\r
+-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)\r
+-D__UINTMAX_T_TYPE__=unsigned long long int\r
+-D__UINTMAX_T_MAX__=0xffffffffffffffffULL\r
+-D__INTMAX_C_SUFFIX__=LL\r
+-D__UINTMAX_C_SUFFIX__=ULL\r
+-D__INTMAX_SIZE_PREFIX__="ll"\r
+-D__FLOAT_SIZE__=4\r
+-D__FLOAT_ALIGN__=4\r
+-D__DOUBLE_SIZE__=8\r
+-D__DOUBLE_ALIGN__=8\r
+-D__LONG_DOUBLE_SIZE__=8\r
+-D__LONG_DOUBLE_ALIGN__=8\r
+-D____FP16_SIZE__=2\r
+-D____FP16_ALIGN__=2\r
+-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0\r
+-D__SUBNORMAL_FLOATING_POINTS__=0\r
+-D__SIZE_T_TYPE__=unsigned int\r
+-D__SIZE_T_MAX__=0xffffffffU\r
+-D__PTRDIFF_T_TYPE__=signed int\r
+-D__PTRDIFF_T_MAX__=2147483647\r
+-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)\r
+-D__INTPTR_T_TYPE__=signed int\r
+-D__INTPTR_T_MAX__=2147483647\r
+-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)\r
+-D__UINTPTR_T_TYPE__=unsigned int\r
+-D__UINTPTR_T_MAX__=0xffffffffU\r
+-D__INTPTR_SIZE_PREFIX__=""\r
+-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int\r
+-D__JMP_BUF_NUM_ELEMENTS__=8\r
+-D__TID__=0xcf70\r
+-D__VER__=8040002\r
+-D__BUILD_NUMBER__=214\r
+-D__IAR_SYSTEMS_ICC__=9\r
+-D_MAX_ALIGNMENT=8\r
+-D__LITTLE_ENDIAN__=1\r
+-D__BOOL_TYPE__=unsigned char\r
+-D__BOOL_SIZE__=1\r
+-D__WCHAR_T_TYPE__=unsigned int\r
+-D__WCHAR_T_SIZE__=4\r
+-D__WCHAR_T_MAX__=0xffffffffU\r
+-D__DEF_PTR_MEM__=__data\r
+-D__DEF_PTR_SIZE__=4\r
+-D__DATA_MEM0__=__data\r
+-D__DATA_MEM0_POINTER_OK__=1\r
+-D__DATA_MEM0_UNIQUE_POINTER__=1\r
+-D__DATA_MEM0_VAR_OK__=1\r
+-D__DATA_MEM0_INTPTR_TYPE__=int\r
+-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int\r
+-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""\r
+-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU\r
+-D_RSIZE_MAX=0x7fffffffU\r
+-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"\r
+-D__DATA_MEM0_PAGE_SIZE__=0\r
+-D__DATA_MEM0_HEAP__=0\r
+-D__CODE_MEM0__=__code\r
+-D__CODE_MEM0_POINTER_OK__=1\r
+-D__CODE_MEM0_UNIQUE_POINTER__=1\r
+-D__HEAP_MEM0__=0\r
+-D__HEAP_DEFAULT_MEM__=0\r
+-D__HEAPND_MEMORY_LIST1__()=\r
+-D__MULTIPLE_HEAPS__=0\r
+-D__DEF_HEAP_MEM__=__data\r
+-D__DEF_STACK_MEM_INDEX__=0\r
+-D__PRAGMA_PACK_ON__=1\r
+-D__MULTIPLE_INHERITANCE__=1\r
+-D__AAPCS__=1\r
+-D__ARM4TM__=4\r
+-D__ARM5TM__=5\r
+-D__ARM5T__=5\r
+-D__ARM5__=5\r
+-D__ARM6M__=11\r
+-D__ARM6SM__=12\r
+-D__ARM6__=6\r
+-D__ARM_32BIT_STATE=1\r
+-D__ARM_ACLE=201\r
+-D__ARM_ALIGN_MAX_PWR=8\r
+-D__ARM_ALIGN_MAX_STACK_PWR=3\r
+-D__ARM_ARCH=6\r
+-D__ARM_ARCH_ISA_THUMB=1\r
+-D__ARM_ARCH_PROFILE='M'\r
+-D__ARM_FEATURE_COPROC=0\r
+-D__ARM_FP16_ARGS=1\r
+-D__ARM_FP16_FORMAT_IEEE=1\r
+-D__ARM_PCS=1\r
+-D__ARM_PROFILE_M__=1\r
+-D__ARM_SIZE_MINIMAL_ENUM=1\r
+-D__ARM_SIZE_WCHAR_T=4\r
+-D__CODE_SIZE_LIMIT=0\r
+-D__CORE__=__ARM6M__\r
+-D__CPU_MODE__=1\r
+-D__ICCARM_INTRINSICS_VERSION__=2\r
+-D__ICCARM__=1\r
+-D__INTERWORKING__=1\r
+-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0\r
+-D__HAS_WEAK__=1\r
+-D__HAS_PACKED__=1\r
+-D__HAS_JOINED_TYPES__=1\r
+-D__HAS_LOCATED_DECLARATION__=1\r
+-D__HAS_LOCATED_WITH_INIT__=1\r
+-D__IAR_COMPILERBASE__=656646\r
+-D__IAR_COMPILERBASE_STR__=10.5.6.1181\r
+-D__UNICODE_SOURCE_SUPPORTED__=1\r
+-D__VTABLE_MEM__=\r
+-D__PRAGMA_REDEFINE_EXTNAME=1\r
+-D__STDC__=1\r
+-D__STDC_VERSION__=201710L\r
+-D__STDC_NO_VLA__=1\r
+-D__STDC_NO_ATOMICS__=1\r
+-D__STDC_UTF_16__=1\r
+-D__STDC_UTF_32__=1\r
+-D__STDC_LIB_EXT1__=201112L\r
+-D__STDC_NO_THREADS__=1\r
+-D__STDC_ISO_10646__=201103L\r
+-D__STDC_HOSTED__=1\r
+-D__EDG_IA64_ABI=1\r
+-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1\r
+-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1\r
+-D__cpp_hex_float=201603L\r
+-D__cpp_unicode_literals=200710L\r
+-D__cpp_static_assert=200410L\r
+-D__EDG__=1\r
+-D__EDG_VERSION__=500\r
+-D__EDG_SIZE_TYPE__=unsigned int\r
+-D__EDG_PTRDIFF_TYPE__=int\r
+-D__EDG_DELTA_TYPE=int\r
+-D__EDG_IA64_VTABLE_ENTRY_TYPE=int\r
+-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short\r
+-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1\r
+-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1\r
+-D__EDG_ABI_COMPATIBILITY_VERSION=9999\r
+-D__EDG_ABI_CHANGES_FOR_RTTI=1\r
+-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1\r
+-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1\r
+-D__EDG_BSD=0\r
+-D__EDG_SYSV=0\r
+-D__EDG_ANSIC=1\r
+-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1\r
+-D__EDG_FLOAT80_ENABLING_POSSIBLE=0\r
+-D__EDG_FLOAT128_ENABLING_POSSIBLE=0\r
+-D__EDG_INT128_EXTENSIONS_ALLOWED=0\r
+-DDEBUG=1\r
+-DCPU_LPC51U68JBD64=1\r
+-D_DLIB_CONFIG_FILE_HEADER_NAME="C:\\Program Files (x86)\\IAR Systems\\Embedded Workbench 8.3\\arm\\inc\\c\\DLib_Config_Normal.h"\r
+-D_DLIB_CONFIG_FILE_STRING="C:\\Program Files (x86)\\IAR Systems\\Embedded Workbench 8.3\\arm\\inc\\c\\DLib_Config_Normal.h"\r
+-D__VERSION__="IAR ANSI C/C++ Compiler V8.40.2.214/W32 for ARM"\r
+-D_VA_DEFINED=\r
+-D_VA_LIST=struct __va_list\r
+-D__ICCARM_OLD_DEFINED_VAARGS__=1\r
+-D__VA_STACK_ALIGN__=8\r
+-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )\r
+-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 ,  _P1 )\r
+-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 ,  _P1 ,  _P2 )\r
+-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )\r
+-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 ,  _P1 )\r
+-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
+-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )\r
+-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 ,  _P1 )\r
+-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 ,  _P1 ,  _P2 )\r
+-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )\r
+-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 ,  _P1 )\r
+-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
+-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )\r
+-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 ,  _P1 )\r
+-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
+-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )\r
+-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )\r
+-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 ,  _P1 )\r
+-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
+-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )\r
+-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )\r
+-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )\r
+-D__TOPM_DATA_MEMORY_LIST1__()=\r
+-D__TOPM_DATA_MEMORY_LIST2__(_P1)=\r
+-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=\r
+-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )\r
+-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 ,  _P1 )\r
+-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 ,  _P1 ,  _P2 )\r
+-D__DATA_MEM0_SIZE_TYPE__=unsigned int\r
+-D__DATA_MEM0_INDEX_TYPE__=signed int\r
+-D__iar_fp2bits32(x)=0\r
+-D__iar_fp2bits64(x)=0\r
+-D__iar_fpgethi64(x)=0\r
+-D__iar_atomic_add_fetch(x,y,z)=0\r
+-D__iar_atomic_sub_fetch(x,y,z)=0\r
+-D__iar_atomic_load(x,y)=0ULL\r
+-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0\r