+++ /dev/null
-;/*\r
-; * FreeRTOS Kernel V10.2.1\r
-; * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
-; *\r
-; * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
-; * this software and associated documentation files (the "Software"), to deal in\r
-; * the Software without restriction, including without limitation the rights to\r
-; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
-; * the Software, and to permit persons to whom the Software is furnished to do so,\r
-; * subject to the following conditions:\r
-; *\r
-; * The above copyright notice and this permission notice shall be included in all\r
-; * copies or substantial portions of the Software.\r
-; *\r
-; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
-; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
-; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
-; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
-; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
-; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
-; *\r
-; * http://www.FreeRTOS.org\r
-; * http://aws.amazon.com/freertos\r
-; *\r
-; * 1 tab == 4 spaces!\r
-; */\r
-\r
-;/*\r
-; * "Reg test" tasks - These fill the registers with known values, then check\r
-; * that each register maintains its expected value for the lifetime of the\r
-; * task. Each task uses a different set of values. The reg test tasks execute\r
-; * with a very low priority, so get preempted very frequently. A register\r
-; * containing an unexpected value is indicative of an error in the context\r
-; * switching mechanism.\r
-; */\r
-\r
- PRESERVE8\r
- THUMB\r
-\r
-\r
- IMPORT ulRegTest1LoopCounter\r
- IMPORT ulRegTest2LoopCounter\r
-\r
- EXPORT vRegTest1Task\r
- EXPORT vRegTest2Task\r
-\r
- AREA |.text|, CODE, READONLY\r
-\r
-;/*-----------------------------------------------------------*/\r
-vRegTest1Task PROC\r
-\r
- ;/* Fill the core registers with known values. This is only done once. */\r
- movs r1, #101\r
- movs r2, #102\r
- movs r3, #103\r
- movs r4, #104\r
- movs r5, #105\r
- movs r6, #106\r
- movs r7, #107\r
- movs r0, #108\r
- mov r8, r0\r
- movs r0, #109\r
- mov r9, r0\r
- movs r0, #110\r
- mov r10, r0\r
- movs r0, #111\r
- mov r11, r0\r
- movs r0, #112\r
- mov r12, r0\r
- movs r0, #100\r
-\r
-reg1_loop\r
- ;/* Repeatedly check that each register still contains the value written to\r
- ;it when the task started. */\r
- cmp r0, #100\r
- bne reg1_error_loop\r
- cmp r1, #101\r
- bne reg1_error_loop\r
- cmp r2, #102\r
- bne reg1_error_loop\r
- cmp r3, #103\r
- bne reg1_error_loop\r
- cmp r4, #104\r
- bne reg1_error_loop\r
- cmp r5, #105\r
- bne reg1_error_loop\r
- cmp r6, #106\r
- bne reg1_error_loop\r
- cmp r7, #107\r
- bne reg1_error_loop\r
- movs r0, #108\r
- cmp r8, r0\r
- bne reg1_error_loop\r
- movs r0, #109\r
- cmp r9, r0\r
- bne reg1_error_loop\r
- movs r0, #110\r
- cmp r10, r0\r
- bne reg1_error_loop\r
- movs r0, #111\r
- cmp r11, r0\r
- bne reg1_error_loop\r
- movs r0, #112\r
- cmp r12, r0\r
- bne reg1_error_loop\r
-\r
- ;/* Everything passed, increment the loop counter. */\r
- push { r1 }\r
- ldr r0, =ulRegTest1LoopCounter\r
- ldr r1, [r0]\r
- adds r1, r1, #1\r
- str r1, [r0]\r
-\r
- ;/* Yield to increase test coverage. */\r
- movs r0, #0x01\r
- ldr r1, =0xe000ed04 ; NVIC_INT_CTRL\r
- lsls r0 ,r0, #28 ; Shift to PendSV bit\r
- str r0, [r1]\r
- dsb\r
- pop { r1 }\r
-\r
- ;/* Start again. */\r
- movs r0, #100\r
-\r
- b reg1_loop\r
-\r
-reg1_error_loop\r
- ;/* If this line is hit then there was an error in a core register value.\r
- ;The loop ensures the loop counter stops incrementing. */\r
- b reg1_error_loop\r
- nop\r
- ENDP\r
-\r
-\r
-\r
-vRegTest2Task PROC\r
-\r
- ;/* Fill the core registers with known values. This is only done once. */\r
- movs r1, #1\r
- movs r2, #2\r
- movs r3, #3\r
- movs r4, #4\r
- movs r5, #5\r
- movs r6, #6\r
- movs r7, #7\r
- movs r0, #8\r
- mov r8, r0\r
- movs r0, #9\r
- mov r9, r0\r
- movs r0, #10\r
- mov r10, r0\r
- movs r0, #11\r
- mov r11, r0\r
- movs r0, #12\r
- mov r12, r0\r
- movs r0, #10\r
-\r
-reg2_loop\r
- ;/* Repeatedly check that each register still contains the value written to\r
- ;it when the task started. */\r
- cmp r0, #10\r
- bne reg2_error_loop\r
- cmp r1, #1\r
- bne reg2_error_loop\r
- cmp r2, #2\r
- bne reg2_error_loop\r
- cmp r3, #3\r
- bne reg2_error_loop\r
- cmp r4, #4\r
- bne reg2_error_loop\r
- cmp r5, #5\r
- bne reg2_error_loop\r
- cmp r6, #6\r
- bne reg2_error_loop\r
- cmp r7, #7\r
- bne reg2_error_loop\r
- movs r0, #8\r
- cmp r8, r0\r
- bne reg2_error_loop\r
- movs r0, #9\r
- cmp r9, r0\r
- bne reg2_error_loop\r
- movs r0, #10\r
- cmp r10, r0\r
- bne reg2_error_loop\r
- movs r0, #11\r
- cmp r11, r0\r
- bne reg2_error_loop\r
- movs r0, #12\r
- cmp r12, r0\r
- bne reg2_error_loop\r
-\r
- ;/* Everything passed, increment the loop counter. */\r
- push { r1 }\r
- ldr r0, =ulRegTest2LoopCounter\r
- ldr r1, [r0]\r
- adds r1, r1, #1\r
- str r1, [r0]\r
- pop { r1 }\r
-\r
- ;/* Start again. */\r
- movs r0, #10\r
- b reg2_loop\r
-\r
-reg2_error_loop\r
- ;/* If this line is hit then there was an error in a core register value.\r
- ;The loop ensures the loop counter stops incrementing. */\r
- b reg2_error_loop\r
- nop\r
- ENDP\r
-\r
- END\r