Continue work on Get clock settings in Keil and IAR XMC1000 demo working.

[freertos] / FreeRTOS / Demo / CORTEX_M0_Infineon_Boot_Kits_IAR_Keil / System_Keil / startup_XMC1300.s

diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/System_Keil/startup_XMC1300.s b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/System_Keil/startup_XMC1300.s
index 24c7cbab94bd742916ae8c92b0903f7fdee6871f..65d38149e346760f055ecc85294ed876ae45a286 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/System_Keil/startup_XMC1300.s
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_Boot_Kits_IAR_Keil/System_Keil/startup_XMC1300.s
@@ -42,7 +42,7 @@ __initial_sp
 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
 ; </h>\r
 \r
-Heap_Size       EQU     0x00000200\r
+Heap_Size       EQU     0x00000000\r
 \r
                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3\r
 __heap_base\r
@@ -74,7 +74,7 @@ __heap_limit
 ;                     <7=> Reserved\r
 ;     <o0.31>      do not move CLK_VAL1 to SCU_CLKCR[0..19]\r
 ;   </h>\r
-CLK_VAL1_Val    EQU     0x80000000      ; 0xF0000000\r
+CLK_VAL1_Val    EQU     0x00000100      ; 0xF0000000\r
 \r
 ;   <h> CLK_VAL2 Configuration\r
 ;     <o0.0>    disable VADC and SHS Gating\r
@@ -90,7 +90,7 @@ CLK_VAL1_Val    EQU     0x80000000      ; 0xF0000000
 ;     <o0.10>   disable RTC Gating\r
 ;     <o0.31>   do not move CLK_VAL2 to SCU_CGATCLR0[0..10]\r
 ;   </h>\r
-CLK_VAL2_Val    EQU     0x80000000      ; 0xF0000000\r
+CLK_VAL2_Val    EQU     0x00000000      ; 0xF0000000\r
 ; </h>\r
 \r
                 PRESERVE8\r