--- /dev/null
+/*\r
+ * Memory Spaces Definitions.\r
+ *\r
+ * Need modifying for a specific board.\r
+ * FLASH.ORIGIN: starting address of flash\r
+ * FLASH.LENGTH: length of flash\r
+ * RAM.ORIGIN: starting address of RAM bank 0\r
+ * RAM.LENGTH: length of RAM bank 0\r
+ *\r
+ * The values below can be addressed in further linker scripts\r
+ * using functions like 'ORIGIN(RAM)' or 'LENGTH(RAM)'.\r
+ */\r
+\r
+MEMORY\r
+{\r
+ /* Due to restrictions in the MPU, the size of memory regions must be a power\r
+ of two, and start on a boundary equal to their size. */\r
+ ROM (rx) : ORIGIN = 0xE0000, LENGTH = 0x20000\r
+ RAM (rw) : ORIGIN = 0x100000, LENGTH = 0x20000\r
+}\r
+\r
+/* Variables used by FreeRTOS-MPU. */\r
+_Privileged_Functions_Region_Size = 32K;\r
+_Privileged_Data_Region_Size = 512;\r
+\r
+__FLASH_segment_start__ = ORIGIN( ROM );\r
+__FLASH_segment_end__ = __FLASH_segment_start__ + LENGTH( ROM );\r
+\r
+__privileged_functions_start__ = ORIGIN( ROM );\r
+__privileged_functions_end__ = __privileged_functions_start__ + _Privileged_Functions_Region_Size;\r
+\r
+__SRAM_segment_start__ = ORIGIN( RAM );\r
+__SRAM_segment_end__ = __SRAM_segment_start__ + LENGTH( RAM );\r
+\r
+__privileged_data_start__ = ORIGIN( RAM );\r
+__privileged_data_end__ = ORIGIN( RAM ) + _Privileged_Data_Region_Size;\r
+\r
+\r
+/*\r
+ * The '__stack' definition is required by crt0, do not remove it.\r
+ */\r
+__stack = ORIGIN(RAM) + LENGTH(RAM);\r
+_estack = __stack;\r
+\r
+/*\r
+ * Default stack sizes.\r
+ * These are used by the startup in order to allocate stacks\r
+ * for the different modes.\r
+ */\r
+\r
+__Main_Stack_Size = 2048 ;\r
+\r
+PROVIDE ( _Main_Stack_Size = __Main_Stack_Size ) ;\r
+\r
+__Main_Stack_Limit = __stack - __Main_Stack_Size ;\r
+\r
+/*"PROVIDE" allows to easily override these values from an object file or the command line. */\r
+PROVIDE ( _Main_Stack_Limit = __Main_Stack_Limit ) ;\r
+\r
+/*\r
+ * There will be a link error if there is not this amount of\r
+ * RAM free at the end.\r
+ */\r
+_Minimum_Stack_Size = 1024 ;\r
+\r
+/*\r
+ * Default heap definitions.\r
+ * The heap start immediately after the last statically allocated\r
+ * .sbss/.noinit section, and extends up to the main stack limit.\r
+ */\r
+PROVIDE ( _Heap_Begin = _end_noinit ) ;\r
+PROVIDE ( _Heap_Limit = __stack - __Main_Stack_Size ) ;\r
+\r
+/*\r
+ * The entry point is informative, for debuggers and simulators,\r
+ * since the Cortex-M vector points to it anyway.\r
+ */\r
+ENTRY(_start)\r
+\r
+/* Sections Definitions */\r
+\r
+SECTIONS\r
+{\r
+ /*\r
+ * For Cortex-M devices, the beginning of the startup code is stored in\r
+ * the .isr_vector section, which goes to ROM\r
+ */\r
+ .isr_vector :\r
+ {\r
+ . = ALIGN(4);\r
+ _isr_vector = .;\r
+ KEEP(*(.isr_vector))\r
+ } >ROM\r
+\r
+ privileged_functions :\r
+ {\r
+ . = ALIGN(4);\r
+ *(privileged_functions)\r
+ \r
+ /* Non privileged code is after _Privileged_Functions_Region_Size. */\r
+ __privileged_functions_actual_end__ = .;\r
+ . = _Privileged_Functions_Region_Size;\r
+ } > ROM\r
+\r
+\r
+ .text :\r
+ {\r
+ . = ALIGN(4);\r
+\r
+\r
+ /*\r
+ * This section is here for convenience, to store the\r
+ * startup code at the beginning of the flash area, hoping that\r
+ * this will increase the readability of the listing.\r
+ */\r
+ KEEP(*(.after_vectors .after_vectors.*)) /* Startup code and ISR */\r
+\r
+ . = ALIGN(4);\r
+\r
+ /*\r
+ * These are the old initialisation sections, intended to contain\r
+ * naked code, with the prologue/epilogue added by crti.o/crtn.o\r
+ * when linking with startup files. The standalone startup code\r
+ * currently does not run these, better use the init arrays below.\r
+ */\r
+ KEEP(*(.init))\r
+ KEEP(*(.fini))\r
+\r
+ . = ALIGN(4);\r
+\r
+ /*\r
+ * The preinit code, i.e. an array of pointers to initialisation\r
+ * functions to be performed before constructors.\r
+ */\r
+ PROVIDE_HIDDEN (__preinit_array_start = .);\r
+\r
+ /*\r
+ * Used to run the SystemInit() before anything else.\r
+ */\r
+ KEEP(*(.preinit_array_sysinit .preinit_array_sysinit.*))\r
+\r
+ /*\r
+ * Used for other platform inits.\r
+ */\r
+ KEEP(*(.preinit_array_platform .preinit_array_platform.*))\r
+\r
+ /*\r
+ * The application inits. If you need to enforce some order in\r
+ * execution, create new sections, as before.\r
+ */\r
+ KEEP(*(.preinit_array .preinit_array.*))\r
+\r
+ PROVIDE_HIDDEN (__preinit_array_end = .);\r
+\r
+ . = ALIGN(4);\r
+\r
+ /*\r
+ * The init code, i.e. an array of pointers to static constructors.\r
+ */\r
+ PROVIDE_HIDDEN (__init_array_start = .);\r
+ KEEP(*(SORT(.init_array.*)))\r
+ KEEP(*(.init_array))\r
+ PROVIDE_HIDDEN (__init_array_end = .);\r
+\r
+ . = ALIGN(4);\r
+\r
+ /*\r
+ * The fini code, i.e. an array of pointers to static destructors.\r
+ */\r
+ PROVIDE_HIDDEN (__fini_array_start = .);\r
+ KEEP(*(SORT(.fini_array.*)))\r
+ KEEP(*(.fini_array))\r
+ PROVIDE_HIDDEN (__fini_array_end = .);\r
+ . = ALIGN(4);\r
+\r
+ . = ALIGN(4);\r
+\r
+ *(.text*) /* all remaining code */\r
+\r
+ *(vtable) /* C++ virtual tables */\r
+\r
+ } >ROM\r
+\r
+ .rodata :\r
+ {\r
+ *(.rodata*) /* read-only data (constants) */\r
+ } >ROM\r
+\r
+ .glue :\r
+ {\r
+ KEEP(*(.eh_frame*))\r
+\r
+ /*\r
+ * Stub sections generated by the linker, to glue together\r
+ * ARM and Thumb code. .glue_7 is used for ARM code calling\r
+ * Thumb code, and .glue_7t is used for Thumb code calling\r
+ * ARM code. Apparently always generated by the linker, for some\r
+ * architectures, so better leave them here.\r
+ */\r
+ *(.glue_7)\r
+ *(.glue_7t)\r
+ } >ROM\r
+\r
+ /* ARM magic sections */\r
+ .ARM.extab :\r
+ {\r
+ *(.ARM.extab* .gnu.linkonce.armextab.*)\r
+ } > ROM\r
+\r
+ __exidx_start = .;\r
+ .ARM.exidx :\r
+ {\r
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
+ } > ROM\r
+ __exidx_end = .;\r
+\r
+ . = ALIGN(4);\r
+ _etext = .;\r
+ __etext = .;\r
+\r
+ /*\r
+ * This address is used by the startup code to\r
+ * initialise the .data section.\r
+ */\r
+ _sidata = _etext;\r
+\r
+ /* MEMORY_ARRAY */\r
+ /*\r
+ .ROarraySection :\r
+ {\r
+ *(.ROarraySection .ROarraySection.*)\r
+ } >MEMORY_ARRAY\r
+ */\r
+\r
+\r
+ privileged_data :\r
+ {\r
+ *(privileged_data)\r
+ /* Non kernel data is kept out of the first _Privileged_Data_Region_Size\r
+ bytes of SRAM. */\r
+ __privileged_data_actual_end__ = .;\r
+ . = _Privileged_Data_Region_Size;\r
+ } > RAM\r
+\r
+ /*\r
+ * The initialised data section.\r
+ * The program executes knowing that the data is in the RAM\r
+ * but the loader puts the initial values in the ROM (inidata).\r
+ * It is one task of the startup to copy the initial values from\r
+ * ROM to RAM.\r
+ */\r
+ .data : AT ( _sidata )\r
+ {\r
+ . = ALIGN(4);\r
+\r
+ /* This is used by the startup code to initialise the .data section */\r
+ _sdata = . ; /* STM specific definition */\r
+ __data_start__ = . ;\r
+ *(.data_begin .data_begin.*)\r
+\r
+ *(.data .data.*)\r
+\r
+ *(.data_end .data_end.*)\r
+ . = ALIGN(4);\r
+\r
+ /* This is used by the startup code to initialise the .data section */\r
+ _edata = . ; /* STM specific definition */\r
+ __data_end__ = . ;\r
+\r
+ } >RAM\r
+\r
+\r
+ /*\r
+ * The uninitialised data section. NOLOAD is used to avoid\r
+ * the "section `.bss' type changed to PROGBITS" warning\r
+ */\r
+ .bss (NOLOAD) :\r
+ {\r
+ . = ALIGN(4);\r
+ __bss_start__ = .; /* standard newlib definition */\r
+ _sbss = .; /* STM specific definition */\r
+ *(.bss_begin .bss_begin.*)\r
+\r
+ *(.bss .bss.*)\r
+ *(COMMON)\r
+\r
+ *(.bss_end .bss_end.*)\r
+ . = ALIGN(4);\r
+ __bss_end__ = .; /* standard newlib definition */\r
+ _ebss = . ; /* STM specific definition */\r
+ } >RAM\r
+\r
+ .noinit (NOLOAD) :\r
+ {\r
+ . = ALIGN(4);\r
+ _noinit = .;\r
+\r
+ *(.noinit .noinit.*)\r
+\r
+ . = ALIGN(4) ;\r
+ _end_noinit = .;\r
+ } > RAM\r
+\r
+ /* Mandatory to be word aligned, _sbrk assumes this */\r
+ PROVIDE ( end = _end_noinit ); /* was _ebss */\r
+ PROVIDE ( _end = _end_noinit );\r
+ PROVIDE ( __end = _end_noinit );\r
+ PROVIDE ( __end__ = _end_noinit );\r
+ PROVIDE ( ROM_DATA_START = __data_start__ );\r
+\r
+ /*\r
+ * Used for validation only, do not allocate anything here!\r
+ *\r
+ * This is just to check that there is enough RAM left for the Main\r
+ * stack. It should generate an error if it's full.\r
+ */\r
+ ._check_stack :\r
+ {\r
+ . = ALIGN(4);\r
+\r
+ . = . + _Minimum_Stack_Size ;\r
+\r
+ . = ALIGN(4);\r
+ } >RAM\r
+\r
+ /* After that there are only debugging sections. */\r
+\r
+ /* This can remove the debugging information from the standard libraries */\r
+ /*\r
+ DISCARD :\r
+ {\r
+ libc.a ( * )\r
+ libm.a ( * )\r
+ libgcc.a ( * )\r
+ }\r
+ */\r
+\r
+ /* Stabs debugging sections. */\r
+ .stab 0 : { *(.stab) }\r
+ .stabstr 0 : { *(.stabstr) }\r
+ .stab.excl 0 : { *(.stab.excl) }\r
+ .stab.exclstr 0 : { *(.stab.exclstr) }\r
+ .stab.index 0 : { *(.stab.index) }\r
+ .stab.indexstr 0 : { *(.stab.indexstr) }\r
+ .comment 0 : { *(.comment) }\r
+ /*\r
+ * DWARF debug sections.\r
+ * Symbols in the DWARF debugging sections are relative to the beginning\r
+ * of the section so we begin them at 0.\r
+ */\r
+ /* DWARF 1 */\r
+ .debug 0 : { *(.debug) }\r
+ .line 0 : { *(.line) }\r
+ /* GNU DWARF 1 extensions */\r
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }\r
+ .debug_sfnames 0 : { *(.debug_sfnames) }\r
+ /* DWARF 1.1 and DWARF 2 */\r
+ .debug_aranges 0 : { *(.debug_aranges) }\r
+ .debug_pubnames 0 : { *(.debug_pubnames) }\r
+ /* DWARF 2 */\r
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
+ .debug_abbrev 0 : { *(.debug_abbrev) }\r
+ .debug_line 0 : { *(.debug_line) }\r
+ .debug_frame 0 : { *(.debug_frame) }\r
+ .debug_str 0 : { *(.debug_str) }\r
+ .debug_loc 0 : { *(.debug_loc) }\r
+ .debug_macinfo 0 : { *(.debug_macinfo) }\r
+ /* SGI/MIPS DWARF 2 extensions */\r
+ .debug_weaknames 0 : { *(.debug_weaknames) }\r
+ .debug_funcnames 0 : { *(.debug_funcnames) }\r
+ .debug_typenames 0 : { *(.debug_typenames) }\r
+ .debug_varnames 0 : { *(.debug_varnames) }\r
+}\r