+++ /dev/null
-/****************************************************************************\r
-* © 2013 Microchip Technology Inc. and its subsidiaries.\r
-* You may use this software and any derivatives exclusively with\r
-* Microchip products.\r
-* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".\r
-* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,\r
-* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,\r
-* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP\r
-* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.\r
-* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,\r
-* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND\r
-* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS\r
-* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.\r
-* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL\r
-* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF\r
-* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.\r
-* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE\r
-* OF THESE TERMS.\r
-*/\r
-\r
-/** @defgroup pwm pwm_c_wrapper\r
- * @{\r
- */\r
-/** @file pwm_c_wrapper.cpp\r
- \brief the pwm component C wrapper \r
- This program is designed to allow the other C programs to be able to use this component\r
-\r
- There are entry points for all C wrapper API implementation\r
-\r
-<b>Platform:</b> This is ARC-based component \r
-\r
-<b>Toolset:</b> Metaware IDE(8.5.1)\r
-<b>Reference:</b> smsc_reusable_fw_requirement.doc */\r
-\r
-/*******************************************************************************\r
- * SMSC version control information (Perforce):\r
- *\r
- * FILE: $File: //depot_pcs/FWEng/projects/MEC2016/Playground/pramans/160623_FreeRTOS_Microchip_MEC170x/Demo/CORTEX_MPU_MEC1701_Keil_GCC/peripheral_library/platform.h $\r
- * REVISION: $Revision: #1 $\r
- * DATETIME: $DateTime: 2016/09/22 08:03:49 $\r
- * AUTHOR: $Author: pramans $\r
- *\r
- * Revision history (latest first):\r
- * #xx\r
- ***********************************************************************************\r
- */\r
-\r
-#ifndef _PLATFORM_H_\r
-#define _PLATFORM_H_\r
-#include <stdint.h>\r
-\r
-/* Enable any one of the below flag which enables either Aggregated or Disaggregated Interrupts */\r
-#define DISAGGREGATED_INPT_DEFINED 1\r
-//#define AGGREGATED_INPT_DEFINED 1\r
-\r
-/* Platform Configuration PreProcessor Conditions */\r
-#define TOOLKEIL 1\r
-#define TOOLPC 2\r
-#define TOOLMW 3\r
-#define TOOLMDK 4\r
-\r
-#define PCLINT 9 //added to satisfy PC Lint's need for a value here\r
-\r
-#ifdef __CC_ARM // Keil ARM MDK\r
-#define TOOLSET TOOLMDK\r
-#endif\r
-\r
-#if 0\r
-#ifdef _WIN32 //always defined by visual c++\r
-#define TOOLSET TOOLPC\r
-#endif\r
-\r
-#ifdef __WIN32__ //always defined by borland\r
-#define TOOLSET TOOLPC\r
-#endif\r
-#endif\r
-\r
-\r
-#ifdef _ARC\r
-#define TOOLSET TOOLMW // ARC Metaware\r
-#endif\r
-\r
-#ifndef TOOLSET\r
-//#error "ERROR: cfg.h TOOLSET not defined!"\r
-#endif\r
-\r
-#if TOOLSET == TOOLMDK\r
-#define _KEIL_ARM_ 1 /* Make 1 for Keil MDK Compiler */\r
-#define _KEIL_ 0 /* Make 1 for Keil Compiler */\r
-#define _PC_ 0 \r
-#define _ARC_CORE_ 0\r
-#endif\r
-\r
-#if TOOLSET == TOOLKEIL\r
-#define _KEIL_ARM_ 0\r
-#define _KEIL_ 1 /* Make 1 for Keil Compiler */\r
-#define _PC_ 0 \r
-#define _ARC_CORE_ 0\r
-#endif\r
-\r
-#if TOOLSET == TOOLPC\r
-#define _KEIL_ARM_ 0\r
-#define _KEIL_ 0 \r
-#define _PC_ 1 /* Make 1 for PC Environment */\r
-#define _ARC_CORE_ 0\r
-#endif\r
-\r
-#if TOOLSET == TOOLMW\r
-#define _KEIL_ARM_ 0\r
-#define _KEIL_ 0\r
-#define _PC_ 0\r
-#define _ARC_CORE_ 1\r
-#endif\r
-\r
-/* Short form for Standard Data Types */\r
-typedef unsigned char UINT8;\r
-typedef unsigned short UINT16;\r
-typedef unsigned long UINT32;\r
-\r
-typedef volatile unsigned char REG8;\r
-\r
-typedef unsigned char BYTE;\r
-typedef unsigned short WORD;\r
-typedef unsigned long DWORD;\r
-\r
-typedef unsigned char UCHAR;\r
-typedef unsigned short USHORT;\r
-typedef unsigned long ULONG;\r
-\r
-typedef unsigned char BOOL;\r
-typedef unsigned int UINT;\r
-\r
-/* signed types */\r
-typedef signed char INT8;\r
-typedef signed short INT16;\r
-typedef signed long INT32;\r
-\r
-typedef void VOID;\r
-\r
-typedef volatile unsigned char VUINT8;\r
-typedef volatile unsigned short int VUINT16;\r
-typedef volatile unsigned long int VUINT32;\r
-/* union types */\r
-typedef union _BITS_8\r
-{\r
- UINT8 byte;\r
- struct\r
- {\r
- UINT8 bit0: 1;\r
- UINT8 bit1: 1;\r
- UINT8 bit2: 1;\r
- UINT8 bit3: 1;\r
- UINT8 bit4: 1;\r
- UINT8 bit5: 1;\r
- UINT8 bit6: 1;\r
- UINT8 bit7: 1;\r
- }bit;\r
-}BITS_8;\r
-\r
-\r
-/* MACROS FOR Platform Portability */\r
-\r
-/* macro for defining MMCR register */\r
-/* add MMCRARRAY() & EXTERNMMCRARRAY() */\r
-#if _KEIL_\r
-#define MMCR(name,address) volatile unsigned char xdata name _at_ address\r
-#define MMCRARRAY(name,length,address) volatile unsigned char xdata name[length] _at_ address\r
-#define MMCRTYPE(name,dtype,address) volatile dtype xdata name _at_ address\r
-#define EXTERNMMCR(name) extern volatile unsigned char xdata name\r
-#define EXTERNMMCRARRAY(name) extern volatile unsigned char xdata name[]\r
-#define EXTERNMMCRTYPE(name,dtype) extern volatile dtype xdata name\r
-#define SFR(name,address) sfr name = address\r
-#define SFRBIT(name,address) sbit name = address\r
-#define EXTERNSFR(name) \r
-#define BITADDRESSTYPE(name) bit name\r
-#define XDATA xdata\r
-#define CODE code\r
-#define DATA data\r
-#define IDATA idata\r
-#define INTERRUPT(x) interrupt x\r
-#define SET_GLOBAL_INTR_ENABLE() (sfrIE_EAbit = TRUE;)\r
-#define CLR_GLOBAL_INTR_ENABLE() (sfrIE_EAbit = FALSE;)\r
-#define NULLPTR (char *)(0)\r
-#define PLATFORM_TRIM_OSC() // TODO\r
-#define PNOP() \r
-#define DISABLE_INTERRUPTS() sfrIE_EAbit=0\r
-#define ENABLE_INTERRUPTS() sfrIE_EAbit=1\r
-#define SAVE_DIS_INTERRUPTS(x) { x=sfrIE_EAbit; sfrIE_EAbit=0; }\r
-#define RESTORE_INTERRUPTS(x) { sfrIE_EAbit=x; }\r
-#define ATOMIC_CPU_SLEEP()\r
-#define NUM_IRQ_VECTORS 12 // DW-8051\r
-#define IRQ_VECTOR_SIZE 8 \r
-#define USE_INLINE_PATCHER 1\r
-#define IRQ_VECTABLE_IN_RAM 0\r
-#define PLAT_ROM_IRQ_VECTOR_BASE 0x03 // ROM start\r
-#define PLAT_IRQ_VECTOR_BASE 0x1003 // RAM start\r
-#define FUNC_NEVER_RETURNS\r
-#define BEGIN_SMALL_DATA_BLOCK(x)\r
-#define END_SMALL_DATA_BLOCK()\r
-UINT32 soft_norm(UINT32 val);\r
-#define NORM(x) soft_norm(x)\r
-//\r
-#define USE_FUNC_REPLACEMENT 0\r
-#endif\r
-\r
-#if _PC_\r
-#define MMCR(name,address) volatile unsigned char name\r
-#define MMCRARRAY(name,length,address) volatile unsigned char name[length]\r
-#define MMCRTYPE(name,dtype,address) volatile dtype name\r
-#define EXTERNMMCR(name) extern volatile unsigned char name\r
-#define EXTERNMMCRARRAY(name) extern volatile unsigned char name[]\r
-#define EXTERNMMCRTYPE(name,dtype) extern volatile dtype name\r
-#define SFR(name,address) volatile unsigned char name\r
-#define SFRBIT(name,address) volatile unsigned char name\r
-#define EXTERNSFR(name) extern volatile unsigned char name\r
-#define BITADDRESSTYPE(name) volatile unsigned char name\r
-#define XDATA\r
-#define CODE \r
-#define DATA\r
-#define IDATA\r
-#define INTERRUPT(x)\r
-#define SET_GLOBAL_INTR_ENABLE() (sfrIE_EAbit = TRUE;)\r
-#define CLR_GLOBAL_INTR_ENABLE() (sfrIE_EAbit = FALSE;)\r
-#define NULLPTR (char *)(0)\r
-#define PLATFORM_TRIM_OSC() // TODO\r
-#define PNOP() \r
-#define DISABLE_INTERRUPTS() \r
-#define ENABLE_INTERRUPTS()\r
-#define SAVE_DIS_INTERRUPTS(x) \r
-#define RESTORE_INTERRUPTS(x) \r
-#define ATOMIC_CPU_SLEEP()\r
-#define NUM_IRQ_VECTORS 24\r
-#define IRQ_VECTOR_SIZE 8\r
-#define USE_INLINE_PATCHER 1\r
-#define IRQ_VECTABLE_IN_RAM 0\r
-#define FUNC_NEVER_RETURNS\r
-#define BEGIN_SMALL_DATA_BLOCK(x)\r
-#define END_SMALL_DATA_BLOCK()\r
-UINT32 soft_norm(UINT32 val);\r
-#define NORM(x) soft_norm(x)\r
-//\r
-#define USE_FUNC_REPLACEMENT 0\r
-#endif\r
-\r
-#if _ARC_CORE_\r
-// ARC C has no equivalent operator to specify address of a variable\r
-// ARC MMCR's are 32-bit registers\r
-#define MMCR(name,address) volatile unsigned char name\r
-#define MMCRARRAY(name,length,address) volatile unsigned char name[length]\r
-#define MMCRTYPE(name,dtype,address) volatile dtype name \r
-#define EXTERNMMCR(name) extern volatile unsigned char name\r
-#define EXTERNMMCRARRAY(name) extern volatile unsigned char name[]\r
-#define EXTERNMMCRTYPE(name,dtype) extern volatile dtype name\r
-#define SFR(name,address) volatile unsigned char name \r
-#define SFRBIT(name,address) volatile unsigned char name \r
-#define EXTERNSFR(name) extern volatile unsigned char name \r
-#define BITADDRESSTYPE(name) \r
-#define XDATA\r
-#define CODE \r
-#define DATA\r
-#define IDATA\r
-#define INTERRUPT(x)\r
-#define SET_GLOBAL_INTR_ENABLE() (_enable())\r
-#define CLR_GLOBAL_INTR_ENABLE() (_disable())\r
-#define NULLPTR (char *)(0)\r
-#define NULLVOIDPTR (void *)(0)\r
-#define NULLFPTR (void (*)(void))0\r
-#define PLATFORM_TRIM_OSC() // TODO\r
-#define PNOP() _nop()\r
-#define DISABLE_INTERRUPTS() _disable()\r
-#define ENABLE_INTERRUPTS() _enable()\r
-#define SAVE_DIS_INTERRUPTS(x) { x=_lr(REG_STATUS32);_flag(x & ~(REG_STATUS32_E1_BIT | REG_STATUS32_E2_BIT));_nop(); }\r
-#define RESTORE_INTERRUPTS(x) { _flag((_lr(REG_STATUS32) | (x & (REG_STATUS32_E1_BIT | REG_STATUS32_E2_BIT))));_nop(); }\r
-#define ATOMIC_CPU_SLEEP() _flag(6);_sleep();_nop();_nop();\r
-#define NUM_IRQ_VECTORS 24\r
-#define IRQ_VECTOR_SIZE 8\r
-#define USE_INLINE_PATCHER 0\r
-#define DCCM_CODE_ALIAS_ADDR 0x00060000\r
-#define PLAT_ROM_IRQ_VECTOR_BASE 0\r
-#define PLAT_IRQ_VECTOR_BASE (DCCM_CODE_ALIAS_ADDR)\r
-/// y #define IRQ_VECTABLE_IN_RAM 1\r
-#define IRQ_VECTABLE_IN_RAM 0\r
-#define FUNC_NEVER_RETURNS _CC(_NEVER_RETURNS)\r
-#define BEGIN_SMALL_DATA_BLOCK(x) #pragma Push_small_data(x)\r
-#define END_SMALL_DATA_BLOCK() #pragma Pop_small_data()\r
-#define NORM(x) _norm(x)\r
-\r
-#define INLINE_FUNCTION(x) #pragma On_inline(x)\r
-\r
-//\r
-#define USE_FUNC_REPLACEMENT 0\r
-#endif\r
-\r
-#if _KEIL_ARM_\r
-// For ARM MDK compiler\r
-// ARM MMCR's are 32-bit registers\r
-#define MMCR(name,address) volatile unsigned char name\r
-#define MMCRARRAY(name,length,address) volatile unsigned char name[length]\r
-#define MMCRTYPE(name,dtype,address) volatile dtype name \r
-#define EXTERNMMCR(name) extern volatile unsigned char name\r
-#define EXTERNMMCRARRAY(name) extern volatile unsigned char name[]\r
-#define EXTERNMMCRTYPE(name,dtype) extern volatile dtype name\r
-#define SFR(name,address) volatile unsigned char name \r
-#define SFRBIT(name,address) volatile unsigned char name \r
-#define EXTERNSFR(name) extern volatile unsigned char name \r
-#define BITADDRESSTYPE(name) \r
-#define XDATA\r
-#define CODE \r
-#define DATA\r
-#define IDATA\r
-#define INTERRUPT(x)\r
-#define SET_GLOBAL_INTR_ENABLE() (__enable_irq())\r
-#define CLR_GLOBAL_INTR_ENABLE() (__disable_irq())\r
-#define NULLPTR (char *)(0)\r
-#define NULLVOIDPTR (void *)(0)\r
-#define NULLFPTR (void (*)(void))0\r
-#define PLATFORM_TRIM_OSC() // TODO\r
-#define PNOP() __NOP()\r
-#define DISABLE_INTERRUPTS() __disable_irq()\r
-#define ENABLE_INTERRUPTS() __enable_irq()\r
-#define ATOMIC_CPU_SLEEP() __wfi();__nop();__nop();\r
-\r
-#if 0 /* need further efforts if needed */\r
-#define SAVE_DIS_INTERRUPTS(x) { x=_lr(REG_STATUS32);_flag(x & ~(REG_STATUS32_E1_BIT | REG_STATUS32_E2_BIT));_nop(); }\r
-#define RESTORE_INTERRUPTS(x) { _flag((_lr(REG_STATUS32) | (x & (REG_STATUS32_E1_BIT | REG_STATUS32_E2_BIT))));_nop(); }\r
-#define NUM_IRQ_VECTORS 24\r
-#define IRQ_VECTOR_SIZE 8\r
-#define USE_INLINE_PATCHER 0\r
-#define DCCM_CODE_ALIAS_ADDR 0x00060000\r
-#define PLAT_ROM_IRQ_VECTOR_BASE 0\r
-#define PLAT_IRQ_VECTOR_BASE (DCCM_CODE_ALIAS_ADDR)\r
-/// y #define IRQ_VECTABLE_IN_RAM 1\r
-#define IRQ_VECTABLE_IN_RAM 0\r
-#define BEGIN_SMALL_DATA_BLOCK(x) #pragma Push_small_data(x)\r
-#define END_SMALL_DATA_BLOCK() #pragma Pop_small_data()\r
-#define INLINE_FUNCTION(x) #pragma On_inline(x)\r
-#define USE_FUNC_REPLACEMENT 0\r
-#endif\r
-\r
-#if 0\r
-#define FUNC_NEVER_RETURNS _CC(_NEVER_RETURNS)\r
-#define NORM(x) _norm(x)\r
-#else\r
-/* for ARM MDK */\r
-#define FUNC_NEVER_RETURNS\r
-UINT32 soft_norm(UINT32 val);\r
-#define NORM(x) soft_norm(x)\r
-#endif\r
-#endif\r
-\r
-/* General Constants */\r
-#define FALSE 0x00\r
-#define TRUE !FALSE\r
-\r
-#define BIT_n_MASK(n) (1U << (n))\r
-#define BIT_0_MASK (1<<0)\r
-#define BIT_1_MASK (1<<1)\r
-#define BIT_2_MASK (1<<2)\r
-#define BIT_3_MASK (1<<3)\r
-#define BIT_4_MASK (1<<4)\r
-#define BIT_5_MASK (1<<5)\r
-#define BIT_6_MASK (1<<6)\r
-#define BIT_7_MASK (1<<7)\r
-#define BIT_8_MASK ((UINT16)1<<8)\r
-#define BIT_9_MASK ((UINT16)1<<9)\r
-#define BIT_10_MASK ((UINT16)1<<10)\r
-#define BIT_11_MASK ((UINT16)1<<11)\r
-#define BIT_12_MASK ((UINT16)1<<12)\r
-#define BIT_13_MASK ((UINT16)1<<13)\r
-#define BIT_14_MASK ((UINT16)1<<14)\r
-#define BIT_15_MASK ((UINT16)1<<15)\r
-#define BIT_16_MASK ((UINT32)1<<16)\r
-#define BIT_17_MASK ((UINT32)1<<17)\r
-#define BIT_18_MASK ((UINT32)1<<18)\r
-#define BIT_19_MASK ((UINT32)1<<19)\r
-#define BIT_20_MASK ((UINT32)1<<20)\r
-#define BIT_21_MASK ((UINT32)1<<21)\r
-#define BIT_22_MASK ((UINT32)1<<22)\r
-#define BIT_23_MASK ((UINT32)1<<23)\r
-#define BIT_24_MASK ((UINT32)1<<24)\r
-#define BIT_25_MASK ((UINT32)1<<25)\r
-#define BIT_26_MASK ((UINT32)1<<26)\r
-#define BIT_27_MASK ((UINT32)1<<27)\r
-#define BIT_28_MASK ((UINT32)1<<28)\r
-#define BIT_29_MASK ((UINT32)1<<29)\r
-#define BIT_30_MASK ((UINT32)1<<30)\r
-#define BIT_31_MASK ((UINT32)1<<31)\r
-\r
-\r
-/* For CEC application */\r
-#define ON 1\r
-#define OFF 0\r
-\r
-#endif /*_PLATFORM_H_*/\r
-\r
-/** @}\r
- */\r
-\r