]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_Tasking/main_full.c
Add FreeRTOS-Plus directory.
[freertos] / FreeRTOS / Demo / CORTEX_M4F_Infineon_XMC4500_Tasking / main_full.c
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_Tasking/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_Tasking/main_full.c
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+/*\r
+    FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+\r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
+     *    Complete, revised, and edited pdf reference manuals are also       *\r
+     *    available.                                                         *\r
+     *                                                                       *\r
+     *    Purchasing FreeRTOS documentation will not only help you, by       *\r
+     *    ensuring you get running as quickly as possible and with an        *\r
+     *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
+     *    the FreeRTOS project to continue with its mission of providing     *\r
+     *    professional grade, cross platform, de facto standard solutions    *\r
+     *    for microcontrollers - completely free of charge!                  *\r
+     *                                                                       *\r
+     *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
+     *                                                                       *\r
+     *    Thank you for using FreeRTOS, and thank you for your support!      *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+\r
+    This file is part of the FreeRTOS distribution.\r
+\r
+    FreeRTOS is free software; you can redistribute it and/or modify it under\r
+    the terms of the GNU General Public License (version 2) as published by the\r
+    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+    >>>NOTE<<< The modification to the GPL is included to allow you to\r
+    distribute a combined work that includes FreeRTOS without being obliged to\r
+    provide the source code for proprietary components outside of the FreeRTOS\r
+    kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
+    WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
+    more details. You should have received a copy of the GNU General Public\r
+    License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+    can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+    by writing to Richard Barry, contact details for whom are available on the\r
+    FreeRTOS WEB site.\r
+\r
+    1 tab == 4 spaces!\r
+    \r
+    ***************************************************************************\r
+     *                                                                       *\r
+     *    Having a problem?  Start by reading the FAQ "My application does   *\r
+     *    not run, what could be wrong?                                      *\r
+     *                                                                       *\r
+     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
+     *                                                                       *\r
+    ***************************************************************************\r
+\r
+    \r
+    http://www.FreeRTOS.org - Documentation, training, latest information, \r
+    license and contact details.\r
+    \r
+    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+    including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+    Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+    the code with commercial support, indemnification, and middleware, under \r
+    the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
+    provide a safety engineered and independently SIL3 certified version under \r
+    the SafeRTOS brand: http://www.SafeRTOS.com.\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1:  This project provides two demo applications.  A simple blinky style\r
+ * project, and a more comprehensive test and demo application.  The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two.  See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c.  This file implements the comprehensive test and demo version.\r
+ *\r
+ * NOTE 2:  This file only contains the source code that is specific to the\r
+ * full demo.  Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_full() creates all the demo application tasks and a software timer, then\r
+ * starts the scheduler.  The web documentation provides more details of the \r
+ * standard demo application tasks, which provide no particular functionality, \r
+ * but do provide a good example of how to use the FreeRTOS API.\r
+ *\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Reg test" tasks - These fill both the core and floating point registers with\r
+ * known values, then check that each register maintains its expected value for\r
+ * the lifetime of the task.  Each task uses a different set of values.  The reg\r
+ * test tasks execute with a very low priority, so get preempted very\r
+ * frequently.  A register containing an unexpected value is indicative of an\r
+ * error in the context switching mechanism.\r
+ *\r
+ * "Check" timer - The check software timer period is initially set to three\r
+ * seconds.  The callback function associated with the check software timer\r
+ * checks that all the standard demo tasks, and the register check tasks, are\r
+ * not only still executing, but are executing without reporting any errors.  If\r
+ * the check software timer discovers that a task has either stalled, or\r
+ * reported an error, then it changes its own execution period from the initial\r
+ * three seconds, to just 200ms.  The check software timer callback function\r
+ * also toggles the single LED each time it is called.  This provides a visual\r
+ * indication of the system status:  If the LED toggles every three seconds,\r
+ * then no issues have been discovered.  If the LED toggles every 200ms, then\r
+ * an issue has been discovered with at least one task.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "timers.h"\r
+#include "semphr.h"\r
+\r
+/* Standard demo application includes. */\r
+#include "flop.h"\r
+#include "integer.h"\r
+#include "PollQ.h"\r
+#include "semtest.h"\r
+#include "dynamic.h"\r
+#include "BlockQ.h"\r
+#include "blocktim.h"\r
+#include "countsem.h"\r
+#include "GenQTest.h"\r
+#include "recmutex.h"\r
+#include "death.h"\r
+\r
+/* Hardware includes. */\r
+#include "XMC4500.h"\r
+#include "System_XMC4500.h"\r
+\r
+/* Priorities for the demo application tasks. */\r
+#define mainQUEUE_POLL_PRIORITY                                ( tskIDLE_PRIORITY + 2UL )\r
+#define mainSEM_TEST_PRIORITY                          ( tskIDLE_PRIORITY + 1UL )\r
+#define mainBLOCK_Q_PRIORITY                           ( tskIDLE_PRIORITY + 2UL )\r
+#define mainCREATOR_TASK_PRIORITY                      ( tskIDLE_PRIORITY + 3UL )\r
+#define mainFLOP_TASK_PRIORITY                         ( tskIDLE_PRIORITY )\r
+\r
+/* To toggle the single LED */\r
+#define mainTOGGLE_LED()                                       ( PORT3->OMR =  0x02000200 )\r
+\r
+/* A block time of zero simply means "don't block". */\r
+#define mainDONT_BLOCK                                         ( 0UL )\r
+\r
+/* The period after which the check timer will expire, in ms, provided no errors\r
+have been reported by any of the standard demo tasks.  ms are converted to the\r
+equivalent in ticks using the portTICK_RATE_MS constant. */\r
+#define mainCHECK_TIMER_PERIOD_MS                      ( 3000UL / portTICK_RATE_MS )\r
+\r
+/* The period at which the check timer will expire, in ms, if an error has been\r
+reported in one of the standard demo tasks.  ms are converted to the equivalent\r
+in ticks using the portTICK_RATE_MS constant. */\r
+#define mainERROR_CHECK_TIMER_PERIOD_MS        ( 200UL / portTICK_RATE_MS )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The check timer callback function, as described at the top of this file.\r
+ */\r
+static void prvCheckTimerCallback( xTimerHandle xTimer );\r
+\r
+/*\r
+ * Register check tasks, and the tasks used to write over and check the contents\r
+ * of the FPU registers, as described at the top of this file.  The nature of\r
+ * these files necessitates that they are written in an assembly file.\r
+ */\r
+static void vRegTest1Task( void *pvParameters );\r
+static void vRegTest2Task( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The following two variables are used to communicate the status of the\r
+register check tasks to the check software timer.  If the variables keep\r
+incrementing, then the register check tasks has not discovered any errors.  If\r
+a variable stops incrementing, then an error has been found. */\r
+volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_full( void )\r
+{\r
+xTimerHandle xCheckTimer = NULL;\r
+\r
+       /* Start all the other standard demo/test tasks.  The have not particular\r
+       functionality, but do demonstrate how to use the FreeRTOS API and test the\r
+       kernel port. */\r
+       vStartIntegerMathTasks( tskIDLE_PRIORITY );\r
+       vStartDynamicPriorityTasks();\r
+       vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+       vCreateBlockTimeTasks();\r
+       vStartCountingSemaphoreTasks();\r
+       vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
+       vStartRecursiveMutexTasks();\r
+       vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+       vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+       vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
+       \r
+       /* Create the register check tasks, as described at the top of this\r
+       file */\r
+       xTaskCreate( vRegTest1Task, ( signed char * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
+       xTaskCreate( vRegTest2Task, ( signed char * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
+\r
+       /* Create the software timer that performs the 'check' functionality,\r
+       as described at the top of this file. */\r
+       xCheckTimer = xTimerCreate( ( const signed char * ) "CheckTimer",/* A text name, purely to help debugging. */\r
+                                                               ( mainCHECK_TIMER_PERIOD_MS ),          /* The timer period, in this case 3000ms (3s). */\r
+                                                               pdTRUE,                                                         /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */\r
+                                                               ( void * ) 0,                                           /* The ID is not used, so can be set to anything. */\r
+                                                               prvCheckTimerCallback                           /* The callback function that inspects the status of all the other tasks. */\r
+                                                         );    \r
+       \r
+       if( xCheckTimer != NULL )\r
+       {\r
+               xTimerStart( xCheckTimer, mainDONT_BLOCK );\r
+       }\r
+\r
+       /* The set of tasks created by the following function call have to be \r
+       created last as they keep account of the number of tasks they expect to see \r
+       running. */\r
+       vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+       /* Start the scheduler. */\r
+       vTaskStartScheduler();\r
+       \r
+       /* If all is well, the scheduler will now be running, and the following line\r
+       will never be reached.  If the following line does execute, then there was\r
+       insufficient FreeRTOS heap memory available for the idle and/or timer tasks\r
+       to be created.  See the memory management section on the FreeRTOS web site\r
+       for more details. */\r
+       for( ;; )\r
+       {\r
+               __asm volatile( "NOP" );\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTimerCallback( xTimerHandle xTimer )\r
+{\r
+static long lChangedTimerPeriodAlready = pdFALSE;\r
+static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
+unsigned long ulErrorFound = pdFALSE;\r
+\r
+       /* Check all the demo tasks (other than the flash tasks) to ensure\r
+       that they are all still running, and that none have detected an error. */\r
+\r
+       if( xAreMathsTaskStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+\r
+       if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+\r
+       if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+\r
+       if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+\r
+       if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+\r
+       if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+\r
+       if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+\r
+       if( xIsCreateTaskStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+\r
+       if( xArePollingQueuesStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+\r
+       if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+       \r
+       /* Check that the register test 1 task is still running. */\r
+       if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+       ulLastRegTest1Value = ulRegTest1LoopCounter;\r
+\r
+       /* Check that the register test 2 task is still running. */\r
+       if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
+       {\r
+               ulErrorFound = pdTRUE;\r
+       }\r
+       ulLastRegTest2Value = ulRegTest2LoopCounter;\r
+\r
+       /* Toggle the check LED to give an indication of the system status.  If\r
+       the LED toggles every mainCHECK_TIMER_PERIOD_MS milliseconds then\r
+       everything is ok.  A faster toggle indicates an error. */\r
+       mainTOGGLE_LED();       \r
+       \r
+       /* Have any errors been latch in ulErrorFound?  If so, shorten the\r
+       period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.\r
+       This will result in an increase in the rate at which mainCHECK_LED\r
+       toggles. */\r
+       if( ulErrorFound != pdFALSE )\r
+       {\r
+               if( lChangedTimerPeriodAlready == pdFALSE )\r
+               {\r
+                       lChangedTimerPeriodAlready = pdTRUE;\r
+                       \r
+                       /* This call to xTimerChangePeriod() uses a zero block time.\r
+                       Functions called from inside of a timer callback function must\r
+                       *never* attempt to block. */\r
+                       xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* This is a naked function. */\r
+static void vRegTest1Task( void *pvParameters )\r
+{\r
+       __asm volatile\r
+       (\r
+               "                                                                                                                       \n" /* Fill the core registers with known values. */\r
+               "       mov r0, #100                                                                                    \n"\r
+               "       mov r1, #101                                                                                    \n"\r
+               "       mov r2, #102                                                                                    \n"\r
+               "       mov r3, #103                                                                                    \n"\r
+               "       mov     r4, #104                                                                                        \n"\r
+               "       mov     r5, #105                                                                                        \n"\r
+               "       mov     r6, #106                                                                                        \n"\r
+               "       mov r7, #107                                                                                    \n"\r
+               "       mov     r8, #108                                                                                        \n"\r
+               "       mov     r9, #109                                                                                        \n"\r
+               "       mov     r10, #110                                                                                       \n"\r
+               "       mov     r11, #111                                                                                       \n"\r
+               "       mov r12, #112                                                                                   \n"\r
+               "                                                                                                                       \n"\r
+               "       vmov d0, r0, r1                                                                                 \n" /* Fill the VFP registers with known values. */\r
+               "       vmov d1, r2, r3                                                                                 \n"\r
+               "       vmov d2, r4, r5                                                                                 \n"\r
+               "       vmov d3, r6, r7                                                                                 \n"\r
+               "       vmov d4, r8, r9                                                                                 \n"\r
+               "       vmov d5, r10, r11                                                                               \n"\r
+               "       vmov d6, r0, r1                                                                                 \n"\r
+               "       vmov d7, r2, r3                                                                                 \n"\r
+               "       vmov d8, r4, r5                                                                                 \n"\r
+               "       vmov d9, r6, r7                                                                                 \n"\r
+               "       vmov d10, r8, r9                                                                                \n"\r
+               "       vmov d11, r10, r11                                                                              \n"\r
+               "       vmov d12, r0, r1                                                                                \n"\r
+               "       vmov d13, r2, r3                                                                                \n"\r
+               "       vmov d14, r4, r5                                                                                \n"\r
+               "       vmov d15, r6, r7                                                                                \n"\r
+               "                                                                                                                       \n"\r
+               "reg1_loop:                                                                                                     \n" /* Check all the VFP registers still contain the values set above." */\r
+               "       push { r0-r1 }                                                                                  \n" /* First save registers that are clobbered by the test. */\r
+               "                                                                                                                       \n"\r
+               "       vmov r0, r1, d0                                                                                 \n"\r
+               "       cmp r0, #100                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #101                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d1                                                                                 \n"\r
+               "       cmp r0, #102                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #103                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d2                                                                                 \n"\r
+               "       cmp r0, #104                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #105                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d3                                                                                 \n"\r
+               "       cmp r0, #106                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #107                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d4                                                                                 \n"\r
+               "       cmp r0, #108                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #109                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d5                                                                                 \n"\r
+               "       cmp r0, #110                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #111                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d6                                                                                 \n"\r
+               "       cmp r0, #100                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #101                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d7                                                                                 \n"\r
+               "       cmp r0, #102                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #103                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d8                                                                                 \n"\r
+               "       cmp r0, #104                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #105                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d9                                                                                 \n"\r
+               "       cmp r0, #106                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #107                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d10                                                                                \n"\r
+               "       cmp r0, #108                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #109                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d11                                                                                \n"\r
+               "       cmp r0, #110                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #111                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d12                                                                                \n"\r
+               "       cmp r0, #100                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #101                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d13                                                                                \n"\r
+               "       cmp r0, #102                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #103                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d14                                                                                \n"\r
+               "       cmp r0, #104                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #105                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d15                                                                                \n"\r
+               "       cmp r0, #106                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "       cmp r1, #107                                                                                    \n"\r
+               "       bne reg1_error_loopf                                                                    \n"\r
+               "                                                                                                                       \n"\r
+               "       pop {r0-r1}                                                                                             \n" /* Restore the registers that were clobbered by the test. */\r
+               "                                                                                                                       \n"\r
+               "       b reg1_loopf_pass                                                                               \n" /* VFP register test passed.  Jump to the core register test. */\r
+               "                                                                                                                       \n"\r
+               "reg1_error_loopf:                                                                                      \n"\r
+               "       b reg1_error_loopf                                                                              \n" /* If this line is hit then a VFP register value was found to be\n incorrect. */\r
+               "                                                                                                                       \n"\r
+               "reg1_loopf_pass:                                                                                       \n"\r
+               "                                                                                                                       \n"\r
+               "       cmp     r0, #100                                                                                        \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r1, #101                                                                                        \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r2, #102                                                                                        \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp r3, #103                                                                                    \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r4, #104                                                                                        \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r5, #105                                                                                        \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r6, #106                                                                                        \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r7, #107                                                                                        \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r8, #108                                                                                        \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r9, #109                                                                                        \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r10, #110                                                                                       \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r11, #111                                                                                       \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "       cmp     r12, #112                                                                                       \n"\r
+               "       bne     reg1_error_loop                                                                         \n"\r
+               "                                                                                                                       \n"\r
+               "       push { r0-r1 }                                                                                  \n" /* Everything passed, increment the loop counter. */\r
+               "       ldr     r0, =ulRegTest1LoopCounter                                                      \n"\r
+               "       ldr r1, [r0]                                                                                    \n"\r
+               "       adds r1, r1, #1                                                                                 \n"\r
+               "       str r1, [r0]                                                                                    \n"\r
+               "       pop { r0-r1 }                                                                                   \n"\r
+               "                                                                                                                       \n"\r
+               "       b reg1_loop                                                                                             \n" /* Start again. */\r
+               "                                                                                                                       \n"\r
+               "reg1_error_loop:                                                                                       \n" /* If this line is hit then there was an error in a core register value. */\r
+               "       b reg1_error_loop                                                                               \n" /* The loop ensures the loop counter stops incrementing. */\r
+               "       nop                                                                                                             "\r
+       );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* This is a naked function. */\r
+static void vRegTest2Task( void *pvParameters )\r
+{\r
+       __asm volatile\r
+       (\r
+               "       mov r0, #-1                                                                                             \n" /* Set all the core registers to known values. */\r
+               "       mov r1, #1                                                                                              \n"\r
+               "       mov r2, #2                                                                                              \n"\r
+               "       mov r3, #3                                                                                              \n"\r
+               "       mov     r4, #4                                                                                          \n"\r
+               "       mov     r5, #5                                                                                          \n"\r
+               "       mov     r6, #6                                                                                          \n"\r
+               "       mov r7, #7                                                                                              \n"\r
+               "       mov     r8, #8                                                                                          \n"\r
+               "       mov     r9, #9                                                                                          \n"\r
+               "       mov     r10, #10                                                                                        \n"\r
+               "       mov     r11, #11                                                                                        \n"\r
+               "       mov r12, #12                                                                                    \n"\r
+               "                                                                                                                       \n"\r
+               "       vmov d0, r0, r1                                                                                 \n" /* Set all the VFP to known values. */\r
+               "       vmov d1, r2, r3                                                                                 \n"\r
+               "       vmov d2, r4, r5                                                                                 \n"\r
+               "       vmov d3, r6, r7                                                                                 \n"\r
+               "       vmov d4, r8, r9                                                                                 \n"\r
+               "       vmov d5, r10, r11                                                                               \n"\r
+               "       vmov d6, r0, r1                                                                                 \n"\r
+               "       vmov d7, r2, r3                                                                                 \n"\r
+               "       vmov d8, r4, r5                                                                                 \n"\r
+               "       vmov d9, r6, r7                                                                                 \n"\r
+               "       vmov d10, r8, r9                                                                                \n"\r
+               "       vmov d11, r10, r11                                                                              \n"\r
+               "       vmov d12, r0, r1                                                                                \n"\r
+               "       vmov d13, r2, r3                                                                                \n"\r
+               "       vmov d14, r4, r5                                                                                \n"\r
+               "       vmov d15, r6, r7                                                                                \n"\r
+               "                                                                                                                       \n"\r
+               "reg2_loop:                                                                                                     \n"\r
+               "                                                                                                                       \n"\r
+               "       push { r0-r1 }                                                                                  \n" /* Check all the VFP registers still contain the values set above. */\r
+               "       vmov r0, r1, d0                                                                                 \n" /*First save registers that are clobbered by the test. */\r
+               "       cmp r0, #-1                                                                                             \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #1                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d1                                                                                 \n"\r
+               "       cmp r0, #2                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #3                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d2                                                                                 \n"\r
+               "       cmp r0, #4                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #5                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d3                                                                                 \n"\r
+               "       cmp r0, #6                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #7                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d4                                                                                 \n"\r
+               "       cmp r0, #8                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #9                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d5                                                                                 \n"\r
+               "       cmp r0, #10                                                                                             \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #11                                                                                             \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d6                                                                                 \n"\r
+               "       cmp r0, #-1                                                                                             \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #1                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d7                                                                                 \n"\r
+               "       cmp r0, #2                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #3                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d8                                                                                 \n"\r
+               "       cmp r0, #4                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #5                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d9                                                                                 \n"\r
+               "       cmp r0, #6                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #7                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d10                                                                                \n"\r
+               "       cmp r0, #8                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #9                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d11                                                                                \n"\r
+               "       cmp r0, #10                                                                                             \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #11                                                                                             \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d12                                                                                \n"\r
+               "       cmp r0, #-1                                                                                             \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #1                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d13                                                                                \n"\r
+               "       cmp r0, #2                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #3                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d14                                                                                \n"\r
+               "       cmp r0, #4                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #5                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       vmov r0, r1, d15                                                                                \n"\r
+               "       cmp r0, #6                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "       cmp r1, #7                                                                                              \n"\r
+               "       bne reg2_error_loopf                                                                    \n"\r
+               "                                                                                                                       \n"\r
+               "       pop {r0-r1}                                                                                             \n" /* Restore the registers that were clobbered by the test. */\r
+               "                                                                                                                       \n"\r
+               "       b reg2_loopf_pass                                                                               \n" /* VFP register test passed.  Jump to the core register test. */\r
+               "                                                                                                                       \n"\r
+               "reg2_error_loopf:                                                                                      \n"\r
+               "       b reg2_error_loopf                                                                              \n" /* If this line is hit then a VFP register value was found to be incorrect. */\r
+               "                                                                                                                       \n"\r
+               "reg2_loopf_pass:                                                                                       \n"\r
+               "                                                                                                                       \n"\r
+               "       cmp     r0, #-1                                                                                         \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r1, #1                                                                                          \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r2, #2                                                                                          \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp r3, #3                                                                                              \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r4, #4                                                                                          \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r5, #5                                                                                          \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r6, #6                                                                                          \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r7, #7                                                                                          \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r8, #8                                                                                          \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r9, #9                                                                                          \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r10, #10                                                                                        \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r11, #11                                                                                        \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "       cmp     r12, #12                                                                                        \n"\r
+               "       bne     reg2_error_loop                                                                         \n"\r
+               "                                                                                                                       \n"\r
+               "       push { r0-r1 }                                                                                  \n" /* Increment the loop counter to indicate this test is still functioning correctly. */\r
+               "       ldr     r0, =ulRegTest2LoopCounter                                                      \n"\r
+               "       ldr r1, [r0]                                                                                    \n"\r
+               "       adds r1, r1, #1                                                                                 \n"\r
+               "       str r1, [r0]                                                                                    \n"\r
+               "       pop { r0-r1 }                                                                                   \n"\r
+               "                                                                                                                       \n"\r
+               "       b reg2_loop                                                                                             \n" /* Start again. */\r
+               "                                                                                                                       \n"\r
+               "reg2_error_loop:                                                                                       \n" /* If this line is hit then there was an error in a core register value. */\r
+               "       b reg2_error_loop                                                                               \n" /* This loop ensures the loop counter variable stops incrementing. */\r
+               "       nop                                                                                                             \n"\r
+       );\r
+}\r
+\r
+\r
+\r