//*****************************************************************************\r
//\r
-// Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com/\r
+// Copyright (C) 2013 - 2015 Texas Instruments Incorporated - http://www.ti.com/\r
//\r
// Redistribution and use in source and binary forms, with or without\r
// modification, are permitted provided that the following conditions\r
//\r
//****************************************************************************\r
\r
+/******************************************************************************\r
+* Definitions for 8/16/32-bit wide memory access *\r
+******************************************************************************/\r
+#define HWREG8(x) (*((volatile uint8_t *)(x)))\r
+#define HWREG16(x) (*((volatile uint16_t *)(x)))\r
+#define HWREG32(x) (*((volatile uint32_t *)(x)))\r
+#define HWREG(x) (HWREG16(x))\r
+#define HWREG8_L(x) (*((volatile uint8_t *)((uint8_t *)&x)))\r
+#define HWREG8_H(x) (*((volatile uint8_t *)(((uint8_t *)&x)+1)))\r
+#define HWREG16_L(x) (*((volatile uint16_t *)((uint16_t *)&x)))\r
+#define HWREG16_H(x) (*((volatile uint16_t *)(((uint16_t *)&x)+1)))\r
+\r
+/******************************************************************************\r
+* Definitions for 8/16/32-bit wide bit band access *\r
+******************************************************************************/\r
+#define HWREGBIT8(x, b) (HWREG8(((uint32_t)(x) & 0xF0000000) | 0x02000000 | (((uint32_t)(x) & 0x000FFFFF) << 5) | ((b) << 2)))\r
+#define HWREGBIT16(x, b) (HWREG16(((uint32_t)(x) & 0xF0000000) | 0x02000000 | (((uint32_t)(x) & 0x000FFFFF) << 5) | ((b) << 2)))\r
+#define HWREGBIT32(x, b) (HWREG32(((uint32_t)(x) & 0xF0000000) | 0x02000000 | (((uint32_t)(x) & 0x000FFFFF) << 5) | ((b) << 2)))\r
+\r
// Intrinsics with ARM equivalents\r
-#if defined ( __TMS470__ ) /* TI CGT Compiler */\r
+#if defined ( __TI_ARM__ ) /* TI CGT Compiler */\r
\r
#include <cmsis_ccs.h>\r
\r
#define __bis_SR_register(x) { while(1); /* Using not-supported MSP430 intrinsic. No replacement available. */ }\r
#define __bis_SR_register_on_exit(x) { while(1); /* Using not-supported MSP430 intrinsic. Recommended to write to SCS_SCR register. */ }\r
#define __bic_SR_register_on_exit(x) { while(1); /* Using not-supported MSP430 intrinsic. Recommended to write to SCS_SCR register. */ }\r
+#define __delay_cycles(x) { while(1); /* Using not-supported MSP430 intrinsic. Recommended to use a timer or a custom for loop. */ }\r
\r
#elif defined ( __CC_ARM ) /* ARM Compiler */\r
\r
#define __bis_SR_register(x) { while(1); /* Using not-supported MSP430 intrinsic. No replacement available. */ }\r
#define __bis_SR_register_on_exit(x) { while(1); /* Using not-supported MSP430 intrinsic. Recommended to write to SCS_SCR register. */ }\r
#define __bic_SR_register_on_exit(x) { while(1); /* Using not-supported MSP430 intrinsic. Recommended to write to SCS_SCR register. */ }\r
+#define __delay_cycles(x) { while(1); /* Using not-supported MSP430 intrinsic. Recommended to use a timer or a custom for loop. */ }\r
\r
#elif defined ( __GNUC__ ) /* GCC Compiler */\r
-\r
+#undef __wfi\r
+#define __wfi() asm(" wfi")\r
#define __sleep() __wfi()\r
#define __deep_sleep() { (*((volatile uint32_t *)(0xE000ED10))) |= 0x00000004; __wfi(); (*((volatile uint32_t *)(0xE000ED10))) &= ~0x00000004; }\r
#define __low_power_mode_off_on_exit() { (*((volatile uint32_t *)(0xE000ED10))) &= ~0x00000002; }\r
#define __bis_SR_register(x) { while(1); /* Using not-supported MSP430 intrinsic. No replacement available. */ }\r
#define __bis_SR_register_on_exit(x) { while(1); /* Using not-supported MSP430 intrinsic. Recommended to write to SCS_SCR register. */ }\r
#define __bic_SR_register_on_exit(x) { while(1); /* Using not-supported MSP430 intrinsic. Recommended to write to SCS_SCR register. */ }\r
+#define __delay_cycles(x) { while(1); /* Using not-supported MSP430 intrinsic. Recommended to use a timer or a custom for loop. */ }\r
\r
#endif\r
\r