--- /dev/null
+/**\r
+ * \file\r
+ *\r
+ * \brief ASF Patch Header file definitions for SAM4L.\r
+ *\r
+ * Copyright (c) 2012 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ * Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+#ifndef SAM4L_PATCH_ASF_H_INCLUDED\r
+#define SAM4L_PATCH_ASF_H_INCLUDED\r
+\r
+// These defines are used for sam/drivers/flashcalw implementation.\r
+#define FLASHCALW_FCMD_CMD_HSEN (0x10u << 0)\r
+#define FLASHCALW_FCMD_CMD_HSDIS (0x11u << 0)\r
+\r
+// These defines are used to keep compatibility with existing \r
+// sam/drivers/usart implementation from SAM3/4 products with SAM4L product.\r
+#define US_MR_USART_MODE_HW_HANDSHAKING US_MR_USART_MODE_HARDWARE\r
+#define US_MR_USART_MODE_IS07816_T_0 US_MR_USART_MODE_ISO7816_T0\r
+#define US_MR_USART_MODE_IS07816_T_1 US_MR_USART_MODE_ISO7816_T1\r
+#define US_MR_NBSTOP_2_BIT US_MR_NBSTOP_2\r
+#define US_MR_NBSTOP_1_5_BIT US_MR_NBSTOP_1_5\r
+#define US_MR_NBSTOP_1_BIT US_MR_NBSTOP_1\r
+#define US_MR_CHRL_8_BIT US_MR_CHRL_8\r
+#define US_MR_PAR_NO US_MR_PAR_NONE\r
+#define US_MR_PAR_MULTIDROP US_MR_PAR_MULTI\r
+#define US_IF US_IFR\r
+#define US_WPSR_WPVS US_WPSR_WPV_1\r
+\r
+#if (!defined SCIF_RCOSC_FREQUENCY)\r
+# define SCIF_RCOSC_FREQUENCY 115200\r
+#endif\r
+\r
+// These defines for homogeneity with other SAM header files.\r
+#define CHIP_FREQ_FWS_0 (18000000UL) /**< \brief Maximum operating frequency when FWS is 0 */\r
+#define CHIP_FREQ_FWS_1 (36000000UL) /**< \brief Maximum operating frequency when FWS is 1 */\r
+// WARNING NOTE: these are preliminary values.\r
+#define CHIP_FREQ_FLASH_HSEN_FWS_0 (18000000UL) /**< \brief Maximum operating frequency when FWS is 0 and the FLASH HS mode is enabled */\r
+#define CHIP_FREQ_FLASH_HSEN_FWS_1 (36000000UL) /**< \brief Maximum operating frequency when FWS is 1 and the FLASH HS mode is enabled */\r
+\r
+// Size of HRAMC1 with 32-bit access\r
+#undef HRAMC1_SIZE\r
+#define HRAMC1_SIZE (0x800UL)\r
+\r
+// USBC related offsets\r
+#define USBC_UHINT_P0INT_Pos 8\r
+#define USBC_UHINTE_P0INTE_Pos 8\r
+#define USBC_UPCFG0_PBK_Pos 2\r
+#define USBC_UPCFG0_PBK_Msk (0x1u << USBC_UPCFG0_PBK_Pos)\r
+\r
+// These defines are used to keep compatibility with existing \r
+// sam/drivers/tc implementation from SAM3/4 products with SAM4L product. \r
+#define TC_SMMR TC_SMC\r
+#define TC_CMR_LDRA_RISING TC_CMR_LDRA_POS_EDGE_TIOA\r
+#define TC_CMR_LDRB_FALLING TC_CMR_LDRB_NEG_EDGE_TIOA\r
+#define TC_CMR_ETRGEDG_FALLING TC_CMR_ETRGEDG_NEG_EDGE\r
+\r
+// These defines are used to keep compatibility with existing \r
+// sam/drivers/spi implementation from SAM3/4 products with SAM4L product. \r
+#define SPI_CSR_BITS_8_BIT SPI_CSR_BITS_8_BPT\r
+\r
+#define SPI_WPSR_WPVS_Pos SPI_WPSR_SPIWPVS_Pos\r
+#define SPI_WPSR_WPVS_Msk SPI_WPSR_SPIWPVS_Msk\r
+#define SPI_WPSR_WPVSRC_Pos SPI_WPSR_SPIWPVSRC_Pos\r
+#define SPI_WPSR_WPVSRC_Msk SPI_WPSR_SPIWPVSRC_Msk\r
+\r
+// These defines are used to keep compatibility with existing \r
+// sam/drivers/crccu implementation from SAM3/4 products with SAM4L product. \r
+#define CRCCU_DMA_EN CRCCU_DMAEN\r
+#define CRCCU_DMA_DIS CRCCU_DMADIS\r
+#define CRCCU_DMA_SR CRCCU_DMASR\r
+#define CRCCU_DMA_IER CRCCU_DMAIER\r
+#define CRCCU_DMA_IDR CRCCU_DMAIDR\r
+#define CRCCU_DMA_IMR CRCCU_DMAIMR\r
+#define CRCCU_DMA_ISR CRCCU_DMAISR\r
+#define CRCCU_DMA_EN_DMAEN CRCCU_DMAEN_DMAEN\r
+#define CRCCU_DMA_DIS_DMADIS CRCCU_DMADIS_DMADIS\r
+#define CRCCU_DMA_SR_DMASR CRCCU_DMASR_DMASR\r
+#define CRCCU_DMA_IER_DMAIER CRCCU_DMAIER_DMAIER\r
+#define CRCCU_DMA_IDR_DMAIDR CRCCU_DMAIDR_DMAIDR\r
+#define CRCCU_DMA_IMR_DMAIMR CRCCU_DMAIMR_DMAIMR\r
+#define CRCCU_DMA_ISR_DMAISR CRCCU_DMAISR_DMAISR\r
+#define CRCCU_MR_PTYPE_CCITT8023 CRCCU_MR_PTYPE(0)\r
+#define CRCCU_MR_PTYPE_CASTAGNOLI CRCCU_MR_PTYPE(1)\r
+#define CRCCU_MR_PTYPE_CCITT16 CRCCU_MR_PTYPE(2)\r
+\r
+#endif // SAM4L_PATCH_ASF_H_INCLUDED\r
projects / freertos / blobdiff