Kernel changes:

[freertos] / FreeRTOS / Demo / CORTEX_M7_SAMV71_Xplained / libchip_samv7 / include / sdramc.h

diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libchip_samv7/include/sdramc.h b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libchip_samv7/include/sdramc.h
new file mode 100644 (file)
index 0000000..8757060
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libchip_samv7/include/sdramc.h
@@ -0,0 +1,68 @@
+/* ----------------------------------------------------------------------------\r
+ *         ATMEL Microcontroller Software Support\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2010, Atmel Corporation\r
+\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+/**\r
+ *  \file\r
+ *\r
+ *  Definitions and function prototype for SDRAMC.\r
+ */\r
+\r
+// ----------------------------------------------------------------------------------------------------------\r
+// SDRAM\r
+// ----------------------------------------------------------------------------------------------------------\r
+/**  SDRAMC Configuration */\r
+#define EBI_SDRAMC_ADDR (0x70000000u)\r
+\r
+/**  SDRAM bus width */\r
+#define BOARD_SDRAM_BUSWIDTH    16\r
+\r
+\r
+typedef struct _SSdramc_config\r
+{\r
+  uint32_t dwColumnBits ;                     // Number of Column Bits\r
+  uint32_t dwRowBits ;                        // Number of Row Bits\r
+  uint32_t dwBanks ;                          // Number of Banks\r
+  uint32_t dwCAS ;                            // CAS Latency\r
+  uint32_t dwDataBusWidth ;                   // Data Bus Width\r
+  uint32_t dwWriteRecoveryDelay ;             // Write Recovery Delay\r
+  uint32_t dwRowCycleDelay_RowRefreshCycle ;  // Row Cycle Delay and Row Refresh Cycle\r
+  uint32_t dwRowPrechargeDelay ;              // Row Precharge Delay\r
+  uint32_t dwRowColumnDelay ;                 // Row to Column Delay\r
+  uint32_t dwActivePrechargeDelay ;           // Active to Precharge Delay\r
+  uint32_t dwExitSelfRefreshActiveDelay ;     // Exit Self Refresh to Active Delay\r
+  uint32_t dwBK1 ;                            // bk1 addr\r
+\r
+} SSdramc_config ;\r
+\r
+typedef struct _SSdramc_Memory\r
+{\r
+  SSdramc_config cfg ;\r
+\r
+} SSdramc_Memory ;\r
+\r
+extern void SDRAMC_Configure( SSdramc_Memory* pMemory, uint32_t dwClockFrequency ) ;\r