--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * SAM Software Package License \r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2014, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * Implementation WM8904 driver.\r
+ *\r
+ */\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Headers\r
+ *----------------------------------------------------------------------------*/\r
+\r
+#include "board.h"\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Type\r
+ *----------------------------------------------------------------------------*/\r
+typedef struct {\r
+ uint16_t value;\r
+ uint8_t address;\r
+}WM8904_PARA;\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Exported functions\r
+ *----------------------------------------------------------------------------*/\r
+/**\r
+ * \brief Read data from WM8904 Register.\r
+ *\r
+ * \param pTwid Pointer to twi driver structure\r
+ * \param device Twi slave address.\r
+ * \param regAddr Register address to read.\r
+ * \return value in the given register.\r
+ */\r
+uint16_t WM8904_Read(Twid *pTwid,\r
+ uint32_t device,\r
+ uint32_t regAddr)\r
+{\r
+ uint16_t bitsDataRegister;\r
+ uint8_t Tdata[2]={0,0};\r
+\r
+ TWID_Read(pTwid, device, regAddr, 1, Tdata, 2, 0);\r
+ bitsDataRegister = (Tdata[0] << 8) | Tdata[1];\r
+ return bitsDataRegister;\r
+}\r
+\r
+/**\r
+ * \brief Write data to WM8904 Register.\r
+ *\r
+ * \param pTwid Pointer to twi driver structure\r
+ * \param device Twi slave address.\r
+ * \param regAddr Register address to read.\r
+ * \param data Data to write\r
+ */\r
+void WM8904_Write(Twid *pTwid,\r
+ uint32_t device,\r
+ uint32_t regAddr,\r
+ uint16_t data)\r
+{\r
+ uint8_t tmpData[2];\r
+\r
+ tmpData[0] = (data & 0xff00) >> 8;\r
+ tmpData[1] = data & 0xff;\r
+ TWID_Write(pTwid, device, regAddr, 1, tmpData, 2, 0);\r
+}\r
+\r
+static WM8904_PARA wm8904_access_slow[]=\r
+{ \r
+ { 0x0000, 0}, /** R0 - SW Reset and ID */ \r
+ { 0x001A, 4}, /** R4 - Bias Control 0 */ \r
+ { 0x0047, 5}, /** R5 - VMID Control 0 */ /*insert_delay_ms 5*/\r
+\r
+ { 0x0043, 5}, /** R5 - VMID Control 0 */ \r
+ { 0x000B, 4}, /** R4 - Bias Control 0 */ \r
+\r
+ { 0x0003, 0x0C}, /** R12 - Power Management 0 CC */ \r
+\r
+ { 0x0003, 0x0E}, /** R14 - Power Management 2 */ \r
+ { 0x000C, 0x12}, /** R18 - Power Management 6 */\r
+ { 0x0000, 0x21}, /** R33 - DAC Digital 1 */ \r
+ { 0x0000, 0x3D}, /** R61 - Analogue OUT12 ZC */ \r
+ { 0x0001, 0x62}, /** R98 - Charge Pump 0 */ \r
+ { 0x0005, 0x68}, /** R104 - Class W 0 */ \r
+\r
+ //FLL setting,32.768KHZ MCLK input,12.288M output.\r
+ { 0x0000, 0x74}, /** R116 - FLL Control 1 */ \r
+ { 0x0704, 0x75}, /** R117 - FLL Control 2 */ \r
+ { 0x8000, 0x76}, /** R118 - FLL Control 3 */ \r
+ { 0x1760, 0x77}, /** R119 - FLL Control 4 */ \r
+ { 0x0005, 0x74}, /** R116 - FLL Control 1 */ /*insert_delay_ms 5*/\r
+\r
+ { 0x0C05, 0x15}, /** R21 - Clock Rates 1 */ \r
+ { 0x845E, 0x14}, /** R20 - Clock Rates 0 */ \r
+ { 0x4006, 0x16}, /** R22 - Clock Rates 2 */\r
+\r
+ ////////////////WM8904 IIS master\r
+ //BCLK=12.288MHz/8=1.536MHz\r
+ //LRCK=1.536MHz/32=48KHz\r
+ //{ 0x0042, 0x18}, /** R24 - Audio Interface 0 */ \r
+ { 0x0042, 0x19}, /** R25 - Audio Interface 1 */ \r
+ { 0x00E8, 0x1A}, /** R26 - Audio Interface 2 */ \r
+ { 0x0820, 0x1B}, /** R27 - Audio Interface 3 */ \r
+ ////////////////ADC\r
+\r
+ { 0x0003, 0x0C}, /** R12 - Power Management 0 */ \r
+ { 0x000F, 0x12}, /** R18 - Power Management 6 */ /*insert_delay_ms 5*/\r
+\r
+ { 0x0010, 0x2C}, /** R44 - Analogue Left Input 0 */ \r
+ { 0x0010, 0x2D}, /** R45 - Analogue Right Input 0 */ \r
+ { 0x0044, 0x2E}, /** R46 - Analogue Left Input 1 */ \r
+ { 0x0044, 0x2F}, /** R47 - Analogue Right Input 1 */\r
+\r
+ { 0x0011, 0x5A}, /** R90 - Analogue HP 0 */ \r
+ { 0x0033, 0x5A}, /** R90 - Analogue HP 0 */ \r
+\r
+ { 0x000F, 0x43}, /** R67 - DC Servo 0 */ \r
+ { 0x00F0, 0x44}, /** R68 - DC Servo 1 */ /*insert_delay_ms 100*/\r
+\r
+ //{ 0x0000, 0xFF}, /** end */ \r
+ { 0x0077, 0x5A}, /** R90 - Analogue HP 0 */ \r
+ { 0x00FF, 0x5A}, /** R90 - Analogue HP 0 */ \r
+ { 0x00B9, 0x39}, /** R57 - Analogue OUT1 Left */ \r
+ { 0x00B9, 0x3A}, /** R58 - Analogue OUT1 Right */ \r
+\r
+ //{ 0x0150, 0x18} ;Loopback\r
+};\r
+\r
+static WM8904_PARA wm8904_access_main[] = \r
+{ \r
+ //{ 0x8904, 0}, /** R0 - SW Reset and ID */ \r
+ //{ 0x0000, 1}, /** R1 - Revision */ \r
+ //{ 0x0000, 2}, /** R2 */ \r
+ //{ 0x0000, 3}, /** R3 */ \r
+ { 0x0019, 4}, /** R4 - Bias Control 0 */ \r
+ { 0x0043, 5}, /** R5 - VMID Control 0 */ \r
+ //{ 0x0003, 6}, /** R6 - Mic Bias Control 0 */ \r
+ //{ 0xC000, 7}, /** R7 - Mic Bias Control 1 */ \r
+ //{ 0x001E, 8}, /** R8 - Analogue DAC 0 */ \r
+ //{ 0xFFFF, 9}, /** R9 - mic Filter Control */ \r
+ //{ 0x0001, 10}, /** R10 - Analogue ADC 0 */ \r
+ //{ 0x0000, 11}, /** R11 */ \r
+ { 0x0003, 12}, /** R12 - Power Management 0 */ \r
+ //{ 0x0000, 13}, /** R13 */ \r
+ { 0x0003, 14}, /** R14 - Power Management 2 */ \r
+ //{ 0x0003, 15}, /** R15 - Power Management 3 */ \r
+ //{ 0x0000, 16}, /** R16 */ \r
+ //{ 0x0000, 17}, /** R17 */ \r
+ { 0x000F, 18}, /** R18 - Power Management 6 */ \r
+ //{ 0x0000, 19}, /** R19 */ \r
+ { 0x845E, 20}, /** R20 - Clock Rates 0 */ \r
+ //{ 0x3C07, 21}, /** R21 - Clock Rates 1 */ \r
+ { 0x0006, 22}, /** R22 - Clock Rates 2 */ \r
+ //{ 0x0000, 23}, /** R23 */ \r
+ //{ 0x1FFF, 24}, /** R24 - Audio Interface 0 */ \r
+ { 0x404A, 25}, /** R25 - Audio Interface 1 */ \r
+ //{ 0x0004, 26}, /** R26 - Audio Interface 2 */ \r
+ { 0x0840, 27}, /** R27 - Audio Interface 3 */ \r
+ //{ 0x0000, 28}, /** R28 */ \r
+ //{ 0x0000, 29}, /** R29 */ \r
+ //{ 0x00FF, 30}, /** R30 - DAC Digital Volume Left */ \r
+ //{ 0x00FF, 31}, /** R31 - DAC Digital Volume Right */ \r
+ //{ 0x0FFF, 32}, /** R32 - DAC Digital 0 */ \r
+ { 0x0000, 33}, /** R33 - DAC Digital 1 */ \r
+ //{ 0x0000, 34}, /** R34 */ \r
+ //{ 0x0000, 35}, /** R35 */ \r
+ //{ 0x00FF, 36}, /** R36 - ADC Digital Volume Left */ \r
+ //{ 0x00FF, 37}, /** R37 - ADC Digital Volume Right */ \r
+ //{ 0x0073, 38}, /** R38 - ADC Digital 0 */ \r
+ //{ 0x1800, 39}, /** R39 - Digital Microphone 0 */ \r
+ //{ 0xDFEF, 40}, /** R40 - DRC 0 */ \r
+ //{ 0xFFFF, 41}, /** R41 - DRC 1 */ \r
+ //{ 0x003F, 42}, /** R42 - DRC 2 */ \r
+ //{ 0x07FF, 43}, /** R43 - DRC 3 */ \r
+ { 0x0005, 44}, /** R44 - Analogue Left Input 0 */ \r
+ { 0x0005, 45}, /** R45 - Analogue Right Input 0 */ \r
+ { 0x0000, 46}, /** R46 - Analogue Left Input 1 */ \r
+ { 0x0000, 47}, /** R47 - Analogue Right Input 1 */ \r
+ //{ 0x0000, 48}, /** R48 */ \r
+ //{ 0x0000, 49}, /** R49 */ \r
+ //{ 0x0000, 50}, /** R50 */ \r
+ //{ 0x0000, 51}, /** R51 */ \r
+ //{ 0x0000, 52}, /** R52 */ \r
+ //{ 0x0000, 53}, /** R53 */ \r
+ //{ 0x0000, 54}, /** R54 */ \r
+ //{ 0x0000, 55}, /** R55 */ \r
+ //{ 0x0000, 56}, /** R56 */ \r
+ //{ 0x017F, 57}, /** R57 - Analogue OUT1 Left */ \r
+ { 0x00AD, 58}, /** R58 - Analogue OUT1 Right */ \r
+ //{ 0x017F, 59}, /** R59 - Analogue OUT2 Left */ \r
+ //{ 0x017F, 60}, /** R60 - Analogue OUT2 Right */ \r
+ //{ 0x000F, 61}, /** R61 - Analogue OUT12 ZC */ \r
+ //{ 0x0000, 62}, /** R62 */ \r
+ //{ 0x0000, 63}, /** R63 */ \r
+ //{ 0x0000, 64}, /** R64 */ \r
+ //{ 0x0000, 65}, /** R65 */ \r
+ //{ 0x0000, 66}, /** R66 */ \r
+ { 0x0003, 67}, /** R67 - DC Servo 0 */ \r
+ //{ 0xFFFF, 68}, /** R68 - DC Servo 1 */ \r
+ //{ 0x0F0F, 69}, /** R69 - DC Servo 2 */ \r
+ //{ 0x0000, 70}, /** R70 */ \r
+ //{ 0x007F, 71}, /** R71 - DC Servo 4 */ \r
+ //{ 0x007F, 72}, /** R72 - DC Servo 5 */ \r
+ //{ 0x00FF, 73}, /** R73 - DC Servo 6 */ \r
+ //{ 0x00FF, 74}, /** R74 - DC Servo 7 */ \r
+ //{ 0x00FF, 75}, /** R75 - DC Servo 8 */ \r
+ //{ 0x00FF, 76}, /** R76 - DC Servo 9 */ \r
+ //{ 0x0FFF, 77}, /** R77 - DC Servo Readback 0 */ \r
+ //{ 0x0000, 78}, /** R78 */ \r
+ //{ 0x0000, 79}, /** R79 */ \r
+ //{ 0x0000, 80}, /** R80 */ \r
+ //{ 0x0000, 81}, /** R81 */ \r
+ //{ 0x0000, 82}, /** R82 */ \r
+ //{ 0x0000, 83}, /** R83 */ \r
+ //{ 0x0000, 84}, /** R84 */ \r
+ //{ 0x0000, 85}, /** R85 */ \r
+ //{ 0x0000, 86}, /** R86 */ \r
+ //{ 0x0000, 87}, /** R87 */ \r
+ //{ 0x0000, 88}, /** R88 */ \r
+ //{ 0x0000, 89}, /** R89 */ \r
+ { 0x00FF, 90}, /** R90 - Analogue HP 0 */ \r
+ //{ 0x0000, 91}, /** R91 */ \r
+ //{ 0x0000, 92}, /** R92 */ \r
+ //{ 0x0000, 93}, /** R93 */ \r
+ //{ 0x00FF, 94}, /** R94 - Analogue Lineout 0 */ \r
+ //{ 0x0000, 95}, /** R95 */ \r
+ //{ 0x0000, 96}, /** R96 */ \r
+ //{ 0x0000, 97}, /** R97 */ \r
+ { 0x0001, 98}, /** R98 - Charge Pump 0 */ \r
+ //{ 0x0000, 99}, /** R99 */ \r
+ //{ 0x0000, 100}, /** R100 */\r
+ //{ 0x0000, 101}, /** R101 */ \r
+ //{ 0x0000, 102}, /** R102 */ \r
+ //{ 0x0000, 103}, /** R103 */ \r
+ { 0x0005, 104}, /** R104 - Class W 0 */ \r
+ //{ 0x0000, 105}, /** R105 */ \r
+ //{ 0x0000, 106}, /** R106 */ \r
+ //{ 0x0000, 107}, /** R107 */ \r
+ //{ 0x011F, 108}, /** R108 - Write Sequencer 0 */ \r
+ //{ 0x7FFF, 109}, /** R109 - Write Sequencer 1 */ \r
+ //{ 0x4FFF, 110}, /** R110 - Write Sequencer 2 */ \r
+ //{ 0x003F, 111}, /** R111 - Write Sequencer 3 */ \r
+ //{ 0x03F1, 112}, /** R112 - Write Sequencer 4 */ \r
+ //{ 0x0000, 113}, /** R113 */ \r
+ //{ 0x0000, 114}, /** R114 */ \r
+ //{ 0x0000, 115}, /** R115 */ \r
+ { 0x0004, 116}, /** R116 - FLL Control 1 */ \r
+ { 0x0704, 117}, /** R117 - FLL Control 2 */ \r
+ { 0x8000, 118}, /** R118 - FLL Control 3 */ \r
+ { 0x1760, 119}, /** R119 - FLL Control 4 */ \r
+ //{ 0x001B, 120}, /** R120 - FLL Control 5 */ \r
+ //{ 0x0014, 121}, /** R121 - GPIO Control 1 */ \r
+ //{ 0x0010, 122}, /** R122 - GPIO Control 2 */ \r
+ //{ 0x0010, 123}, /** R123 - GPIO Control 3 */ \r
+ //{ 0x0000, 124}, /** R124 - GPIO Control 4 */ \r
+ //{ 0x0000, 125}, /** R125 */ \r
+ //{ 0x000A, 126}, /** R126 - Digital Pulls */ \r
+ //{ 0x07FF, 127}, /** R127 - Interrupt Status */ \r
+ //{ 0x03FF, 128}, /** R128 - Interrupt Status Mask */ \r
+ //{ 0x03FF, 129}, /** R129 - Interrupt Polarity */ \r
+ //{ 0x03FF, 130}, /** R130 - Interrupt Debounce */\r
+ //{ 0x0000, 131}, /** R131 */ \r
+ //{ 0x0000, 132}, /** R132 */ \r
+ //{ 0x0000, 133}, /** R133 */ \r
+ //{ 0x0001, 134}, /** R134 - EQ1 */ \r
+ //{ 0x001F, 135}, /** R135 - EQ2 */ \r
+ //{ 0x001F, 136}, /** R136 - EQ3 */ \r
+ //{ 0x001F, 137}, /** R137 - EQ4 */ \r
+ //{ 0x001F, 138}, /** R138 - EQ5 */ \r
+ //{ 0x001F, 139}, /** R139 - EQ6 */ \r
+ //{ 0xFFFF, 140}, /** R140 - EQ7 */ \r
+ //{ 0xFFFF, 141}, /** R141 - EQ8 */ \r
+ //{ 0xFFFF, 142}, /** R142 - EQ9 */ \r
+ //{ 0xFFFF, 143}, /** R143 - EQ10 */ \r
+ //{ 0xFFFF, 144}, /** R144 - EQ11 */ \r
+ //{ 0xFFFF, 145}, /** R145 - EQ12 */ \r
+ //{ 0xFFFF, 146}, /** R146 - EQ13 */ \r
+ //{ 0xFFFF, 147}, /** R147 - EQ14 */ \r
+ //{ 0xFFFF, 148}, /** R148 - EQ15 */ \r
+ //{ 0xFFFF, 149}, /** R149 - EQ16 */ \r
+ //{ 0xFFFF, 150}, /** R150 - EQ17 */ \r
+ //{ 0xFFFF, 151}, /** R151wm8523_dai - EQ18 */ \r
+ //{ 0xFFFF, 152}, /** R152 - EQ19 */ \r
+ //{ 0xFFFF, 153}, /** R153 - EQ20 */ \r
+ //{ 0xFFFF, 154}, /** R154 - EQ21 */ \r
+ //{ 0xFFFF, 155}, /** R155 - EQ22 */ \r
+ //{ 0xFFFF, 156}, /** R156 - EQ23 */ \r
+ //{ 0xFFFF, 157}, /** R157 - EQ24 */ \r
+ //{ 0x0000, 158}, /** R158 */ \r
+ //{ 0x0000, 159}, /** R159 */ \r
+ //{ 0x0000, 160}, /** R160 */ \r
+ //{ 0x0002, 161}, /** R161 - Control Interface Test 1 */ \r
+ //{ 0x0000, 162}, /** R162 */ \r
+ //{ 0x0000, 163}, /** R163 */ \r
+ //{ 0x0000, 164}, /** R164 */ \r
+ //{ 0x0000, 165}, /** R165 */ \r
+ //{ 0x0000, 166}, /** R166 */ \r
+ //{ 0x0000, 167}, /** R167 */ \r
+ //{ 0x0000, 168}, /** R168 */ \r
+ //{ 0x0000, 169}, /** R169 */ \r
+ //{ 0x0000, 170}, /** R170 */ \r
+ //{ 0x0000, 171}, /** R171 */ \r
+ //{ 0x0000, 172}, /** R172 */ \r
+ //{ 0x0000, 173}, /** R173 */ \r
+ //{ 0x0000, 174}, /** R174 */ \r
+ //{ 0x0000, 175}, /** R175 */ \r
+ //{ 0x0000, 176}, /** R176 */ \r
+ //{ 0x0000, 177}, /** R177 */ \r
+ //{ 0x0000, 178}, /** R178 */ \r
+ //{ 0x0000, 179}, /** R179 */ \r
+ //{ 0x0000, 180}, /** R180 */ \r
+ //{ 0x0000, 181}, /** R181 */ \r
+ //{ 0x0000, 182}, /** R182 */ \r
+ //{ 0x0000, 183}, /** R183 */ \r
+ //{ 0x0000, 184}, /** R184 */ \r
+ //{ 0x0000, 185}, /** R185 */ \r
+ //{ 0x0000, 186}, /** R186 */ \r
+ //{ 0x0000, 187}, /** R187 */ \r
+ //{ 0x0000, 188}, /** R188 */ \r
+ //{ 0x0000, 189}, /** R189 */ \r
+ //{ 0x0000, 190}, /** R190 */ \r
+ //{ 0x0000, 191}, /** R191 */ \r
+ //{ 0x0000, 192}, /** R192 */ \r
+ //{ 0x0000, 193}, /** R193 */ \r
+ //{ 0x0000, 194}, /** R194 */ \r
+ //{ 0x0000, 195}, /** R195 */ \r
+ //{ 0x0000, 196}, /** R196 */ \r
+ //{ 0x0000, 197}, /** R197 */ \r
+ //{ 0x0000, 198}, /** R198 */ \r
+ //{ 0x0000, 199}, /** R199 */ \r
+ //{ 0x0000, 200}, /** R200 */ \r
+ //{ 0x0000, 201}, /** R201 */ \r
+ //{ 0x0000, 202}, /** R202 */ \r
+ //{ 0x0000, 203}, /** R203 */ \r
+ //{ 0x0070, 204}, /** R204 - Analogue Output Bias 0 */ \r
+ //{ 0x0000, 205}, /** R205 */ \r
+ //{ 0x0000, 206}, /** R206 */ \r
+ //{ 0x0000, 207}, /** R207 */ \r
+ //{ 0x0000, 208}, /** R208 */ \r
+ //{ 0x0000, 209}, /** R209 */ \r
+ //{ 0x0000, 210}, /** R210 */ \r
+ //{ 0x0000, 211}, /** R211 */ \r
+ //{ 0x0000, 212}, /** R212 */ \r
+ //{ 0x0000, 213}, /** R213 */ \r
+ //{ 0x0000, 214}, /** R214 */ \r
+ //{ 0x0000, 215}, /** R215 */ \r
+ //{ 0x0000, 216}, /** R216 */ \r
+ //{ 0x0000, 217}, /** R217 */ \r
+ //{ 0x0000, 218}, /** R218 */ \r
+ //{ 0x0000, 219}, /** R219 */ \r
+ //{ 0x0000, 220}, /** R220 */ \r
+ //{ 0x0000, 221}, /** R221 */ \r
+ //{ 0x0000, 222}, /** R222 */ \r
+ //{ 0x0000, 223}, /** R223 */ \r
+ //{ 0x0000, 224}, /** R224 */ \r
+ //{ 0x0000, 225}, /** R225 */ \r
+ //{ 0x0000, 226}, /** R226 */ \r
+ //{ 0x0000, 227}, /** R227 */ \r
+ //{ 0x0000, 228}, /** R228 */ \r
+ //{ 0x0000, 229}, /** R229 */ \r
+ //{ 0x0000, 230}, /** R230 */ \r
+ //{ 0x0000, 231}, /** R231 */ \r
+ //{ 0x0000, 232}, /** R232 */ \r
+ //{ 0x0000, 233}, /** R233 */ \r
+ //{ 0x0000, 234}, /** R234 */ \r
+ //{ 0x0000, 235}, /** R235 */ \r
+ //{ 0x0000, 236}, /** R236 */ \r
+ //{ 0x0000, 237}, /** R237 */ \r
+ //{ 0x0000, 238}, /** R238 */ \r
+ //{ 0x0000, 239}, /** R239 */ \r
+ //{ 0x0000, 240}, /** R240 */ \r
+ //{ 0x0000, 241}, /** R241 */ \r
+ //{ 0x0000, 242}, /** R242 */ \r
+ //{ 0x0000, 243}, /** R243 */ \r
+ //{ 0x0000, 244}, /** R244 */ \r
+ //{ 0x0000, 245}, /** R245 */ \r
+ //{ 0x0000, 246}, /** R246 */ \r
+ //{ 0x0000, 247}, /** R247 - FLL NCO Test 0 */ \r
+ //{ 0x0019, 248}, /** R248 - FLL NCO Test 1 */ \r
+ { 0x55AA, 255} /** end */ \r
+};\r
+\r
+uint8_t WM8904_Init(Twid *pTwid, uint32_t device, uint32_t PCK)\r
+{\r
+ uint8_t count, size;\r
+ uint16_t data = 0;\r
+\r
+ // Reset (write Reg@0x0 to reset)\r
+ WM8904_Write(pTwid, device, 0, 0xFFFF);\r
+\r
+ for(data=0;data<1000;data++);\r
+ //wait ready \r
+ while(data!=0x8904)\r
+ data=WM8904_Read(pTwid, device, 0);\r
+\r
+ if (PMC_MCKR_CSS_SLOW_CLK == PCK)\r
+ {\r
+ {\r
+ size = sizeof(wm8904_access_slow)/4+1;\r
+ for(count=0; count<size; count++)\r
+ {\r
+ WM8904_Write(pTwid, device, wm8904_access_slow[count].address, wm8904_access_slow[count].value);\r
+ if(((wm8904_access_slow[count].address==0x05)&&(wm8904_access_slow[count].value==0x0047))\r
+ ||((wm8904_access_slow[count].address==0x74)&&(wm8904_access_slow[count].value==0x0005))\r
+ ||((wm8904_access_slow[count].address==0x12)&&(wm8904_access_slow[count].value==0x000F)))\r
+ {\r
+ Wait(5);\r
+ }\r
+ if (((wm8904_access_slow[count].address==0x44)&&(wm8904_access_slow[count].value==0x00F0))\r
+ ||((wm8904_access_slow[count].address==0x3A)&&(wm8904_access_slow[count].value==0x00B9)))\r
+ { \r
+ Wait(100);\r
+ }\r
+ } \r
+ } \r
+ }\r
+ else if (PMC_MCKR_CSS_MAIN_CLK == PCK)\r
+ {\r
+ for(count=0;count<255;count++)\r
+ {\r
+ if(wm8904_access_main[count].address<255)\r
+ {\r
+ WM8904_Write(pTwid, device, wm8904_access_main[count].address, wm8904_access_main[count].value);\r
+ }\r
+ else\r
+ {\r
+ break;\r
+ }\r
+ } \r
+ }\r
+ else\r
+ {\r
+ printf("W: PCK not supported! \n\r");\r
+ while(1);\r
+ }\r
+\r
+\r
+ return 0;\r
+}\r
+\r
+void WM8904_IN2R_IN1L(Twid *pTwid, uint32_t device)\r
+{\r
+ //{ 0x0005, 44}, /** R44 - Analogue Left Input 0 */ \r
+ //{ 0x0005, 45}, /** R45 - Analogue Right Input 0 */ \r
+ //{ 0x0000, 46}, /** R46 - Analogue Left Input 1 */ \r
+ //{ 0x0010, 47}, /** R47 - Analogue Right Input 1 */\r
+ WM8904_Write(pTwid, device, 0x2C, 0x0008);\r
+ WM8904_Write(pTwid, device, 0x2D, 0x0005);\r
+ WM8904_Write(pTwid, device, 0x2E, 0x0000);\r
+ WM8904_Write(pTwid, device, 0x2F, 0x0010);\r
+}\r
projects / freertos / blobdiff