Final V8.2.1 release ready for tagging:

[freertos] / FreeRTOS / Demo / CORTEX_M7_SAMV71_Xplained_IAR_Keil / libchip_samv7 / include / samv7 / instance / instance_uart2.h

diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/include/samv7/instance/instance_uart2.h b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/include/samv7/instance/instance_uart2.h
new file mode 100644 (file)
index 0000000..dafba88
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/include/samv7/instance/instance_uart2.h
@@ -0,0 +1,60 @@
+/* ---------------------------------------------------------------------------- */\r
+/*                  Atmel Microcontroller Software Support                      */\r
+/*                       SAM Software Package License                           */\r
+/* ---------------------------------------------------------------------------- */\r
+/* Copyright (c) 2014, Atmel Corporation                                        */\r
+/*                                                                              */\r
+/* All rights reserved.                                                         */\r
+/*                                                                              */\r
+/* Redistribution and use in source and binary forms, with or without           */\r
+/* modification, are permitted provided that the following condition is met:    */\r
+/*                                                                              */\r
+/* - Redistributions of source code must retain the above copyright notice,     */\r
+/* this list of conditions and the disclaimer below.                            */\r
+/*                                                                              */\r
+/* Atmel's name may not be used to endorse or promote products derived from     */\r
+/* this software without specific prior written permission.                     */\r
+/*                                                                              */\r
+/* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */\r
+/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */\r
+/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE   */\r
+/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,      */\r
+/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */\r
+/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,  */\r
+/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF    */\r
+/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING         */\r
+/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */\r
+/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */\r
+/* ---------------------------------------------------------------------------- */\r
+\r
+#ifndef _SAM_UART2_INSTANCE_\r
+#define _SAM_UART2_INSTANCE_\r
+\r
+/* ========== Register definition for UART2 peripheral ========== */\r
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))\r
+  #define REG_UART2_CR                    (0x400E1A00U) /**< \brief (UART2) Control Register */\r
+  #define REG_UART2_MR                    (0x400E1A04U) /**< \brief (UART2) Mode Register */\r
+  #define REG_UART2_IER                   (0x400E1A08U) /**< \brief (UART2) Interrupt Enable Register */\r
+  #define REG_UART2_IDR                   (0x400E1A0CU) /**< \brief (UART2) Interrupt Disable Register */\r
+  #define REG_UART2_IMR                   (0x400E1A10U) /**< \brief (UART2) Interrupt Mask Register */\r
+  #define REG_UART2_SR                    (0x400E1A14U) /**< \brief (UART2) Status Register */\r
+  #define REG_UART2_RHR                   (0x400E1A18U) /**< \brief (UART2) Receive Holding Register */\r
+  #define REG_UART2_THR                   (0x400E1A1CU) /**< \brief (UART2) Transmit Holding Register */\r
+  #define REG_UART2_BRGR                  (0x400E1A20U) /**< \brief (UART2) Baud Rate Generator Register */\r
+  #define REG_UART2_CMPR                  (0x400E1A24U) /**< \brief (UART2) Comparison Register */\r
+  #define REG_UART2_WPMR                  (0x400E1AE4U) /**< \brief (UART2) Write Protection Mode Register */\r
+#else\r
+  #define REG_UART2_CR   (*(__O  uint32_t*)0x400E1A00U) /**< \brief (UART2) Control Register */\r
+  #define REG_UART2_MR   (*(__IO uint32_t*)0x400E1A04U) /**< \brief (UART2) Mode Register */\r
+  #define REG_UART2_IER  (*(__O  uint32_t*)0x400E1A08U) /**< \brief (UART2) Interrupt Enable Register */\r
+  #define REG_UART2_IDR  (*(__O  uint32_t*)0x400E1A0CU) /**< \brief (UART2) Interrupt Disable Register */\r
+  #define REG_UART2_IMR  (*(__I  uint32_t*)0x400E1A10U) /**< \brief (UART2) Interrupt Mask Register */\r
+  #define REG_UART2_SR   (*(__I  uint32_t*)0x400E1A14U) /**< \brief (UART2) Status Register */\r
+  #define REG_UART2_RHR  (*(__I  uint32_t*)0x400E1A18U) /**< \brief (UART2) Receive Holding Register */\r
+  #define REG_UART2_THR  (*(__O  uint32_t*)0x400E1A1CU) /**< \brief (UART2) Transmit Holding Register */\r
+  #define REG_UART2_BRGR (*(__IO uint32_t*)0x400E1A20U) /**< \brief (UART2) Baud Rate Generator Register */\r
+  #define REG_UART2_CMPR (*(__IO uint32_t*)0x400E1A24U) /**< \brief (UART2) Comparison Register */\r
+  #define REG_UART2_WPMR (*(__IO uint32_t*)0x400E1AE4U) /**< \brief (UART2) Write Protection Mode Register */\r
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */\r
+\r
+#endif /* _SAM_UART2_INSTANCE_ */\r