******************************************************************************\r
* @file stm32f7xx_hal_cec.c\r
* @author MCD Application Team\r
- * @version V1.0.0RC1\r
- * @date 24-March-2015\r
+ * @version V1.0.0\r
+ * @date 12-May-2015\r
* @brief CEC HAL module driver.\r
* \r
* This file provides firmware functions to manage the following \r
}\r
\r
/* Check the parameters */ \r
+ assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));\r
assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));\r
assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance)); \r
assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));\r
\r
\r
if(hcec->State == HAL_CEC_STATE_RESET)\r
- { \r
+ {\r
+ /* Allocate lock resource and initialize it */\r
+ hcec->Lock = HAL_UNLOCKED; \r
/* Init the low level hardware : GPIO, CLOCK */\r
- HAL_CEC_MspInit(hcec);\r
+ HAL_CEC_MspInit(hcec);\r
}\r
\r
hcec->State = HAL_CEC_STATE_BUSY;\r
The end of the data processing will be indicated through the \r
dedicated CEC IRQ when using Interrupt mode.\r
The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks \r
- will be executed respectivelly at the end of the transmit or Receive process\r
+ will be executed respectively at the end of the transmit or Receive process\r
The HAL_CEC_ErrorCallback()user callback will be executed when a communication \r
error is detected\r
\r
}\r
} \r
\r
- /* check whether error occured while waiting for TXBR to be set:\r
+ /* check whether error occurred while waiting for TXBR to be set:\r
* has Tx underrun occurred ?\r
* has Tx error occurred ?\r
* has Tx Missing Acknowledge error occurred ? \r
hcec->State = HAL_CEC_STATE_ERROR;\r
}\r
\r
- /* CEC transmit error interrupt occured --------------------------------------*/\r
+ /* CEC transmit error interrupt occurred --------------------------------------*/\r
if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXERR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXERR) != RESET))\r
{ \r
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXERR);\r
hcec->State = HAL_CEC_STATE_ERROR;\r
}\r
\r
- /* CEC TX underrun error interrupt occured --------------------------------------*/\r
+ /* CEC TX underrun error interrupt occurred --------------------------------------*/\r
if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TXUDR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_TXUDR) != RESET))\r
{ \r
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXUDR);\r
hcec->State = HAL_CEC_STATE_ERROR;\r
}\r
\r
- /* CEC TX arbitration error interrupt occured --------------------------------------*/\r
+ /* CEC TX arbitration error interrupt occurred --------------------------------------*/\r
if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_ARBLST) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_ARBLST) != RESET))\r
{ \r
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);\r
hcec->State = HAL_CEC_STATE_ERROR;\r
}\r
\r
- /* CEC RX overrun error interrupt occured --------------------------------------*/\r
+ /* CEC RX overrun error interrupt occurred --------------------------------------*/\r
if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXOVR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXOVR) != RESET))\r
{ \r
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXOVR);\r
hcec->State = HAL_CEC_STATE_ERROR;\r
} \r
\r
- /* CEC RX bit rising error interrupt occured --------------------------------------*/\r
+ /* CEC RX bit rising error interrupt occurred --------------------------------------*/\r
if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_BRE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_BRE) != RESET))\r
{ \r
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_BRE);\r
hcec->State = HAL_CEC_STATE_ERROR;\r
} \r
\r
- /* CEC RX short bit period error interrupt occured --------------------------------------*/\r
+ /* CEC RX short bit period error interrupt occurred --------------------------------------*/\r
if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_SBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_SBPE) != RESET))\r
{ \r
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_SBPE);\r
hcec->State = HAL_CEC_STATE_ERROR;\r
} \r
\r
- /* CEC RX long bit period error interrupt occured --------------------------------------*/\r
+ /* CEC RX long bit period error interrupt occurred --------------------------------------*/\r
if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_LBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_LBPE) != RESET))\r
{ \r
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_LBPE);\r
hcec->State = HAL_CEC_STATE_ERROR;\r
} \r
\r
- /* CEC RX missing acknowledge error interrupt occured --------------------------------------*/\r
+ /* CEC RX missing acknowledge error interrupt occurred --------------------------------------*/\r
if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IT_RXACKE) != RESET))\r
{ \r
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXACKE);\r