--- /dev/null
+/*\r
+ * Copyright (c) 2016, Freescale Semiconductor, Inc.\r
+ * Copyright 2016-2019 NXP\r
+ * All rights reserved.\r
+ *\r
+ * SPDX-License-Identifier: BSD-3-Clause\r
+ */\r
+\r
+#include "fsl_gpio.h"\r
+\r
+/* Component ID definition, used by tools. */\r
+#ifndef FSL_COMPONENT_ID\r
+#define FSL_COMPONENT_ID "platform.drivers.lpc_gpio"\r
+#endif\r
+\r
+/*******************************************************************************\r
+ * Variables\r
+ ******************************************************************************/\r
+#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)\r
+/*! @brief Array to map FGPIO instance number to clock name. */\r
+static const clock_ip_name_t s_gpioClockName[] = GPIO_CLOCKS;\r
+#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */\r
+\r
+#if !(defined(FSL_FEATURE_GPIO_HAS_NO_RESET) && FSL_FEATURE_GPIO_HAS_NO_RESET)\r
+/*! @brief Pointers to GPIO resets for each instance. */\r
+static const reset_ip_name_t s_gpioResets[] = GPIO_RSTS_N;\r
+#endif\r
+/*******************************************************************************\r
+ * Prototypes\r
+ ************ ******************************************************************/\r
+\r
+/*******************************************************************************\r
+ * Code\r
+ ******************************************************************************/\r
+/*!\r
+ * brief Initializes the GPIO peripheral.\r
+ *\r
+ * This function ungates the GPIO clock.\r
+ *\r
+ * param base GPIO peripheral base pointer.\r
+ * param port GPIO port number.\r
+ */\r
+void GPIO_PortInit(GPIO_Type *base, uint32_t port)\r
+{\r
+#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)\r
+ assert(port < ARRAY_SIZE(s_gpioClockName));\r
+\r
+ /* Upgate the GPIO clock */\r
+ CLOCK_EnableClock(s_gpioClockName[port]);\r
+#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */\r
+#if !(defined(FSL_FEATURE_GPIO_HAS_NO_RESET) && FSL_FEATURE_GPIO_HAS_NO_RESET)\r
+ /* Reset the GPIO module */\r
+ RESET_PeripheralReset(s_gpioResets[port]);\r
+#endif\r
+}\r
+\r
+/*!\r
+ * brief Initializes a GPIO pin used by the board.\r
+ *\r
+ * To initialize the GPIO, define a pin configuration, either input or output, in the user file.\r
+ * Then, call the GPIO_PinInit() function.\r
+ *\r
+ * This is an example to define an input pin or output pin configuration:\r
+ * code\r
+ * Define a digital input pin configuration,\r
+ * gpio_pin_config_t config =\r
+ * {\r
+ * kGPIO_DigitalInput,\r
+ * 0,\r
+ * }\r
+ * Define a digital output pin configuration,\r
+ * gpio_pin_config_t config =\r
+ * {\r
+ * kGPIO_DigitalOutput,\r
+ * 0,\r
+ * }\r
+ * endcode\r
+ *\r
+ * param base GPIO peripheral base pointer(Typically GPIO)\r
+ * param port GPIO port number\r
+ * param pin GPIO pin number\r
+ * param config GPIO pin configuration pointer\r
+ */\r
+void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config)\r
+{\r
+ if (config->pinDirection == kGPIO_DigitalInput)\r
+ {\r
+#if defined(FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR) && (FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR)\r
+ base->DIRCLR[port] = 1UL << pin;\r
+#else\r
+ base->DIR[port] &= ~(1UL << pin);\r
+#endif /*FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR*/\r
+ }\r
+ else\r
+ {\r
+ /* Set default output value */\r
+ if (config->outputLogic == 0U)\r
+ {\r
+ base->CLR[port] = (1UL << pin);\r
+ }\r
+ else\r
+ {\r
+ base->SET[port] = (1UL << pin);\r
+ }\r
+/* Set pin direction */\r
+#if defined(FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR) && (FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR)\r
+ base->DIRSET[port] = 1UL << pin;\r
+#else\r
+ base->DIR[port] |= 1UL << pin;\r
+#endif /*FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR*/\r
+ }\r
+}\r
+\r
+#if defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT\r
+/*!\r
+ * @brief Configures the gpio pin interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number\r
+ * @param pin GPIO pin number.\r
+ * @param config GPIO pin interrupt configuration..\r
+ */\r
+void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t port, uint32_t pin, gpio_interrupt_config_t *config)\r
+{\r
+ base->INTEDG[port] = base->INTEDG[port] | ((uint32_t)config->mode << pin);\r
+\r
+ base->INTPOL[port] = base->INTPOL[port] | ((uint32_t)config->polarity << pin);\r
+}\r
+\r
+/*!\r
+ * @brief Enables multiple pins interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)\r
+{\r
+ if ((uint32_t)kGPIO_InterruptA == index)\r
+ {\r
+ base->INTENA[port] = base->INTENA[port] | mask;\r
+ }\r
+ else if ((uint32_t)kGPIO_InterruptB == index)\r
+ {\r
+ base->INTENB[port] = base->INTENB[port] | mask;\r
+ }\r
+ else\r
+ {\r
+ /*Should not enter here*/\r
+ }\r
+}\r
+\r
+/*!\r
+ * @brief Disables multiple pins interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)\r
+{\r
+ if ((uint32_t)kGPIO_InterruptA == index)\r
+ {\r
+ base->INTENA[port] = base->INTENA[port] & ~mask;\r
+ }\r
+ else if ((uint32_t)kGPIO_InterruptB == index)\r
+ {\r
+ base->INTENB[port] = base->INTENB[port] & ~mask;\r
+ }\r
+ else\r
+ {\r
+ /*Should not enter here*/\r
+ }\r
+}\r
+\r
+/*!\r
+ * @brief Clears multiple pins interrupt flag. Status flags are cleared by\r
+ * writing a 1 to the corresponding bit position.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)\r
+{\r
+ if ((uint32_t)kGPIO_InterruptA == index)\r
+ {\r
+ base->INTSTATA[port] = mask;\r
+ }\r
+ else if ((uint32_t)kGPIO_InterruptB == index)\r
+ {\r
+ base->INTSTATB[port] = mask;\r
+ }\r
+ else\r
+ {\r
+ /*Should not enter here*/\r
+ }\r
+}\r
+\r
+/*!\r
+ * @ Read port interrupt status.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number\r
+ * @param index GPIO interrupt number.\r
+ * @retval masked GPIO status value\r
+ */\r
+uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index)\r
+{\r
+ uint32_t status = 0U;\r
+\r
+ if ((uint32_t)kGPIO_InterruptA == index)\r
+ {\r
+ status = base->INTSTATA[port];\r
+ }\r
+ else if ((uint32_t)kGPIO_InterruptB == index)\r
+ {\r
+ status = base->INTSTATB[port];\r
+ }\r
+ else\r
+ {\r
+ /*Should not enter here*/\r
+ }\r
+ return status;\r
+}\r
+\r
+/*!\r
+ * @brief Enables the specific pin interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param pin GPIO pin number.\r
+ * @param index GPIO interrupt number.\r
+ */\r
+void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)\r
+{\r
+ if ((uint32_t)kGPIO_InterruptA == index)\r
+ {\r
+ base->INTENA[port] = base->INTENA[port] | (1UL << pin);\r
+ }\r
+ else if ((uint32_t)kGPIO_InterruptB == index)\r
+ {\r
+ base->INTENB[port] = base->INTENB[port] | (1UL << pin);\r
+ }\r
+ else\r
+ {\r
+ /*Should not enter here*/\r
+ }\r
+}\r
+\r
+/*!\r
+ * @brief Disables the specific pin interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param pin GPIO pin number.\r
+ * @param index GPIO interrupt number.\r
+ */\r
+void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)\r
+{\r
+ if ((uint32_t)kGPIO_InterruptA == index)\r
+ {\r
+ base->INTENA[port] = base->INTENA[port] & ~(1UL << pin);\r
+ }\r
+ else if ((uint32_t)kGPIO_InterruptB == index)\r
+ {\r
+ base->INTENB[port] = base->INTENB[port] & ~(1UL << pin);\r
+ }\r
+ else\r
+ {\r
+ /*Should not enter here*/\r
+ }\r
+}\r
+\r
+/*!\r
+ * @brief Clears the specific pin interrupt flag. Status flags are cleared by\r
+ * writing a 1 to the corresponding bit position.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)\r
+{\r
+ if ((uint32_t)kGPIO_InterruptA == index)\r
+ {\r
+ base->INTSTATA[port] = 1UL << pin;\r
+ }\r
+ else if ((uint32_t)kGPIO_InterruptB == index)\r
+ {\r
+ base->INTSTATB[port] = 1UL << pin;\r
+ }\r
+ else\r
+ {\r
+ /*Should not enter here*/\r
+ }\r
+}\r
+#endif /* FSL_FEATURE_GPIO_HAS_INTERRUPT */\r
projects / freertos / blobdiff