--- /dev/null
+//*****************************************************************************\r
+// LPC54018 startup code for use with MCUXpresso IDE\r
+//\r
+// Version : 101019\r
+//*****************************************************************************\r
+//\r
+// Copyright 2016-2019 NXP\r
+// All rights reserved.\r
+//\r
+// SPDX-License-Identifier: BSD-3-Clause\r
+//*****************************************************************************\r
+\r
+#if defined (DEBUG)\r
+#pragma GCC push_options\r
+#pragma GCC optimize ("Og")\r
+#endif // (DEBUG)\r
+\r
+#if defined (__cplusplus)\r
+#ifdef __REDLIB__\r
+#error Redlib does not support C++\r
+#else\r
+//*****************************************************************************\r
+//\r
+// The entry point for the C++ library startup\r
+//\r
+//*****************************************************************************\r
+extern "C" {\r
+ extern void __libc_init_array(void);\r
+}\r
+#endif\r
+#endif\r
+\r
+#define WEAK __attribute__ ((weak))\r
+#define WEAK_AV __attribute__ ((weak, section(".after_vectors")))\r
+#define ALIAS(f) __attribute__ ((weak, alias (#f)))\r
+\r
+//*****************************************************************************\r
+#if defined (__cplusplus)\r
+extern "C" {\r
+#endif\r
+\r
+//*****************************************************************************\r
+// Variable to store CRP value in. Will be placed automatically\r
+// by the linker when "Enable Code Read Protect" selected.\r
+// See crp.h header for more information\r
+//*****************************************************************************\r
+#include <NXP/crp.h>\r
+__CRP const unsigned int CRP_WORD = CRP_NO_CRP ;\r
+\r
+//*****************************************************************************\r
+// Declaration of external SystemInit function\r
+//*****************************************************************************\r
+#if defined (__USE_CMSIS)\r
+extern void SystemInit(void);\r
+#endif // (__USE_CMSIS)\r
+\r
+//*****************************************************************************\r
+// Forward declaration of the core exception handlers.\r
+// When the application defines a handler (with the same name), this will\r
+// automatically take precedence over these weak definitions.\r
+// If your application is a C++ one, then any interrupt handlers defined\r
+// in C++ files within in your main application will need to have C linkage\r
+// rather than C++ linkage. To do this, make sure that you are using extern "C"\r
+// { .... } around the interrupt handler within your main application code.\r
+//*****************************************************************************\r
+ void ResetISR(void);\r
+WEAK void NMI_Handler(void);\r
+WEAK void HardFault_Handler(void);\r
+WEAK void MemManage_Handler(void);\r
+WEAK void BusFault_Handler(void);\r
+WEAK void UsageFault_Handler(void);\r
+WEAK void SVC_Handler(void);\r
+WEAK void DebugMon_Handler(void);\r
+WEAK void PendSV_Handler(void);\r
+WEAK void SysTick_Handler(void);\r
+WEAK void IntDefaultHandler(void);\r
+\r
+//*****************************************************************************\r
+// Forward declaration of the application IRQ handlers. When the application\r
+// defines a handler (with the same name), this will automatically take\r
+// precedence over weak definitions below\r
+//*****************************************************************************\r
+WEAK void WDT_BOD_IRQHandler(void);\r
+WEAK void DMA0_IRQHandler(void);\r
+WEAK void GINT0_IRQHandler(void);\r
+WEAK void GINT1_IRQHandler(void);\r
+WEAK void PIN_INT0_IRQHandler(void);\r
+WEAK void PIN_INT1_IRQHandler(void);\r
+WEAK void PIN_INT2_IRQHandler(void);\r
+WEAK void PIN_INT3_IRQHandler(void);\r
+WEAK void UTICK0_IRQHandler(void);\r
+WEAK void MRT0_IRQHandler(void);\r
+WEAK void CTIMER0_IRQHandler(void);\r
+WEAK void CTIMER1_IRQHandler(void);\r
+WEAK void SCT0_IRQHandler(void);\r
+WEAK void CTIMER3_IRQHandler(void);\r
+WEAK void FLEXCOMM0_IRQHandler(void);\r
+WEAK void FLEXCOMM1_IRQHandler(void);\r
+WEAK void FLEXCOMM2_IRQHandler(void);\r
+WEAK void FLEXCOMM3_IRQHandler(void);\r
+WEAK void FLEXCOMM4_IRQHandler(void);\r
+WEAK void FLEXCOMM5_IRQHandler(void);\r
+WEAK void FLEXCOMM6_IRQHandler(void);\r
+WEAK void FLEXCOMM7_IRQHandler(void);\r
+WEAK void ADC0_SEQA_IRQHandler(void);\r
+WEAK void ADC0_SEQB_IRQHandler(void);\r
+WEAK void ADC0_THCMP_IRQHandler(void);\r
+WEAK void DMIC0_IRQHandler(void);\r
+WEAK void HWVAD0_IRQHandler(void);\r
+WEAK void USB0_NEEDCLK_IRQHandler(void);\r
+WEAK void USB0_IRQHandler(void);\r
+WEAK void RTC_IRQHandler(void);\r
+WEAK void FLEXCOMM10_IRQHandler(void);\r
+WEAK void Reserved47_IRQHandler(void);\r
+WEAK void PIN_INT4_IRQHandler(void);\r
+WEAK void PIN_INT5_IRQHandler(void);\r
+WEAK void PIN_INT6_IRQHandler(void);\r
+WEAK void PIN_INT7_IRQHandler(void);\r
+WEAK void CTIMER2_IRQHandler(void);\r
+WEAK void CTIMER4_IRQHandler(void);\r
+WEAK void RIT_IRQHandler(void);\r
+WEAK void SPIFI0_IRQHandler(void);\r
+WEAK void FLEXCOMM8_IRQHandler(void);\r
+WEAK void FLEXCOMM9_IRQHandler(void);\r
+WEAK void SDIO_IRQHandler(void);\r
+WEAK void CAN0_IRQ0_IRQHandler(void);\r
+WEAK void CAN0_IRQ1_IRQHandler(void);\r
+WEAK void CAN1_IRQ0_IRQHandler(void);\r
+WEAK void CAN1_IRQ1_IRQHandler(void);\r
+WEAK void USB1_IRQHandler(void);\r
+WEAK void USB1_NEEDCLK_IRQHandler(void);\r
+WEAK void ETHERNET_IRQHandler(void);\r
+WEAK void ETHERNET_PMT_IRQHandler(void);\r
+WEAK void ETHERNET_MACLP_IRQHandler(void);\r
+WEAK void Reserved68_IRQHandler(void);\r
+WEAK void LCD_IRQHandler(void);\r
+WEAK void SHA_IRQHandler(void);\r
+WEAK void SMARTCARD0_IRQHandler(void);\r
+WEAK void SMARTCARD1_IRQHandler(void);\r
+\r
+//*****************************************************************************\r
+// Forward declaration of the driver IRQ handlers. These are aliased\r
+// to the IntDefaultHandler, which is a 'forever' loop. When the driver\r
+// defines a handler (with the same name), this will automatically take\r
+// precedence over these weak definitions\r
+//*****************************************************************************\r
+void WDT_BOD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void DMA0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void GINT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void GINT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void UTICK0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void MRT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SCT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void ADC0_SEQA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void ADC0_SEQB_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void ADC0_THCMP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void DMIC0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void HWVAD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void USB0_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void USB0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void RTC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM10_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved47_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void RIT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SPIFI0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM8_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM9_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SDIO_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CAN0_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CAN0_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CAN1_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CAN1_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void USB1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void USB1_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void ETHERNET_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void ETHERNET_PMT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void ETHERNET_MACLP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved68_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void LCD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SHA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SMARTCARD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SMARTCARD1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+\r
+//*****************************************************************************\r
+// The entry point for the application.\r
+// __main() is the entry point for Redlib based applications\r
+// main() is the entry point for Newlib based applications\r
+//*****************************************************************************\r
+#if defined (__REDLIB__)\r
+extern void __main(void);\r
+#endif\r
+extern int main(void);\r
+\r
+//*****************************************************************************\r
+// External declaration for the pointer to the stack top from the Linker Script\r
+//*****************************************************************************\r
+extern void _vStackTop(void);\r
+extern void _image_size(void);\r
+//*****************************************************************************\r
+// External declaration for LPC MCU vector table checksum from Linker Script\r
+//*****************************************************************************\r
+WEAK extern void __valid_user_code_checksum();\r
+\r
+//*****************************************************************************\r
+// External declaration for image type and load address from Linker Script\r
+//*****************************************************************************\r
+WEAK extern void __imghdr_loadaddress();\r
+WEAK extern void __imghdr_imagetype();\r
+\r
+//*****************************************************************************\r
+#if defined (__cplusplus)\r
+} // extern "C"\r
+#endif\r
+#ifndef IMG_BAUDRATE\r
+#define IMG_BAUDRATE 0\r
+#endif\r
+//*****************************************************************************\r
+// The vector table.\r
+// This relies on the linker script to place at correct location in memory.\r
+//*****************************************************************************\r
+extern void (* const g_pfnVectors[])(void);\r
+extern void * __Vectors __attribute__ ((alias ("g_pfnVectors")));\r
+\r
+__attribute__ ((used, section(".isr_vector")))\r
+void (* const g_pfnVectors[])(void) = {\r
+ // Core Level - CM4\r
+ &_vStackTop, // The initial stack pointer\r
+ ResetISR, // The reset handler\r
+ NMI_Handler, // The NMI handler\r
+ HardFault_Handler, // The hard fault handler\r
+ MemManage_Handler, // The MPU fault handler\r
+ BusFault_Handler, // The bus fault handler\r
+ UsageFault_Handler, // The usage fault handler\r
+ __valid_user_code_checksum, // LPC MCU checksum\r
+ 0, // ECRP\r
+ (void (*)(void))0xEDDC94BD, // Reserved\r
+ (void (*)(void))0x160, // Reserved\r
+ SVC_Handler, // SVCall handler\r
+ DebugMon_Handler, // Debug monitor handler\r
+ 0, // Reserved\r
+ PendSV_Handler, // The PendSV handler\r
+ SysTick_Handler, // The SysTick handler\r
+\r
+ // Chip Level - LPC54018\r
+ WDT_BOD_IRQHandler, // 16: Windowed watchdog timer, Brownout detect\r
+ DMA0_IRQHandler, // 17: DMA controller\r
+ GINT0_IRQHandler, // 18: GPIO group 0\r
+ GINT1_IRQHandler, // 19: GPIO group 1\r
+ PIN_INT0_IRQHandler, // 20: Pin interrupt 0 or pattern match engine slice 0\r
+ PIN_INT1_IRQHandler, // 21: Pin interrupt 1or pattern match engine slice 1\r
+ PIN_INT2_IRQHandler, // 22: Pin interrupt 2 or pattern match engine slice 2\r
+ PIN_INT3_IRQHandler, // 23: Pin interrupt 3 or pattern match engine slice 3\r
+ UTICK0_IRQHandler, // 24: Micro-tick Timer\r
+ MRT0_IRQHandler, // 25: Multi-rate timer\r
+ CTIMER0_IRQHandler, // 26: Standard counter/timer CTIMER0\r
+ CTIMER1_IRQHandler, // 27: Standard counter/timer CTIMER1\r
+ SCT0_IRQHandler, // 28: SCTimer/PWM\r
+ CTIMER3_IRQHandler, // 29: Standard counter/timer CTIMER3\r
+ FLEXCOMM0_IRQHandler, // 30: Flexcomm Interface 0 (USART, SPI, I2C, FLEXCOMM)\r
+ FLEXCOMM1_IRQHandler, // 31: Flexcomm Interface 1 (USART, SPI, I2C, FLEXCOMM)\r
+ FLEXCOMM2_IRQHandler, // 32: Flexcomm Interface 2 (USART, SPI, I2C, FLEXCOMM)\r
+ FLEXCOMM3_IRQHandler, // 33: Flexcomm Interface 3 (USART, SPI, I2C, FLEXCOMM)\r
+ FLEXCOMM4_IRQHandler, // 34: Flexcomm Interface 4 (USART, SPI, I2C, FLEXCOMM)\r
+ FLEXCOMM5_IRQHandler, // 35: Flexcomm Interface 5 (USART, SPI, I2C,, FLEXCOMM)\r
+ FLEXCOMM6_IRQHandler, // 36: Flexcomm Interface 6 (USART, SPI, I2C, I2S,, FLEXCOMM)\r
+ FLEXCOMM7_IRQHandler, // 37: Flexcomm Interface 7 (USART, SPI, I2C, I2S,, FLEXCOMM)\r
+ ADC0_SEQA_IRQHandler, // 38: ADC0 sequence A completion.\r
+ ADC0_SEQB_IRQHandler, // 39: ADC0 sequence B completion.\r
+ ADC0_THCMP_IRQHandler, // 40: ADC0 threshold compare and error.\r
+ DMIC0_IRQHandler, // 41: Digital microphone and DMIC subsystem\r
+ HWVAD0_IRQHandler, // 42: Hardware Voice Activity Detector\r
+ USB0_NEEDCLK_IRQHandler, // 43: USB Activity Wake-up Interrupt\r
+ USB0_IRQHandler, // 44: USB device\r
+ RTC_IRQHandler, // 45: RTC alarm and wake-up interrupts\r
+ FLEXCOMM10_IRQHandler, // 46: Flexcomm Interface 10 (SPI, FLEXCOMM)\r
+ Reserved47_IRQHandler, // 47: Reserved interrupt\r
+ PIN_INT4_IRQHandler, // 48: Pin interrupt 4 or pattern match engine slice 4 int\r
+ PIN_INT5_IRQHandler, // 49: Pin interrupt 5 or pattern match engine slice 5 int\r
+ PIN_INT6_IRQHandler, // 50: Pin interrupt 6 or pattern match engine slice 6 int\r
+ PIN_INT7_IRQHandler, // 51: Pin interrupt 7 or pattern match engine slice 7 int\r
+ CTIMER2_IRQHandler, // 52: Standard counter/timer CTIMER2\r
+ CTIMER4_IRQHandler, // 53: Standard counter/timer CTIMER4\r
+ RIT_IRQHandler, // 54: Repetitive Interrupt Timer\r
+ SPIFI0_IRQHandler, // 55: SPI flash interface\r
+ FLEXCOMM8_IRQHandler, // 56: Flexcomm Interface 8 (USART, SPI, I2C, FLEXCOMM)\r
+ FLEXCOMM9_IRQHandler, // 57: Flexcomm Interface 9 (USART, SPI, I2C, FLEXCOMM)\r
+ SDIO_IRQHandler, // 58: SD/MMC\r
+ CAN0_IRQ0_IRQHandler, // 59: CAN0 interrupt0\r
+ CAN0_IRQ1_IRQHandler, // 60: CAN0 interrupt1\r
+ CAN1_IRQ0_IRQHandler, // 61: CAN1 interrupt0\r
+ CAN1_IRQ1_IRQHandler, // 62: CAN1 interrupt1\r
+ USB1_IRQHandler, // 63: USB1 interrupt\r
+ USB1_NEEDCLK_IRQHandler, // 64: USB1 activity\r
+ ETHERNET_IRQHandler, // 65: Ethernet\r
+ ETHERNET_PMT_IRQHandler, // 66: Ethernet power management interrupt\r
+ ETHERNET_MACLP_IRQHandler, // 67: Ethernet MAC interrupt\r
+ Reserved68_IRQHandler, // 68: Reserved interrupt\r
+ LCD_IRQHandler, // 69: LCD interrupt\r
+ SHA_IRQHandler, // 70: SHA interrupt\r
+ SMARTCARD0_IRQHandler, // 71: Smart card 0 interrupt\r
+ SMARTCARD1_IRQHandler, // 72: Smart card 1 interrupt\r
+\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ (void (*)(void))0xFEEDA5A5, // Header Marker\r
+\r
+#if defined (ADD_CRC)\r
+ (__imghdr_imagetype - 1), // (0x04) Image Type\r
+ __imghdr_loadaddress, // (0x08) Load_address\r
+#else\r
+ __imghdr_imagetype, // (0x04) Image Type\r
+ __imghdr_loadaddress, // (0x08) Load_address\r
+#endif\r
+ (void (*)(void))(((unsigned)_image_size) - 4), // (0x0C) load_length, exclude 4 bytes CRC field.\r
+ 0, // (0x10) CRC value (only applicable to NON Non-secure images).\r
+ 0, // (0x14) Version (only applicable to DUAL_ENH image type.\r
+ 0, // (0x18) EMC static memory configuration settings, required for EMC boot\r
+ (void (*)(void))IMG_BAUDRATE, // (0x1C) image baudrate\r
+ 0, // (0x20) reserved\r
+ (void (*)(void))0xEDDC94BD, // (0x24) Image_marker\r
+ 0, // (0x28) SBZ\r
+ 0, // (0x2C) reserved\r
+ #ifdef W25Q128JVFM\r
+ /* SPIFI Descriptor - W25Q128JVFM */\r
+ (void (*)(void))0x00000000, // 0xFFFFFFFF to default 1-bit SPI mode ；DevStrAdr\r
+ (void (*)(void))0x001870EF, // mfgId + extCount\r
+ (void (*)(void))0x00000000, // extid 0-3\r
+ (void (*)(void))0x00000000, // extid 4-7\r
+ (void (*)(void))0x0001001D, // caps\r
+ (void (*)(void))0x00000100, // Blks + RESV1\r
+ (void (*)(void))0x00010000, // blkSize\r
+ (void (*)(void))0x00000000, // subBlks + subBlkSize\r
+ (void (*)(void))0x00000100, // pageSize + RESV2\r
+ (void (*)(void))0x00003F00, // maxReadSize\r
+ (void (*)(void))0x68506850, // maxClkRate,maxReadRate,maxHSReadRate,maxProgramRate\r
+ (void (*)(void))0x04030050, // maxHSProgramRate,initDeInitFxId,clearStatusFxId,getStatusFxId,\r
+ (void (*)(void))0x14110D09, // setStatusFxId,setOptionsFxId,getReadCmdFxId,getWriteCmdFxId\r
+ #endif\r
+\r
+ #ifdef MXL12835F\r
+ /* SPI Descriptor - MXL12835F */\r
+ (void (*)(void))0x00000000, // 0xFFFFFFFF to default 1-bit SPI mode ;DevStrAdr\r
+ (void (*)(void))0x001820C2, // mfgId + extCount\r
+ (void (*)(void))0x00000000, // extid 0-3\r
+ (void (*)(void))0x00000000, // extid 4-7\r
+ (void (*)(void))0x0001001D, // caps\r
+ (void (*)(void))0x00000100, // Blks + RESV1\r
+ (void (*)(void))0x00010000, // blkSize\r
+ (void (*)(void))0x00000000, // subBlks + subBlkSize\r
+ (void (*)(void))0x00000100, // pageSize + RESV2\r
+ (void (*)(void))0x00003F00, // maxReadSize\r
+ (void (*)(void))0x68506850, // maxClkRate,maxReadRate,maxHSReadRate,maxProgramRate\r
+ (void (*)(void))0x06030050, // maxHSProgramRate,initDeInitFxId,clearStatusFxId,getStatusFxId\r
+ (void (*)(void))0x14110F0B, // setStatusFxId,setOptionsFxId,getReadCmdFxId,getWriteCmdFxId\r
+ #endif\r
+\r
+}; /* End of g_pfnVectors */\r
+\r
+//*****************************************************************************\r
+// Functions to carry out the initialization of RW and BSS data sections. These\r
+// are written as separate functions rather than being inlined within the\r
+// ResetISR() function in order to cope with MCUs with multiple banks of\r
+// memory.\r
+//*****************************************************************************\r
+__attribute__ ((section(".after_vectors.init_data")))\r
+void data_init(unsigned int romstart, unsigned int start, unsigned int len) {\r
+ unsigned int *pulDest = (unsigned int*) start;\r
+ unsigned int *pulSrc = (unsigned int*) romstart;\r
+ unsigned int loop;\r
+ for (loop = 0; loop < len; loop = loop + 4)\r
+ *pulDest++ = *pulSrc++;\r
+}\r
+\r
+__attribute__ ((section(".after_vectors.init_bss")))\r
+void bss_init(unsigned int start, unsigned int len) {\r
+ unsigned int *pulDest = (unsigned int*) start;\r
+ unsigned int loop;\r
+ for (loop = 0; loop < len; loop = loop + 4)\r
+ *pulDest++ = 0;\r
+}\r
+\r
+//*****************************************************************************\r
+// The following symbols are constructs generated by the linker, indicating\r
+// the location of various points in the "Global Section Table". This table is\r
+// created by the linker via the Code Red managed linker script mechanism. It\r
+// contains the load address, execution address and length of each RW data\r
+// section and the execution and length of each BSS (zero initialized) section.\r
+//*****************************************************************************\r
+extern unsigned int __data_section_table;\r
+extern unsigned int __data_section_table_end;\r
+extern unsigned int __bss_section_table;\r
+extern unsigned int __bss_section_table_end;\r
+\r
+//*****************************************************************************\r
+// Reset entry point for your code.\r
+// Sets up a simple runtime environment and initializes the C/C++\r
+// library.\r
+//*****************************************************************************\r
+__attribute__ ((section(".after_vectors.reset")))\r
+void ResetISR(void) {\r
+\r
+ // Disable interrupts\r
+ __asm volatile ("cpsid i");\r
+\r
+\r
+ // Enable SRAM clock used by Stack\r
+ __asm volatile ("LDR R0, =0x40000220\n\t"\r
+ "MOV R1, #56\n\t"\r
+ "STR R1, [R0]");\r
+\r
+#if defined (__USE_CMSIS)\r
+// If __USE_CMSIS defined, then call CMSIS SystemInit code\r
+ SystemInit();\r
+\r
+#endif // (__USE_CMSIS)\r
+\r
+ //\r
+ // Copy the data sections from flash to SRAM.\r
+ //\r
+ unsigned int LoadAddr, ExeAddr, SectionLen;\r
+ unsigned int *SectionTableAddr;\r
+\r
+ // Load base address of Global Section Table\r
+ SectionTableAddr = &__data_section_table;\r
+\r
+ // Copy the data sections from flash to SRAM.\r
+ while (SectionTableAddr < &__data_section_table_end) {\r
+ LoadAddr = *SectionTableAddr++;\r
+ ExeAddr = *SectionTableAddr++;\r
+ SectionLen = *SectionTableAddr++;\r
+ data_init(LoadAddr, ExeAddr, SectionLen);\r
+ }\r
+\r
+ // At this point, SectionTableAddr = &__bss_section_table;\r
+ // Zero fill the bss segment\r
+ while (SectionTableAddr < &__bss_section_table_end) {\r
+ ExeAddr = *SectionTableAddr++;\r
+ SectionLen = *SectionTableAddr++;\r
+ bss_init(ExeAddr, SectionLen);\r
+ }\r
+\r
+#if !defined (__USE_CMSIS)\r
+// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code\r
+// will enable the FPU\r
+#if defined (__VFP_FP__) && !defined (__SOFTFP__)\r
+ //\r
+ // Code to enable the Cortex-M4 FPU only included\r
+ // if appropriate build options have been selected.\r
+ // Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)\r
+ //\r
+ // Read CPACR (located at address 0xE000ED88)\r
+ // Set bits 20-23 to enable CP10 and CP11 coprocessors\r
+ // Write back the modified value to the CPACR\r
+ asm volatile ("LDR.W R0, =0xE000ED88\n\t"\r
+ "LDR R1, [R0]\n\t"\r
+ "ORR R1, R1, #(0xF << 20)\n\t"\r
+ "STR R1, [R0]");\r
+#endif // (__VFP_FP__) && !(__SOFTFP__)\r
+#endif // (__USE_CMSIS)\r
+\r
+\r
+#if !defined (__USE_CMSIS)\r
+// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code\r
+// will setup the VTOR register\r
+\r
+ // Check to see if we are running the code from a non-zero\r
+ // address (eg RAM, external flash), in which case we need\r
+ // to modify the VTOR register to tell the CPU that the\r
+ // vector table is located at a non-0x0 address.\r
+ unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;\r
+ if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {\r
+ *pSCB_VTOR = (unsigned int)g_pfnVectors;\r
+ }\r
+#endif // (__USE_CMSIS)\r
+#if defined (__cplusplus)\r
+ //\r
+ // Call C++ library initialisation\r
+ //\r
+ __libc_init_array();\r
+#endif\r
+\r
+ // Reenable interrupts\r
+ __asm volatile ("cpsie i");\r
+\r
+#if defined (__REDLIB__)\r
+ // Call the Redlib library, which in turn calls main()\r
+ __main();\r
+#else\r
+ main();\r
+#endif\r
+\r
+ //\r
+ // main() shouldn't return, but if it does, we'll just enter an infinite loop\r
+ //\r
+ while (1) {\r
+ ;\r
+ }\r
+}\r
+\r
+//*****************************************************************************\r
+// Default core exception handlers. Override the ones here by defining your own\r
+// handler routines in your application code.\r
+//*****************************************************************************\r
+WEAK_AV void NMI_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void HardFault_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void MemManage_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void BusFault_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void UsageFault_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void SVC_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void DebugMon_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void PendSV_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void SysTick_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+//*****************************************************************************\r
+// Processor ends up here if an unexpected interrupt occurs or a specific\r
+// handler is not present in the application code.\r
+//*****************************************************************************\r
+WEAK_AV void IntDefaultHandler(void)\r
+{ while(1) {}\r
+}\r
+\r
+//*****************************************************************************\r
+// Default application exception handlers. Override the ones here by defining\r
+// your own handler routines in your application code. These routines call\r
+// driver exception handlers or IntDefaultHandler() if no driver exception\r
+// handler is included.\r
+//*****************************************************************************\r
+WEAK void WDT_BOD_IRQHandler(void)\r
+{ WDT_BOD_DriverIRQHandler();\r
+}\r
+\r
+WEAK void DMA0_IRQHandler(void)\r
+{ DMA0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void GINT0_IRQHandler(void)\r
+{ GINT0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void GINT1_IRQHandler(void)\r
+{ GINT1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT0_IRQHandler(void)\r
+{ PIN_INT0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT1_IRQHandler(void)\r
+{ PIN_INT1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT2_IRQHandler(void)\r
+{ PIN_INT2_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT3_IRQHandler(void)\r
+{ PIN_INT3_DriverIRQHandler();\r
+}\r
+\r
+WEAK void UTICK0_IRQHandler(void)\r
+{ UTICK0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void MRT0_IRQHandler(void)\r
+{ MRT0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER0_IRQHandler(void)\r
+{ CTIMER0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER1_IRQHandler(void)\r
+{ CTIMER1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SCT0_IRQHandler(void)\r
+{ SCT0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER3_IRQHandler(void)\r
+{ CTIMER3_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM0_IRQHandler(void)\r
+{ FLEXCOMM0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM1_IRQHandler(void)\r
+{ FLEXCOMM1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM2_IRQHandler(void)\r
+{ FLEXCOMM2_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM3_IRQHandler(void)\r
+{ FLEXCOMM3_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM4_IRQHandler(void)\r
+{ FLEXCOMM4_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM5_IRQHandler(void)\r
+{ FLEXCOMM5_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM6_IRQHandler(void)\r
+{ FLEXCOMM6_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM7_IRQHandler(void)\r
+{ FLEXCOMM7_DriverIRQHandler();\r
+}\r
+\r
+WEAK void ADC0_SEQA_IRQHandler(void)\r
+{ ADC0_SEQA_DriverIRQHandler();\r
+}\r
+\r
+WEAK void ADC0_SEQB_IRQHandler(void)\r
+{ ADC0_SEQB_DriverIRQHandler();\r
+}\r
+\r
+WEAK void ADC0_THCMP_IRQHandler(void)\r
+{ ADC0_THCMP_DriverIRQHandler();\r
+}\r
+\r
+WEAK void DMIC0_IRQHandler(void)\r
+{ DMIC0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void HWVAD0_IRQHandler(void)\r
+{ HWVAD0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void USB0_NEEDCLK_IRQHandler(void)\r
+{ USB0_NEEDCLK_DriverIRQHandler();\r
+}\r
+\r
+WEAK void USB0_IRQHandler(void)\r
+{ USB0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void RTC_IRQHandler(void)\r
+{ RTC_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM10_IRQHandler(void)\r
+{ FLEXCOMM10_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved47_IRQHandler(void)\r
+{ Reserved47_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT4_IRQHandler(void)\r
+{ PIN_INT4_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT5_IRQHandler(void)\r
+{ PIN_INT5_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT6_IRQHandler(void)\r
+{ PIN_INT6_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT7_IRQHandler(void)\r
+{ PIN_INT7_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER2_IRQHandler(void)\r
+{ CTIMER2_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER4_IRQHandler(void)\r
+{ CTIMER4_DriverIRQHandler();\r
+}\r
+\r
+WEAK void RIT_IRQHandler(void)\r
+{ RIT_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SPIFI0_IRQHandler(void)\r
+{ SPIFI0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM8_IRQHandler(void)\r
+{ FLEXCOMM8_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM9_IRQHandler(void)\r
+{ FLEXCOMM9_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SDIO_IRQHandler(void)\r
+{ SDIO_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CAN0_IRQ0_IRQHandler(void)\r
+{ CAN0_IRQ0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CAN0_IRQ1_IRQHandler(void)\r
+{ CAN0_IRQ1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CAN1_IRQ0_IRQHandler(void)\r
+{ CAN1_IRQ0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CAN1_IRQ1_IRQHandler(void)\r
+{ CAN1_IRQ1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void USB1_IRQHandler(void)\r
+{ USB1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void USB1_NEEDCLK_IRQHandler(void)\r
+{ USB1_NEEDCLK_DriverIRQHandler();\r
+}\r
+\r
+WEAK void ETHERNET_IRQHandler(void)\r
+{ ETHERNET_DriverIRQHandler();\r
+}\r
+\r
+WEAK void ETHERNET_PMT_IRQHandler(void)\r
+{ ETHERNET_PMT_DriverIRQHandler();\r
+}\r
+\r
+WEAK void ETHERNET_MACLP_IRQHandler(void)\r
+{ ETHERNET_MACLP_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved68_IRQHandler(void)\r
+{ Reserved68_DriverIRQHandler();\r
+}\r
+\r
+WEAK void LCD_IRQHandler(void)\r
+{ LCD_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SHA_IRQHandler(void)\r
+{ SHA_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SMARTCARD0_IRQHandler(void)\r
+{ SMARTCARD0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SMARTCARD1_IRQHandler(void)\r
+{ SMARTCARD1_DriverIRQHandler();\r
+}\r
+\r
+//*****************************************************************************\r
+\r
+#if defined (DEBUG)\r
+#pragma GCC pop_options\r
+#endif // (DEBUG)\r
projects / freertos / blobdiff