]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/startup/startup_lpc55s69_cm33_core0.c
Add ARMv8M demo project for NXP LPC55S69.
[freertos] / FreeRTOS / Demo / CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso / NXP_Code / startup / startup_lpc55s69_cm33_core0.c
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/startup/startup_lpc55s69_cm33_core0.c b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/startup/startup_lpc55s69_cm33_core0.c
new file mode 100644 (file)
index 0000000..cf8bd95
--- /dev/null
@@ -0,0 +1,737 @@
+//*****************************************************************************\r
+// LPC55S69_cm33_core0 startup code for use with MCUXpresso IDE\r
+//\r
+// Version : 220119\r
+//*****************************************************************************\r
+//\r
+// Copyright 2016-2019 NXP\r
+// All rights reserved.\r
+//\r
+// SPDX-License-Identifier: BSD-3-Clause\r
+//*****************************************************************************\r
+\r
+#if defined (DEBUG)\r
+#pragma GCC push_options\r
+#pragma GCC optimize ("Og")\r
+#endif // (DEBUG)\r
+\r
+#if defined (__cplusplus)\r
+#ifdef __REDLIB__\r
+#error Redlib does not support C++\r
+#else\r
+//*****************************************************************************\r
+//\r
+// The entry point for the C++ library startup\r
+//\r
+//*****************************************************************************\r
+extern "C" {\r
+    extern void __libc_init_array(void);\r
+}\r
+#endif\r
+#endif\r
+\r
+#define WEAK __attribute__ ((weak))\r
+#define WEAK_AV __attribute__ ((weak, section(".after_vectors")))\r
+#define ALIAS(f) __attribute__ ((weak, alias (#f)))\r
+\r
+//*****************************************************************************\r
+#if defined (__cplusplus)\r
+extern "C" {\r
+#endif\r
+\r
+//*****************************************************************************\r
+// Variable to store CRP value in. Will be placed automatically\r
+// by the linker when "Enable Code Read Protect" selected.\r
+// See crp.h header for more information\r
+//*****************************************************************************\r
+//*****************************************************************************\r
+// Declaration of external SystemInit function\r
+//*****************************************************************************\r
+#if defined (__USE_CMSIS)\r
+extern void SystemInit(void);\r
+#endif // (__USE_CMSIS)\r
+\r
+//*****************************************************************************\r
+// Forward declaration of the core exception handlers.\r
+// When the application defines a handler (with the same name), this will\r
+// automatically take precedence over these weak definitions.\r
+// If your application is a C++ one, then any interrupt handlers defined\r
+// in C++ files within in your main application will need to have C linkage\r
+// rather than C++ linkage. To do this, make sure that you are using extern "C"\r
+// { .... } around the interrupt handler within your main application code.\r
+//*****************************************************************************\r
+     void ResetISR(void);\r
+WEAK void NMI_Handler(void);\r
+WEAK void HardFault_Handler(void);\r
+WEAK void MemManage_Handler(void);\r
+WEAK void BusFault_Handler(void);\r
+WEAK void UsageFault_Handler(void);\r
+WEAK void SVC_Handler(void);\r
+WEAK void DebugMon_Handler(void);\r
+WEAK void PendSV_Handler(void);\r
+WEAK void SysTick_Handler(void);\r
+WEAK void IntDefaultHandler(void);\r
+\r
+//*****************************************************************************\r
+// Forward declaration of the application IRQ handlers. When the application\r
+// defines a handler (with the same name), this will automatically take\r
+// precedence over weak definitions below\r
+//*****************************************************************************\r
+WEAK void WDT_BOD_IRQHandler(void);\r
+WEAK void DMA0_IRQHandler(void);\r
+WEAK void GINT0_IRQHandler(void);\r
+WEAK void GINT1_IRQHandler(void);\r
+WEAK void PIN_INT0_IRQHandler(void);\r
+WEAK void PIN_INT1_IRQHandler(void);\r
+WEAK void PIN_INT2_IRQHandler(void);\r
+WEAK void PIN_INT3_IRQHandler(void);\r
+WEAK void UTICK0_IRQHandler(void);\r
+WEAK void MRT0_IRQHandler(void);\r
+WEAK void CTIMER0_IRQHandler(void);\r
+WEAK void CTIMER1_IRQHandler(void);\r
+WEAK void SCT0_IRQHandler(void);\r
+WEAK void CTIMER3_IRQHandler(void);\r
+WEAK void FLEXCOMM0_IRQHandler(void);\r
+WEAK void FLEXCOMM1_IRQHandler(void);\r
+WEAK void FLEXCOMM2_IRQHandler(void);\r
+WEAK void FLEXCOMM3_IRQHandler(void);\r
+WEAK void FLEXCOMM4_IRQHandler(void);\r
+WEAK void FLEXCOMM5_IRQHandler(void);\r
+WEAK void FLEXCOMM6_IRQHandler(void);\r
+WEAK void FLEXCOMM7_IRQHandler(void);\r
+WEAK void ADC0_IRQHandler(void);\r
+WEAK void Reserved39_IRQHandler(void);\r
+WEAK void ACMP_IRQHandler(void);\r
+WEAK void Reserved41_IRQHandler(void);\r
+WEAK void Reserved42_IRQHandler(void);\r
+WEAK void USB0_NEEDCLK_IRQHandler(void);\r
+WEAK void USB0_IRQHandler(void);\r
+WEAK void RTC_IRQHandler(void);\r
+WEAK void Reserved46_IRQHandler(void);\r
+WEAK void MAILBOX_IRQHandler(void);\r
+WEAK void PIN_INT4_IRQHandler(void);\r
+WEAK void PIN_INT5_IRQHandler(void);\r
+WEAK void PIN_INT6_IRQHandler(void);\r
+WEAK void PIN_INT7_IRQHandler(void);\r
+WEAK void CTIMER2_IRQHandler(void);\r
+WEAK void CTIMER4_IRQHandler(void);\r
+WEAK void OS_EVENT_IRQHandler(void);\r
+WEAK void Reserved55_IRQHandler(void);\r
+WEAK void Reserved56_IRQHandler(void);\r
+WEAK void Reserved57_IRQHandler(void);\r
+WEAK void SDIO_IRQHandler(void);\r
+WEAK void Reserved59_IRQHandler(void);\r
+WEAK void Reserved60_IRQHandler(void);\r
+WEAK void Reserved61_IRQHandler(void);\r
+WEAK void USB1_UTMI_IRQHandler(void);\r
+WEAK void USB1_IRQHandler(void);\r
+WEAK void USB1_NEEDCLK_IRQHandler(void);\r
+WEAK void SEC_HYPERVISOR_CALL_IRQHandler(void);\r
+WEAK void SEC_GPIO_INT0_IRQ0_IRQHandler(void);\r
+WEAK void SEC_GPIO_INT0_IRQ1_IRQHandler(void);\r
+WEAK void PLU_IRQHandler(void);\r
+WEAK void SEC_VIO_IRQHandler(void);\r
+WEAK void HASHCRYPT_IRQHandler(void);\r
+WEAK void CASER_IRQHandler(void);\r
+WEAK void PUF_IRQHandler(void);\r
+WEAK void PQ_IRQHandler(void);\r
+WEAK void DMA1_IRQHandler(void);\r
+WEAK void LSPI_HS_IRQHandler(void);\r
+\r
+//*****************************************************************************\r
+// Forward declaration of the driver IRQ handlers. These are aliased\r
+// to the IntDefaultHandler, which is a 'forever' loop. When the driver\r
+// defines a handler (with the same name), this will automatically take\r
+// precedence over these weak definitions\r
+//*****************************************************************************\r
+void WDT_BOD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void DMA0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void GINT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void GINT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void UTICK0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void MRT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SCT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void FLEXCOMM7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void ADC0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved39_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void ACMP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved41_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved42_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void USB0_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void USB0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void RTC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved46_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void MAILBOX_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PIN_INT7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CTIMER4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void OS_EVENT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved55_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved56_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved57_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SDIO_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved59_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved60_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void Reserved61_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void USB1_UTMI_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void USB1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void USB1_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SEC_HYPERVISOR_CALL_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SEC_GPIO_INT0_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SEC_GPIO_INT0_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PLU_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void SEC_VIO_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void HASHCRYPT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void CASER_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PUF_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void PQ_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void DMA1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+void LSPI_HS_DriverIRQHandler(void) ALIAS(IntDefaultHandler);\r
+\r
+//*****************************************************************************\r
+// The entry point for the application.\r
+// __main() is the entry point for Redlib based applications\r
+// main() is the entry point for Newlib based applications\r
+//*****************************************************************************\r
+#if defined (__REDLIB__)\r
+extern void __main(void);\r
+#endif\r
+extern int main(void);\r
+\r
+//*****************************************************************************\r
+// External declaration for the pointer to the stack top from the Linker Script\r
+//*****************************************************************************\r
+extern void _vStackTop(void);\r
+//*****************************************************************************\r
+// External declaration for LPC MCU vector table checksum from  Linker Script\r
+//*****************************************************************************\r
+WEAK extern void __valid_user_code_checksum();\r
+\r
+//*****************************************************************************\r
+//*****************************************************************************\r
+#if defined (__cplusplus)\r
+} // extern "C"\r
+#endif\r
+//*****************************************************************************\r
+// The vector table.\r
+// This relies on the linker script to place at correct location in memory.\r
+//*****************************************************************************\r
+extern void (* const g_pfnVectors[])(void);\r
+extern void * __Vectors __attribute__ ((alias ("g_pfnVectors")));\r
+\r
+__attribute__ ((used, section(".isr_vector")))\r
+void (* const g_pfnVectors[])(void) = {\r
+    // Core Level - CM33\r
+    &_vStackTop,                       // The initial stack pointer\r
+    ResetISR,                          // The reset handler\r
+    NMI_Handler,                       // The NMI handler\r
+    HardFault_Handler,                 // The hard fault handler\r
+    MemManage_Handler,                 // The MPU fault handler\r
+    BusFault_Handler,                  // The bus fault handler\r
+    UsageFault_Handler,                // The usage fault handler\r
+    __valid_user_code_checksum,        // LPC MCU checksum\r
+    0,                                 // ECRP\r
+    0,                                 // Reserved\r
+    0,                                 // Reserved\r
+    SVC_Handler,                       // SVCall handler\r
+    DebugMon_Handler,                  // Debug monitor handler\r
+    0,                                 // Reserved\r
+    PendSV_Handler,                    // The PendSV handler\r
+    SysTick_Handler,                   // The SysTick handler\r
+\r
+    // Chip Level - LPC55S69_cm33_core0\r
+    WDT_BOD_IRQHandler,              // 16: Windowed watchdog timer, Brownout detect, Flash interrupt\r
+    DMA0_IRQHandler,                 // 17: DMA0 controller\r
+    GINT0_IRQHandler,                // 18: GPIO group 0\r
+    GINT1_IRQHandler,                // 19: GPIO group 1\r
+    PIN_INT0_IRQHandler,             // 20: Pin interrupt 0 or pattern match engine slice 0\r
+    PIN_INT1_IRQHandler,             // 21: Pin interrupt 1or pattern match engine slice 1\r
+    PIN_INT2_IRQHandler,             // 22: Pin interrupt 2 or pattern match engine slice 2\r
+    PIN_INT3_IRQHandler,             // 23: Pin interrupt 3 or pattern match engine slice 3\r
+    UTICK0_IRQHandler,               // 24: Micro-tick Timer\r
+    MRT0_IRQHandler,                 // 25: Multi-rate timer\r
+    CTIMER0_IRQHandler,              // 26: Standard counter/timer CTIMER0\r
+    CTIMER1_IRQHandler,              // 27: Standard counter/timer CTIMER1\r
+    SCT0_IRQHandler,                 // 28: SCTimer/PWM\r
+    CTIMER3_IRQHandler,              // 29: Standard counter/timer CTIMER3\r
+    FLEXCOMM0_IRQHandler,            // 30: Flexcomm Interface 0 (USART, SPI, I2C, I2S, FLEXCOMM)\r
+    FLEXCOMM1_IRQHandler,            // 31: Flexcomm Interface 1 (USART, SPI, I2C, I2S, FLEXCOMM)\r
+    FLEXCOMM2_IRQHandler,            // 32: Flexcomm Interface 2 (USART, SPI, I2C, I2S, FLEXCOMM)\r
+    FLEXCOMM3_IRQHandler,            // 33: Flexcomm Interface 3 (USART, SPI, I2C, I2S, FLEXCOMM)\r
+    FLEXCOMM4_IRQHandler,            // 34: Flexcomm Interface 4 (USART, SPI, I2C, I2S, FLEXCOMM)\r
+    FLEXCOMM5_IRQHandler,            // 35: Flexcomm Interface 5 (USART, SPI, I2C, I2S, FLEXCOMM)\r
+    FLEXCOMM6_IRQHandler,            // 36: Flexcomm Interface 6 (USART, SPI, I2C, I2S, FLEXCOMM)\r
+    FLEXCOMM7_IRQHandler,            // 37: Flexcomm Interface 7 (USART, SPI, I2C, I2S, FLEXCOMM)\r
+    ADC0_IRQHandler,                 // 38: ADC0\r
+    Reserved39_IRQHandler,           // 39: Reserved interrupt\r
+    ACMP_IRQHandler,                 // 40: ACMP  interrupts\r
+    Reserved41_IRQHandler,           // 41: Reserved interrupt\r
+    Reserved42_IRQHandler,           // 42: Reserved interrupt\r
+    USB0_NEEDCLK_IRQHandler,         // 43: USB Activity Wake-up Interrupt\r
+    USB0_IRQHandler,                 // 44: USB device\r
+    RTC_IRQHandler,                  // 45: RTC alarm and wake-up interrupts\r
+    Reserved46_IRQHandler,           // 46: Reserved interrupt\r
+    MAILBOX_IRQHandler,              // 47: WAKEUP,Mailbox interrupt (present on selected devices)\r
+    PIN_INT4_IRQHandler,             // 48: Pin interrupt 4 or pattern match engine slice 4 int\r
+    PIN_INT5_IRQHandler,             // 49: Pin interrupt 5 or pattern match engine slice 5 int\r
+    PIN_INT6_IRQHandler,             // 50: Pin interrupt 6 or pattern match engine slice 6 int\r
+    PIN_INT7_IRQHandler,             // 51: Pin interrupt 7 or pattern match engine slice 7 int\r
+    CTIMER2_IRQHandler,              // 52: Standard counter/timer CTIMER2\r
+    CTIMER4_IRQHandler,              // 53: Standard counter/timer CTIMER4\r
+    OS_EVENT_IRQHandler,             // 54: OSEVTIMER0 and OSEVTIMER0_WAKEUP interrupts\r
+    Reserved55_IRQHandler,           // 55: Reserved interrupt\r
+    Reserved56_IRQHandler,           // 56: Reserved interrupt\r
+    Reserved57_IRQHandler,           // 57: Reserved interrupt\r
+    SDIO_IRQHandler,                 // 58: SD/MMC\r
+    Reserved59_IRQHandler,           // 59: Reserved interrupt\r
+    Reserved60_IRQHandler,           // 60: Reserved interrupt\r
+    Reserved61_IRQHandler,           // 61: Reserved interrupt\r
+    USB1_UTMI_IRQHandler,            // 62: USB1_UTMI\r
+    USB1_IRQHandler,                 // 63: USB1 interrupt\r
+    USB1_NEEDCLK_IRQHandler,         // 64: USB1 activity\r
+    SEC_HYPERVISOR_CALL_IRQHandler,  // 65: SEC_HYPERVISOR_CALL interrupt\r
+    SEC_GPIO_INT0_IRQ0_IRQHandler,   // 66: SEC_GPIO_INT0_IRQ0 interrupt\r
+    SEC_GPIO_INT0_IRQ1_IRQHandler,   // 67: SEC_GPIO_INT0_IRQ1 interrupt\r
+    PLU_IRQHandler,                  // 68: PLU interrupt\r
+    SEC_VIO_IRQHandler,              // 69: SEC_VIO interrupt\r
+    HASHCRYPT_IRQHandler,            // 70: HASHCRYPT interrupt\r
+    CASER_IRQHandler,                // 71: CASPER interrupt\r
+    PUF_IRQHandler,                  // 72: PUF interrupt\r
+    PQ_IRQHandler,                   // 73: PQ interrupt\r
+    DMA1_IRQHandler,                 // 74: DMA1 interrupt\r
+    LSPI_HS_IRQHandler,              // 75: Flexcomm Interface 8 (SPI, , FLEXCOMM)\r
+\r
+}; /* End of g_pfnVectors */\r
+\r
+//*****************************************************************************\r
+// Functions to carry out the initialization of RW and BSS data sections. These\r
+// are written as separate functions rather than being inlined within the\r
+// ResetISR() function in order to cope with MCUs with multiple banks of\r
+// memory.\r
+//*****************************************************************************\r
+__attribute__ ((section(".after_vectors.init_data")))\r
+void data_init(unsigned int romstart, unsigned int start, unsigned int len) {\r
+    unsigned int *pulDest = (unsigned int*) start;\r
+    unsigned int *pulSrc = (unsigned int*) romstart;\r
+    unsigned int loop;\r
+    for (loop = 0; loop < len; loop = loop + 4)\r
+        *pulDest++ = *pulSrc++;\r
+}\r
+\r
+__attribute__ ((section(".after_vectors.init_bss")))\r
+void bss_init(unsigned int start, unsigned int len) {\r
+    unsigned int *pulDest = (unsigned int*) start;\r
+    unsigned int loop;\r
+    for (loop = 0; loop < len; loop = loop + 4)\r
+        *pulDest++ = 0;\r
+}\r
+\r
+//*****************************************************************************\r
+// The following symbols are constructs generated by the linker, indicating\r
+// the location of various points in the "Global Section Table". This table is\r
+// created by the linker via the Code Red managed linker script mechanism. It\r
+// contains the load address, execution address and length of each RW data\r
+// section and the execution and length of each BSS (zero initialized) section.\r
+//*****************************************************************************\r
+extern unsigned int __data_section_table;\r
+extern unsigned int __data_section_table_end;\r
+extern unsigned int __bss_section_table;\r
+extern unsigned int __bss_section_table_end;\r
+\r
+//*****************************************************************************\r
+// Reset entry point for your code.\r
+// Sets up a simple runtime environment and initializes the C/C++\r
+// library.\r
+//*****************************************************************************\r
+__attribute__ ((section(".after_vectors.reset")))\r
+void ResetISR(void) {\r
+\r
+    // Disable interrupts\r
+    __asm volatile ("cpsid i");\r
+\r
+#if defined (__USE_CMSIS)\r
+// If __USE_CMSIS defined, then call CMSIS SystemInit code\r
+    SystemInit();\r
+\r
+#endif // (__USE_CMSIS)\r
+\r
+    //\r
+    // Copy the data sections from flash to SRAM.\r
+    //\r
+    unsigned int LoadAddr, ExeAddr, SectionLen;\r
+    unsigned int *SectionTableAddr;\r
+\r
+    // Load base address of Global Section Table\r
+    SectionTableAddr = &__data_section_table;\r
+\r
+    // Copy the data sections from flash to SRAM.\r
+    while (SectionTableAddr < &__data_section_table_end) {\r
+        LoadAddr = *SectionTableAddr++;\r
+        ExeAddr = *SectionTableAddr++;\r
+        SectionLen = *SectionTableAddr++;\r
+        data_init(LoadAddr, ExeAddr, SectionLen);\r
+    }\r
+\r
+    // At this point, SectionTableAddr = &__bss_section_table;\r
+    // Zero fill the bss segment\r
+    while (SectionTableAddr < &__bss_section_table_end) {\r
+        ExeAddr = *SectionTableAddr++;\r
+        SectionLen = *SectionTableAddr++;\r
+        bss_init(ExeAddr, SectionLen);\r
+    }\r
+\r
+\r
+#if !defined (__USE_CMSIS)\r
+// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code\r
+// will setup the VTOR register\r
+\r
+    // Check to see if we are running the code from a non-zero\r
+    // address (eg RAM, external flash), in which case we need\r
+    // to modify the VTOR register to tell the CPU that the\r
+    // vector table is located at a non-0x0 address.\r
+    unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;\r
+    if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {\r
+        *pSCB_VTOR = (unsigned int)g_pfnVectors;\r
+    }\r
+#endif // (__USE_CMSIS)\r
+#if defined (__cplusplus)\r
+    //\r
+    // Call C++ library initialisation\r
+    //\r
+    __libc_init_array();\r
+#endif\r
+\r
+    // Reenable interrupts\r
+    __asm volatile ("cpsie i");\r
+\r
+#if defined (__REDLIB__)\r
+    // Call the Redlib library, which in turn calls main()\r
+    __main();\r
+#else\r
+    main();\r
+#endif\r
+\r
+    //\r
+    // main() shouldn't return, but if it does, we'll just enter an infinite loop\r
+    //\r
+    while (1) {\r
+        ;\r
+    }\r
+}\r
+\r
+//*****************************************************************************\r
+// Default core exception handlers. Override the ones here by defining your own\r
+// handler routines in your application code.\r
+//*****************************************************************************\r
+WEAK_AV void NMI_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void HardFault_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void MemManage_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void BusFault_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void UsageFault_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void SVC_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void DebugMon_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void PendSV_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+WEAK_AV void SysTick_Handler(void)\r
+{ while(1) {}\r
+}\r
+\r
+//*****************************************************************************\r
+// Processor ends up here if an unexpected interrupt occurs or a specific\r
+// handler is not present in the application code.\r
+//*****************************************************************************\r
+WEAK_AV void IntDefaultHandler(void)\r
+{ while(1) {}\r
+}\r
+\r
+//*****************************************************************************\r
+// Default application exception handlers. Override the ones here by defining\r
+// your own handler routines in your application code. These routines call\r
+// driver exception handlers or IntDefaultHandler() if no driver exception\r
+// handler is included.\r
+//*****************************************************************************\r
+WEAK void WDT_BOD_IRQHandler(void)\r
+{   WDT_BOD_DriverIRQHandler();\r
+}\r
+\r
+WEAK void DMA0_IRQHandler(void)\r
+{   DMA0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void GINT0_IRQHandler(void)\r
+{   GINT0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void GINT1_IRQHandler(void)\r
+{   GINT1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT0_IRQHandler(void)\r
+{   PIN_INT0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT1_IRQHandler(void)\r
+{   PIN_INT1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT2_IRQHandler(void)\r
+{   PIN_INT2_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT3_IRQHandler(void)\r
+{   PIN_INT3_DriverIRQHandler();\r
+}\r
+\r
+WEAK void UTICK0_IRQHandler(void)\r
+{   UTICK0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void MRT0_IRQHandler(void)\r
+{   MRT0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER0_IRQHandler(void)\r
+{   CTIMER0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER1_IRQHandler(void)\r
+{   CTIMER1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SCT0_IRQHandler(void)\r
+{   SCT0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER3_IRQHandler(void)\r
+{   CTIMER3_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM0_IRQHandler(void)\r
+{   FLEXCOMM0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM1_IRQHandler(void)\r
+{   FLEXCOMM1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM2_IRQHandler(void)\r
+{   FLEXCOMM2_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM3_IRQHandler(void)\r
+{   FLEXCOMM3_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM4_IRQHandler(void)\r
+{   FLEXCOMM4_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM5_IRQHandler(void)\r
+{   FLEXCOMM5_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM6_IRQHandler(void)\r
+{   FLEXCOMM6_DriverIRQHandler();\r
+}\r
+\r
+WEAK void FLEXCOMM7_IRQHandler(void)\r
+{   FLEXCOMM7_DriverIRQHandler();\r
+}\r
+\r
+WEAK void ADC0_IRQHandler(void)\r
+{   ADC0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved39_IRQHandler(void)\r
+{   Reserved39_DriverIRQHandler();\r
+}\r
+\r
+WEAK void ACMP_IRQHandler(void)\r
+{   ACMP_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved41_IRQHandler(void)\r
+{   Reserved41_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved42_IRQHandler(void)\r
+{   Reserved42_DriverIRQHandler();\r
+}\r
+\r
+WEAK void USB0_NEEDCLK_IRQHandler(void)\r
+{   USB0_NEEDCLK_DriverIRQHandler();\r
+}\r
+\r
+WEAK void USB0_IRQHandler(void)\r
+{   USB0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void RTC_IRQHandler(void)\r
+{   RTC_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved46_IRQHandler(void)\r
+{   Reserved46_DriverIRQHandler();\r
+}\r
+\r
+WEAK void MAILBOX_IRQHandler(void)\r
+{   MAILBOX_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT4_IRQHandler(void)\r
+{   PIN_INT4_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT5_IRQHandler(void)\r
+{   PIN_INT5_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT6_IRQHandler(void)\r
+{   PIN_INT6_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PIN_INT7_IRQHandler(void)\r
+{   PIN_INT7_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER2_IRQHandler(void)\r
+{   CTIMER2_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CTIMER4_IRQHandler(void)\r
+{   CTIMER4_DriverIRQHandler();\r
+}\r
+\r
+WEAK void OS_EVENT_IRQHandler(void)\r
+{   OS_EVENT_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved55_IRQHandler(void)\r
+{   Reserved55_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved56_IRQHandler(void)\r
+{   Reserved56_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved57_IRQHandler(void)\r
+{   Reserved57_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SDIO_IRQHandler(void)\r
+{   SDIO_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved59_IRQHandler(void)\r
+{   Reserved59_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved60_IRQHandler(void)\r
+{   Reserved60_DriverIRQHandler();\r
+}\r
+\r
+WEAK void Reserved61_IRQHandler(void)\r
+{   Reserved61_DriverIRQHandler();\r
+}\r
+\r
+WEAK void USB1_UTMI_IRQHandler(void)\r
+{   USB1_UTMI_DriverIRQHandler();\r
+}\r
+\r
+WEAK void USB1_IRQHandler(void)\r
+{   USB1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void USB1_NEEDCLK_IRQHandler(void)\r
+{   USB1_NEEDCLK_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SEC_HYPERVISOR_CALL_IRQHandler(void)\r
+{   SEC_HYPERVISOR_CALL_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SEC_GPIO_INT0_IRQ0_IRQHandler(void)\r
+{   SEC_GPIO_INT0_IRQ0_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SEC_GPIO_INT0_IRQ1_IRQHandler(void)\r
+{   SEC_GPIO_INT0_IRQ1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PLU_IRQHandler(void)\r
+{   PLU_DriverIRQHandler();\r
+}\r
+\r
+WEAK void SEC_VIO_IRQHandler(void)\r
+{   SEC_VIO_DriverIRQHandler();\r
+}\r
+\r
+WEAK void HASHCRYPT_IRQHandler(void)\r
+{   HASHCRYPT_DriverIRQHandler();\r
+}\r
+\r
+WEAK void CASER_IRQHandler(void)\r
+{   CASER_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PUF_IRQHandler(void)\r
+{   PUF_DriverIRQHandler();\r
+}\r
+\r
+WEAK void PQ_IRQHandler(void)\r
+{   PQ_DriverIRQHandler();\r
+}\r
+\r
+WEAK void DMA1_IRQHandler(void)\r
+{   DMA1_DriverIRQHandler();\r
+}\r
+\r
+WEAK void LSPI_HS_IRQHandler(void)\r
+{   LSPI_HS_DriverIRQHandler();\r
+}\r
+\r
+//*****************************************************************************\r
+\r
+#if defined (DEBUG)\r
+#pragma GCC pop_options\r
+#endif // (DEBUG)\r