--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32l4xx_hal_i2c.h\r
+ * @author MCD Application Team\r
+ * @brief Header file of I2C HAL module.\r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * <h2><center>© Copyright (c) 2017 STMicroelectronics.\r
+ * All rights reserved.</center></h2>\r
+ *\r
+ * This software component is licensed by ST under BSD 3-Clause license,\r
+ * the "License"; You may not use this file except in compliance with the\r
+ * License. You may obtain a copy of the License at:\r
+ * opensource.org/licenses/BSD-3-Clause\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef STM32L4xx_HAL_I2C_H\r
+#define STM32L4xx_HAL_I2C_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32l4xx_hal_def.h"\r
+\r
+/** @addtogroup STM32L4xx_HAL_Driver\r
+ * @{\r
+ */\r
+\r
+/** @addtogroup I2C\r
+ * @{\r
+ */\r
+\r
+/* Exported types ------------------------------------------------------------*/\r
+/** @defgroup I2C_Exported_Types I2C Exported Types\r
+ * @{\r
+ */\r
+\r
+/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition\r
+ * @brief I2C Configuration Structure definition\r
+ * @{\r
+ */\r
+typedef struct\r
+{\r
+ uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.\r
+ This parameter calculated by referring to I2C initialization\r
+ section in Reference manual */\r
+\r
+ uint32_t OwnAddress1; /*!< Specifies the first device own address.\r
+ This parameter can be a 7-bit or 10-bit address. */\r
+\r
+ uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.\r
+ This parameter can be a value of @ref I2C_ADDRESSING_MODE */\r
+\r
+ uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.\r
+ This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */\r
+\r
+ uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected\r
+ This parameter can be a 7-bit address. */\r
+\r
+ uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected\r
+ This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */\r
+\r
+ uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.\r
+ This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */\r
+\r
+ uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.\r
+ This parameter can be a value of @ref I2C_NOSTRETCH_MODE */\r
+\r
+} I2C_InitTypeDef;\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup HAL_state_structure_definition HAL state structure definition\r
+ * @brief HAL State structure definition\r
+ * @note HAL I2C State value coding follow below described bitmap :\n\r
+ * b7-b6 Error information\n\r
+ * 00 : No Error\n\r
+ * 01 : Abort (Abort user request on going)\n\r
+ * 10 : Timeout\n\r
+ * 11 : Error\n\r
+ * b5 Peripheral initialization status\n\r
+ * 0 : Reset (peripheral not initialized)\n\r
+ * 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n\r
+ * b4 (not used)\n\r
+ * x : Should be set to 0\n\r
+ * b3\n\r
+ * 0 : Ready or Busy (No Listen mode ongoing)\n\r
+ * 1 : Listen (peripheral in Address Listen Mode)\n\r
+ * b2 Intrinsic process state\n\r
+ * 0 : Ready\n\r
+ * 1 : Busy (peripheral busy with some configuration or internal operations)\n\r
+ * b1 Rx state\n\r
+ * 0 : Ready (no Rx operation ongoing)\n\r
+ * 1 : Busy (Rx operation ongoing)\n\r
+ * b0 Tx state\n\r
+ * 0 : Ready (no Tx operation ongoing)\n\r
+ * 1 : Busy (Tx operation ongoing)\r
+ * @{\r
+ */\r
+typedef enum\r
+{\r
+ HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */\r
+ HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */\r
+ HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */\r
+ HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */\r
+ HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */\r
+ HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */\r
+ HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission\r
+ process is ongoing */\r
+ HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception\r
+ process is ongoing */\r
+ HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */\r
+ HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */\r
+ HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */\r
+\r
+} HAL_I2C_StateTypeDef;\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup HAL_mode_structure_definition HAL mode structure definition\r
+ * @brief HAL Mode structure definition\r
+ * @note HAL I2C Mode value coding follow below described bitmap :\n\r
+ * b7 (not used)\n\r
+ * x : Should be set to 0\n\r
+ * b6\n\r
+ * 0 : None\n\r
+ * 1 : Memory (HAL I2C communication is in Memory Mode)\n\r
+ * b5\n\r
+ * 0 : None\n\r
+ * 1 : Slave (HAL I2C communication is in Slave Mode)\n\r
+ * b4\n\r
+ * 0 : None\n\r
+ * 1 : Master (HAL I2C communication is in Master Mode)\n\r
+ * b3-b2-b1-b0 (not used)\n\r
+ * xxxx : Should be set to 0000\r
+ * @{\r
+ */\r
+typedef enum\r
+{\r
+ HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */\r
+ HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */\r
+ HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */\r
+ HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */\r
+\r
+} HAL_I2C_ModeTypeDef;\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_Error_Code_definition I2C Error Code definition\r
+ * @brief I2C Error Code definition\r
+ * @{\r
+ */\r
+#define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */\r
+#define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */\r
+#define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */\r
+#define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */\r
+#define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */\r
+#define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */\r
+#define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */\r
+#define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */\r
+#define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */\r
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
+#define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */\r
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
+#define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition\r
+ * @brief I2C handle Structure definition\r
+ * @{\r
+ */\r
+typedef struct __I2C_HandleTypeDef\r
+{\r
+ I2C_TypeDef *Instance; /*!< I2C registers base address */\r
+\r
+ I2C_InitTypeDef Init; /*!< I2C communication parameters */\r
+\r
+ uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */\r
+\r
+ uint16_t XferSize; /*!< I2C transfer size */\r
+\r
+ __IO uint16_t XferCount; /*!< I2C transfer counter */\r
+\r
+ __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can\r
+ be a value of @ref I2C_XFEROPTIONS */\r
+\r
+ __IO uint32_t PreviousState; /*!< I2C communication Previous state */\r
+\r
+ HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */\r
+\r
+ DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */\r
+\r
+ DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */\r
+\r
+ HAL_LockTypeDef Lock; /*!< I2C locking object */\r
+\r
+ __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */\r
+\r
+ __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */\r
+\r
+ __IO uint32_t ErrorCode; /*!< I2C Error code */\r
+\r
+ __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */\r
+\r
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
+ void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */\r
+ void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */\r
+ void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */\r
+ void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */\r
+ void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */\r
+ void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */\r
+ void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */\r
+ void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */\r
+ void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */\r
+\r
+ void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */\r
+\r
+ void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */\r
+ void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */\r
+\r
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
+} I2C_HandleTypeDef;\r
+\r
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
+/**\r
+ * @brief HAL I2C Callback ID enumeration definition\r
+ */\r
+typedef enum\r
+{\r
+ HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */\r
+ HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */\r
+ HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */\r
+ HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */\r
+ HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */\r
+ HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */\r
+ HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */\r
+ HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */\r
+ HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */\r
+\r
+ HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */\r
+ HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */\r
+\r
+} HAL_I2C_CallbackIDTypeDef;\r
+\r
+/**\r
+ * @brief HAL I2C Callback pointer definition\r
+ */\r
+typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */\r
+typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */\r
+\r
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+/* Exported constants --------------------------------------------------------*/\r
+\r
+/** @defgroup I2C_Exported_Constants I2C Exported Constants\r
+ * @{\r
+ */\r
+\r
+/** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options\r
+ * @{\r
+ */\r
+#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)\r
+#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))\r
+#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))\r
+#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)\r
+#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)\r
+#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)\r
+\r
+/* List of XferOptions in usage of :\r
+ * 1- Restart condition in all use cases (direction change or not)\r
+ */\r
+#define I2C_OTHER_FRAME (0x000000AAU)\r
+#define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode\r
+ * @{\r
+ */\r
+#define I2C_ADDRESSINGMODE_7BIT (0x00000001U)\r
+#define I2C_ADDRESSINGMODE_10BIT (0x00000002U)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode\r
+ * @{\r
+ */\r
+#define I2C_DUALADDRESS_DISABLE (0x00000000U)\r
+#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks\r
+ * @{\r
+ */\r
+#define I2C_OA2_NOMASK ((uint8_t)0x00U)\r
+#define I2C_OA2_MASK01 ((uint8_t)0x01U)\r
+#define I2C_OA2_MASK02 ((uint8_t)0x02U)\r
+#define I2C_OA2_MASK03 ((uint8_t)0x03U)\r
+#define I2C_OA2_MASK04 ((uint8_t)0x04U)\r
+#define I2C_OA2_MASK05 ((uint8_t)0x05U)\r
+#define I2C_OA2_MASK06 ((uint8_t)0x06U)\r
+#define I2C_OA2_MASK07 ((uint8_t)0x07U)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode\r
+ * @{\r
+ */\r
+#define I2C_GENERALCALL_DISABLE (0x00000000U)\r
+#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode\r
+ * @{\r
+ */\r
+#define I2C_NOSTRETCH_DISABLE (0x00000000U)\r
+#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size\r
+ * @{\r
+ */\r
+#define I2C_MEMADD_SIZE_8BIT (0x00000001U)\r
+#define I2C_MEMADD_SIZE_16BIT (0x00000002U)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View\r
+ * @{\r
+ */\r
+#define I2C_DIRECTION_TRANSMIT (0x00000000U)\r
+#define I2C_DIRECTION_RECEIVE (0x00000001U)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode\r
+ * @{\r
+ */\r
+#define I2C_RELOAD_MODE I2C_CR2_RELOAD\r
+#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND\r
+#define I2C_SOFTEND_MODE (0x00000000U)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode\r
+ * @{\r
+ */\r
+#define I2C_NO_STARTSTOP (0x00000000U)\r
+#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)\r
+#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)\r
+#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition\r
+ * @brief I2C Interrupt definition\r
+ * Elements values convention: 0xXXXXXXXX\r
+ * - XXXXXXXX : Interrupt control mask\r
+ * @{\r
+ */\r
+#define I2C_IT_ERRI I2C_CR1_ERRIE\r
+#define I2C_IT_TCI I2C_CR1_TCIE\r
+#define I2C_IT_STOPI I2C_CR1_STOPIE\r
+#define I2C_IT_NACKI I2C_CR1_NACKIE\r
+#define I2C_IT_ADDRI I2C_CR1_ADDRIE\r
+#define I2C_IT_RXI I2C_CR1_RXIE\r
+#define I2C_IT_TXI I2C_CR1_TXIE\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2C_Flag_definition I2C Flag definition\r
+ * @{\r
+ */\r
+#define I2C_FLAG_TXE I2C_ISR_TXE\r
+#define I2C_FLAG_TXIS I2C_ISR_TXIS\r
+#define I2C_FLAG_RXNE I2C_ISR_RXNE\r
+#define I2C_FLAG_ADDR I2C_ISR_ADDR\r
+#define I2C_FLAG_AF I2C_ISR_NACKF\r
+#define I2C_FLAG_STOPF I2C_ISR_STOPF\r
+#define I2C_FLAG_TC I2C_ISR_TC\r
+#define I2C_FLAG_TCR I2C_ISR_TCR\r
+#define I2C_FLAG_BERR I2C_ISR_BERR\r
+#define I2C_FLAG_ARLO I2C_ISR_ARLO\r
+#define I2C_FLAG_OVR I2C_ISR_OVR\r
+#define I2C_FLAG_PECERR I2C_ISR_PECERR\r
+#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT\r
+#define I2C_FLAG_ALERT I2C_ISR_ALERT\r
+#define I2C_FLAG_BUSY I2C_ISR_BUSY\r
+#define I2C_FLAG_DIR I2C_ISR_DIR\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported macros -----------------------------------------------------------*/\r
+\r
+/** @defgroup I2C_Exported_Macros I2C Exported Macros\r
+ * @{\r
+ */\r
+\r
+/** @brief Reset I2C handle state.\r
+ * @param __HANDLE__ specifies the I2C Handle.\r
+ * @retval None\r
+ */\r
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
+#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \\r
+ (__HANDLE__)->State = HAL_I2C_STATE_RESET; \\r
+ (__HANDLE__)->MspInitCallback = NULL; \\r
+ (__HANDLE__)->MspDeInitCallback = NULL; \\r
+ } while(0)\r
+#else\r
+#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)\r
+#endif\r
+\r
+/** @brief Enable the specified I2C interrupt.\r
+ * @param __HANDLE__ specifies the I2C Handle.\r
+ * @param __INTERRUPT__ specifies the interrupt source to enable.\r
+ * This parameter can be one of the following values:\r
+ * @arg @ref I2C_IT_ERRI Errors interrupt enable\r
+ * @arg @ref I2C_IT_TCI Transfer complete interrupt enable\r
+ * @arg @ref I2C_IT_STOPI STOP detection interrupt enable\r
+ * @arg @ref I2C_IT_NACKI NACK received interrupt enable\r
+ * @arg @ref I2C_IT_ADDRI Address match interrupt enable\r
+ * @arg @ref I2C_IT_RXI RX interrupt enable\r
+ * @arg @ref I2C_IT_TXI TX interrupt enable\r
+ *\r
+ * @retval None\r
+ */\r
+#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))\r
+\r
+/** @brief Disable the specified I2C interrupt.\r
+ * @param __HANDLE__ specifies the I2C Handle.\r
+ * @param __INTERRUPT__ specifies the interrupt source to disable.\r
+ * This parameter can be one of the following values:\r
+ * @arg @ref I2C_IT_ERRI Errors interrupt enable\r
+ * @arg @ref I2C_IT_TCI Transfer complete interrupt enable\r
+ * @arg @ref I2C_IT_STOPI STOP detection interrupt enable\r
+ * @arg @ref I2C_IT_NACKI NACK received interrupt enable\r
+ * @arg @ref I2C_IT_ADDRI Address match interrupt enable\r
+ * @arg @ref I2C_IT_RXI RX interrupt enable\r
+ * @arg @ref I2C_IT_TXI TX interrupt enable\r
+ *\r
+ * @retval None\r
+ */\r
+#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))\r
+\r
+/** @brief Check whether the specified I2C interrupt source is enabled or not.\r
+ * @param __HANDLE__ specifies the I2C Handle.\r
+ * @param __INTERRUPT__ specifies the I2C interrupt source to check.\r
+ * This parameter can be one of the following values:\r
+ * @arg @ref I2C_IT_ERRI Errors interrupt enable\r
+ * @arg @ref I2C_IT_TCI Transfer complete interrupt enable\r
+ * @arg @ref I2C_IT_STOPI STOP detection interrupt enable\r
+ * @arg @ref I2C_IT_NACKI NACK received interrupt enable\r
+ * @arg @ref I2C_IT_ADDRI Address match interrupt enable\r
+ * @arg @ref I2C_IT_RXI RX interrupt enable\r
+ * @arg @ref I2C_IT_TXI TX interrupt enable\r
+ *\r
+ * @retval The new state of __INTERRUPT__ (SET or RESET).\r
+ */\r
+#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)\r
+\r
+/** @brief Check whether the specified I2C flag is set or not.\r
+ * @param __HANDLE__ specifies the I2C Handle.\r
+ * @param __FLAG__ specifies the flag to check.\r
+ * This parameter can be one of the following values:\r
+ * @arg @ref I2C_FLAG_TXE Transmit data register empty\r
+ * @arg @ref I2C_FLAG_TXIS Transmit interrupt status\r
+ * @arg @ref I2C_FLAG_RXNE Receive data register not empty\r
+ * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)\r
+ * @arg @ref I2C_FLAG_AF Acknowledge failure received flag\r
+ * @arg @ref I2C_FLAG_STOPF STOP detection flag\r
+ * @arg @ref I2C_FLAG_TC Transfer complete (master mode)\r
+ * @arg @ref I2C_FLAG_TCR Transfer complete reload\r
+ * @arg @ref I2C_FLAG_BERR Bus error\r
+ * @arg @ref I2C_FLAG_ARLO Arbitration lost\r
+ * @arg @ref I2C_FLAG_OVR Overrun/Underrun\r
+ * @arg @ref I2C_FLAG_PECERR PEC error in reception\r
+ * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag\r
+ * @arg @ref I2C_FLAG_ALERT SMBus alert\r
+ * @arg @ref I2C_FLAG_BUSY Bus busy\r
+ * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)\r
+ *\r
+ * @retval The new state of __FLAG__ (SET or RESET).\r
+ */\r
+#define I2C_FLAG_MASK (0x0001FFFFU)\r
+#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)\r
+\r
+/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.\r
+ * @param __HANDLE__ specifies the I2C Handle.\r
+ * @param __FLAG__ specifies the flag to clear.\r
+ * This parameter can be any combination of the following values:\r
+ * @arg @ref I2C_FLAG_TXE Transmit data register empty\r
+ * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)\r
+ * @arg @ref I2C_FLAG_AF Acknowledge failure received flag\r
+ * @arg @ref I2C_FLAG_STOPF STOP detection flag\r
+ * @arg @ref I2C_FLAG_BERR Bus error\r
+ * @arg @ref I2C_FLAG_ARLO Arbitration lost\r
+ * @arg @ref I2C_FLAG_OVR Overrun/Underrun\r
+ * @arg @ref I2C_FLAG_PECERR PEC error in reception\r
+ * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag\r
+ * @arg @ref I2C_FLAG_ALERT SMBus alert\r
+ *\r
+ * @retval None\r
+ */\r
+#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \\r
+ : ((__HANDLE__)->Instance->ICR = (__FLAG__)))\r
+\r
+/** @brief Enable the specified I2C peripheral.\r
+ * @param __HANDLE__ specifies the I2C Handle.\r
+ * @retval None\r
+ */\r
+#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))\r
+\r
+/** @brief Disable the specified I2C peripheral.\r
+ * @param __HANDLE__ specifies the I2C Handle.\r
+ * @retval None\r
+ */\r
+#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))\r
+\r
+/** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.\r
+ * @param __HANDLE__ specifies the I2C Handle.\r
+ * @retval None\r
+ */\r
+#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Include I2C HAL Extended module */\r
+#include "stm32l4xx_hal_i2c_ex.h"\r
+\r
+/* Exported functions --------------------------------------------------------*/\r
+/** @addtogroup I2C_Exported_Functions\r
+ * @{\r
+ */\r
+\r
+/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions\r
+ * @{\r
+ */\r
+/* Initialization and de-initialization functions******************************/\r
+HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);\r
+HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);\r
+\r
+/* Callbacks Register/UnRegister functions ***********************************/\r
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
+HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);\r
+HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);\r
+\r
+HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);\r
+HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);\r
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions\r
+ * @{\r
+ */\r
+/* IO operation functions ****************************************************/\r
+/******* Blocking mode: Polling */\r
+HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);\r
+HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);\r
+HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);\r
+HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);\r
+HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);\r
+\r
+/******* Non-Blocking mode: Interrupt */\r
+HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);\r
+\r
+HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);\r
+HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);\r
+HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);\r
+HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);\r
+HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);\r
+\r
+/******* Non-Blocking mode: DMA */\r
+HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);\r
+HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);\r
+\r
+HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);\r
+HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);\r
+HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks\r
+ * @{\r
+ */\r
+/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */\r
+void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);\r
+void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);\r
+void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions\r
+ * @{\r
+ */\r
+/* Peripheral State, Mode and Error functions *********************************/\r
+HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);\r
+HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);\r
+uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Private constants ---------------------------------------------------------*/\r
+/** @defgroup I2C_Private_Constants I2C Private Constants\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Private macros ------------------------------------------------------------*/\r
+/** @defgroup I2C_Private_Macro I2C Private Macros\r
+ * @{\r
+ */\r
+\r
+#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \\r
+ ((MODE) == I2C_ADDRESSINGMODE_10BIT))\r
+\r
+#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \\r
+ ((ADDRESS) == I2C_DUALADDRESS_ENABLE))\r
+\r
+#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \\r
+ ((MASK) == I2C_OA2_MASK01) || \\r
+ ((MASK) == I2C_OA2_MASK02) || \\r
+ ((MASK) == I2C_OA2_MASK03) || \\r
+ ((MASK) == I2C_OA2_MASK04) || \\r
+ ((MASK) == I2C_OA2_MASK05) || \\r
+ ((MASK) == I2C_OA2_MASK06) || \\r
+ ((MASK) == I2C_OA2_MASK07))\r
+\r
+#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \\r
+ ((CALL) == I2C_GENERALCALL_ENABLE))\r
+\r
+#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \\r
+ ((STRETCH) == I2C_NOSTRETCH_ENABLE))\r
+\r
+#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \\r
+ ((SIZE) == I2C_MEMADD_SIZE_16BIT))\r
+\r
+#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \\r
+ ((MODE) == I2C_AUTOEND_MODE) || \\r
+ ((MODE) == I2C_SOFTEND_MODE))\r
+\r
+#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \\r
+ ((REQUEST) == I2C_GENERATE_START_READ) || \\r
+ ((REQUEST) == I2C_GENERATE_START_WRITE) || \\r
+ ((REQUEST) == I2C_NO_STARTSTOP))\r
+\r
+#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \\r
+ ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \\r
+ ((REQUEST) == I2C_NEXT_FRAME) || \\r
+ ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \\r
+ ((REQUEST) == I2C_LAST_FRAME) || \\r
+ ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \\r
+ IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))\r
+\r
+#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \\r
+ ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))\r
+\r
+#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))\r
+\r
+#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U))\r
+#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U))\r
+#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)\r
+#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))\r
+#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))\r
+\r
+#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)\r
+#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)\r
+\r
+#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))\r
+#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))\r
+\r
+#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \\r
+ (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))\r
+\r
+#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)\r
+#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Private Functions ---------------------------------------------------------*/\r
+/** @defgroup I2C_Private_Functions I2C Private Functions\r
+ * @{\r
+ */\r
+/* Private functions are defined in stm32l4xx_hal_i2c.c file */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+\r
+#endif /* STM32L4xx_HAL_I2C_H */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
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