--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32l4xx_hal_pcd.h\r
+ * @author MCD Application Team\r
+ * @brief Header file of PCD HAL module.\r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * <h2><center>© Copyright (c) 2017 STMicroelectronics.\r
+ * All rights reserved.</center></h2>\r
+ *\r
+ * This software component is licensed by ST under BSD 3-Clause license,\r
+ * the "License"; You may not use this file except in compliance with the\r
+ * License. You may obtain a copy of the License at:\r
+ * opensource.org/licenses/BSD-3-Clause\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef STM32L4xx_HAL_PCD_H\r
+#define STM32L4xx_HAL_PCD_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32l4xx_ll_usb.h"\r
+\r
+#if defined (USB) || defined (USB_OTG_FS)\r
+\r
+/** @addtogroup STM32L4xx_HAL_Driver\r
+ * @{\r
+ */\r
+\r
+/** @addtogroup PCD\r
+ * @{\r
+ */\r
+\r
+/* Exported types ------------------------------------------------------------*/\r
+/** @defgroup PCD_Exported_Types PCD Exported Types\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief PCD State structure definition\r
+ */\r
+typedef enum\r
+{\r
+ HAL_PCD_STATE_RESET = 0x00,\r
+ HAL_PCD_STATE_READY = 0x01,\r
+ HAL_PCD_STATE_ERROR = 0x02,\r
+ HAL_PCD_STATE_BUSY = 0x03,\r
+ HAL_PCD_STATE_TIMEOUT = 0x04\r
+} PCD_StateTypeDef;\r
+\r
+/* Device LPM suspend state */\r
+typedef enum\r
+{\r
+ LPM_L0 = 0x00, /* on */\r
+ LPM_L1 = 0x01, /* LPM L1 sleep */\r
+ LPM_L2 = 0x02, /* suspend */\r
+ LPM_L3 = 0x03, /* off */\r
+} PCD_LPM_StateTypeDef;\r
+\r
+typedef enum\r
+{\r
+ PCD_LPM_L0_ACTIVE = 0x00, /* on */\r
+ PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */\r
+} PCD_LPM_MsgTypeDef;\r
+\r
+typedef enum\r
+{\r
+ PCD_BCD_ERROR = 0xFF,\r
+ PCD_BCD_CONTACT_DETECTION = 0xFE,\r
+ PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,\r
+ PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,\r
+ PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,\r
+ PCD_BCD_DISCOVERY_COMPLETED = 0x00,\r
+\r
+} PCD_BCD_MsgTypeDef;\r
+\r
+#if defined (USB)\r
+\r
+#endif /* defined (USB) */\r
+#if defined (USB_OTG_FS)\r
+typedef USB_OTG_GlobalTypeDef PCD_TypeDef;\r
+typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;\r
+typedef USB_OTG_EPTypeDef PCD_EPTypeDef;\r
+#endif /* defined (USB_OTG_FS) */\r
+#if defined (USB)\r
+typedef USB_TypeDef PCD_TypeDef;\r
+typedef USB_CfgTypeDef PCD_InitTypeDef;\r
+typedef USB_EPTypeDef PCD_EPTypeDef;\r
+#endif /* defined (USB) */\r
+\r
+/**\r
+ * @brief PCD Handle Structure definition\r
+ */\r
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)\r
+typedef struct __PCD_HandleTypeDef\r
+#else\r
+typedef struct\r
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */\r
+{\r
+ PCD_TypeDef *Instance; /*!< Register base address */\r
+ PCD_InitTypeDef Init; /*!< PCD required parameters */\r
+ __IO uint8_t USB_Address; /*!< USB Address */\r
+#if defined (USB_OTG_FS)\r
+ PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */\r
+ PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */\r
+#endif /* defined (USB_OTG_FS) */\r
+#if defined (USB)\r
+ PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */\r
+ PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */\r
+#endif /* defined (USB) */\r
+ HAL_LockTypeDef Lock; /*!< PCD peripheral status */\r
+ __IO PCD_StateTypeDef State; /*!< PCD communication state */\r
+ __IO uint32_t ErrorCode; /*!< PCD Error code */\r
+ uint32_t Setup[12]; /*!< Setup packet buffer */\r
+ PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */\r
+ uint32_t BESL;\r
+\r
+\r
+ uint32_t lpm_active; /*!< Enable or disable the Link Power Management .\r
+ This parameter can be set to ENABLE or DISABLE */\r
+\r
+ uint32_t battery_charging_active; /*!< Enable or disable Battery charging.\r
+ This parameter can be set to ENABLE or DISABLE */\r
+ void *pData; /*!< Pointer to upper stack Handler */\r
+\r
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)\r
+ void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */\r
+ void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */\r
+ void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */\r
+ void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */\r
+ void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */\r
+ void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */\r
+ void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */\r
+\r
+ void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */\r
+ void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */\r
+ void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */\r
+ void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */\r
+ void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */\r
+ void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */\r
+\r
+ void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */\r
+ void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */\r
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */\r
+} PCD_HandleTypeDef;\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Include PCD HAL Extended module */\r
+#include "stm32l4xx_hal_pcd_ex.h"\r
+\r
+/* Exported constants --------------------------------------------------------*/\r
+/** @defgroup PCD_Exported_Constants PCD Exported Constants\r
+ * @{\r
+ */\r
+\r
+/** @defgroup PCD_Speed PCD Speed\r
+ * @{\r
+ */\r
+#define PCD_SPEED_FULL USBD_FS_SPEED\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup PCD_PHY_Module PCD PHY Module\r
+ * @{\r
+ */\r
+#define PCD_PHY_ULPI 1U\r
+#define PCD_PHY_EMBEDDED 2U\r
+#define PCD_PHY_UTMI 3U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup PCD_Error_Code_definition PCD Error Code definition\r
+ * @brief PCD Error Code definition\r
+ * @{\r
+ */\r
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)\r
+#define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */\r
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported macros -----------------------------------------------------------*/\r
+/** @defgroup PCD_Exported_Macros PCD Exported Macros\r
+ * @brief macros to handle interrupts and specific clock configurations\r
+ * @{\r
+ */\r
+#if defined (USB_OTG_FS)\r
+#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)\r
+#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)\r
+\r
+#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))\r
+#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))\r
+#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)\r
+\r
+\r
+#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \\r
+ ~(USB_OTG_PCGCCTL_STOPCLK)\r
+\r
+#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK\r
+\r
+#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)\r
+\r
+#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE\r
+#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)\r
+#endif /* defined (USB_OTG_FS) */\r
+\r
+#if defined (USB)\r
+#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)\r
+#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)\r
+#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))\r
+#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))\r
+\r
+#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE\r
+#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE)\r
+#endif /* defined (USB) */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported functions --------------------------------------------------------*/\r
+/** @addtogroup PCD_Exported_Functions PCD Exported Functions\r
+ * @{\r
+ */\r
+\r
+/* Initialization/de-initialization functions ********************************/\r
+/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions\r
+ * @{\r
+ */\r
+HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);\r
+HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);\r
+void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);\r
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);\r
+\r
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)\r
+/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition\r
+ * @brief HAL USB OTG PCD Callback ID enumeration definition\r
+ * @{\r
+ */\r
+typedef enum\r
+{\r
+ HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */\r
+ HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */\r
+ HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */\r
+ HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */\r
+ HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */\r
+ HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */\r
+ HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */\r
+\r
+ HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */\r
+ HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */\r
+\r
+} HAL_PCD_CallbackIDTypeDef;\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition\r
+ * @brief HAL USB OTG PCD Callback pointer definition\r
+ * @{\r
+ */\r
+\r
+typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */\r
+typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */\r
+typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */\r
+typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */\r
+typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */\r
+typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */\r
+typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);\r
+HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);\r
+\r
+HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);\r
+HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);\r
+\r
+HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);\r
+HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);\r
+\r
+HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);\r
+HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);\r
+\r
+HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);\r
+HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);\r
+\r
+HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);\r
+HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);\r
+\r
+HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);\r
+HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);\r
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* I/O operation functions ***************************************************/\r
+/* Non-Blocking mode: Interrupt */\r
+/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions\r
+ * @{\r
+ */\r
+HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);\r
+HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);\r
+void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);\r
+\r
+void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);\r
+void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);\r
+void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);\r
+void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);\r
+void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);\r
+void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);\r
+void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);\r
+\r
+void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);\r
+void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);\r
+void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);\r
+void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Peripheral Control functions **********************************************/\r
+/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions\r
+ * @{\r
+ */\r
+HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);\r
+HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);\r
+HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);\r
+HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);\r
+HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
+HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);\r
+HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);\r
+uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
+HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
+HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
+HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
+HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);\r
+HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Peripheral State functions ************************************************/\r
+/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions\r
+ * @{\r
+ */\r
+PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Private constants ---------------------------------------------------------*/\r
+/** @defgroup PCD_Private_Constants PCD Private Constants\r
+ * @{\r
+ */\r
+/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt\r
+ * @{\r
+ */\r
+#if defined (USB_OTG_FS)\r
+#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U\r
+#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU\r
+#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U\r
+\r
+#define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 17) /*!< USB FS EXTI Line WakeUp Interrupt */\r
+#endif /* defined (USB_OTG_FS) */\r
+\r
+#if defined (USB)\r
+#define USB_WAKEUP_EXTI_LINE (0x1U << 17) /*!< USB FS EXTI Line WakeUp Interrupt */\r
+#endif /* defined (USB) */\r
+\r
+/**\r
+ * @}\r
+ */\r
+#if defined (USB)\r
+/** @defgroup PCD_EP0_MPS PCD EP0 MPS\r
+ * @{\r
+ */\r
+#define PCD_EP0MPS_64 DEP0CTL_MPS_64\r
+#define PCD_EP0MPS_32 DEP0CTL_MPS_32\r
+#define PCD_EP0MPS_16 DEP0CTL_MPS_16\r
+#define PCD_EP0MPS_08 DEP0CTL_MPS_8\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup PCD_ENDP PCD ENDP\r
+ * @{\r
+ */\r
+#define PCD_ENDP0 0U\r
+#define PCD_ENDP1 1U\r
+#define PCD_ENDP2 2U\r
+#define PCD_ENDP3 3U\r
+#define PCD_ENDP4 4U\r
+#define PCD_ENDP5 5U\r
+#define PCD_ENDP6 6U\r
+#define PCD_ENDP7 7U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind\r
+ * @{\r
+ */\r
+#define PCD_SNG_BUF 0U\r
+#define PCD_DBL_BUF 1U\r
+/**\r
+ * @}\r
+ */\r
+#endif /* defined (USB) */\r
+/**\r
+ * @}\r
+ */\r
+\r
+#if defined (USB_OTG_FS)\r
+#ifndef USB_OTG_DOEPINT_OTEPSPR\r
+#define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */\r
+#endif\r
+\r
+#ifndef USB_OTG_DOEPMSK_OTEPSPRM\r
+#define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */\r
+#endif\r
+\r
+#ifndef USB_OTG_DOEPINT_NAK\r
+#define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */\r
+#endif\r
+\r
+#ifndef USB_OTG_DOEPMSK_NAKM\r
+#define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */\r
+#endif\r
+\r
+#ifndef USB_OTG_DOEPINT_STPKTRX\r
+#define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */\r
+#endif\r
+\r
+#ifndef USB_OTG_DOEPMSK_NYETM\r
+#define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */\r
+#endif\r
+#endif /* defined (USB_OTG_FS) */\r
+\r
+/* Private macros ------------------------------------------------------------*/\r
+/** @defgroup PCD_Private_Macros PCD Private Macros\r
+ * @{\r
+ */\r
+#if defined (USB)\r
+/******************** Bit definition for USB_COUNTn_RX register *************/\r
+#define USB_CNTRX_NBLK_MSK (0x1FU << 10)\r
+#define USB_CNTRX_BLSIZE (0x1U << 15)\r
+\r
+/* SetENDPOINT */\r
+#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))\r
+\r
+/* GetENDPOINT */\r
+#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))\r
+\r
+/* ENDPOINT transfer */\r
+#define USB_EP0StartXfer USB_EPStartXfer\r
+\r
+/**\r
+ * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param wType Endpoint Type.\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \\r
+ ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))\r
+\r
+/**\r
+ * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval Endpoint Type\r
+ */\r
+#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)\r
+\r
+/**\r
+ * @brief free buffer used from the application realizing it to the line\r
+ * toggles bit SW_BUF in the double buffered endpoint register\r
+ * @param USBx USB device.\r
+ * @param bEpNum, bDir\r
+ * @retval None\r
+ */\r
+#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \\r
+ if ((bDir) == 0U) \\r
+ { \\r
+ /* OUT double buffered endpoint */ \\r
+ PCD_TX_DTOG((USBx), (bEpNum)); \\r
+ } \\r
+ else if ((bDir) == 1U) \\r
+ { \\r
+ /* IN double buffered endpoint */ \\r
+ PCD_RX_DTOG((USBx), (bEpNum)); \\r
+ } \\r
+} while(0)\r
+\r
+/**\r
+ * @brief sets the status for tx transfer (bits STAT_TX[1:0]).\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param wState new state\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \\r
+ /* toggle first bit ? */ \\r
+ if ((USB_EPTX_DTOG1 & (wState))!= 0U) \\r
+ { \\r
+ _wRegVal ^= USB_EPTX_DTOG1; \\r
+ } \\r
+ /* toggle second bit ? */ \\r
+ if ((USB_EPTX_DTOG2 & (wState))!= 0U) \\r
+ { \\r
+ _wRegVal ^= USB_EPTX_DTOG2; \\r
+ } \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \\r
+ } while(0) /* PCD_SET_EP_TX_STATUS */\r
+\r
+/**\r
+ * @brief sets the status for rx transfer (bits STAT_TX[1:0])\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param wState new state\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \\r
+ /* toggle first bit ? */ \\r
+ if ((USB_EPRX_DTOG1 & (wState))!= 0U) \\r
+ { \\r
+ _wRegVal ^= USB_EPRX_DTOG1; \\r
+ } \\r
+ /* toggle second bit ? */ \\r
+ if ((USB_EPRX_DTOG2 & (wState))!= 0U) \\r
+ { \\r
+ _wRegVal ^= USB_EPRX_DTOG2; \\r
+ } \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \\r
+ } while(0) /* PCD_SET_EP_RX_STATUS */\r
+\r
+/**\r
+ * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param wStaterx new state.\r
+ * @param wStatetx new state.\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \\r
+ /* toggle first bit ? */ \\r
+ if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \\r
+ { \\r
+ _wRegVal ^= USB_EPRX_DTOG1; \\r
+ } \\r
+ /* toggle second bit ? */ \\r
+ if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \\r
+ { \\r
+ _wRegVal ^= USB_EPRX_DTOG2; \\r
+ } \\r
+ /* toggle first bit ? */ \\r
+ if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \\r
+ { \\r
+ _wRegVal ^= USB_EPTX_DTOG1; \\r
+ } \\r
+ /* toggle second bit ? */ \\r
+ if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \\r
+ { \\r
+ _wRegVal ^= USB_EPTX_DTOG2; \\r
+ } \\r
+ \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \\r
+ } while(0) /* PCD_SET_EP_TXRX_STATUS */\r
+\r
+/**\r
+ * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]\r
+ * /STAT_RX[1:0])\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval status\r
+ */\r
+#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)\r
+#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)\r
+\r
+/**\r
+ * @brief sets directly the VALID tx/rx-status into the endpoint register\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))\r
+#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))\r
+\r
+/**\r
+ * @brief checks stall condition in an endpoint.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval TRUE = endpoint in stall condition.\r
+ */\r
+#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \\r
+ == USB_EP_TX_STALL)\r
+#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \\r
+ == USB_EP_RX_STALL)\r
+\r
+/**\r
+ * @brief set & clear EP_KIND bit.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_KIND(USBx, bEpNum) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \\r
+ \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \\r
+ } while(0) /* PCD_SET_EP_KIND */\r
+\r
+#define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \\r
+ \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \\r
+ } while(0) /* PCD_CLEAR_EP_KIND */\r
+\r
+/**\r
+ * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))\r
+#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))\r
+\r
+/**\r
+ * @brief Sets/clears directly EP_KIND bit in the endpoint register.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))\r
+#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))\r
+\r
+/**\r
+ * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \\r
+ \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \\r
+ } while(0) /* PCD_CLEAR_RX_EP_CTR */\r
+\r
+#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \\r
+ \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \\r
+ } while(0) /* PCD_CLEAR_TX_EP_CTR */\r
+\r
+/**\r
+ * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_RX_DTOG(USBx, bEpNum) do { \\r
+ register uint16_t _wEPVal; \\r
+ \\r
+ _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \\r
+ \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \\r
+ } while(0) /* PCD_RX_DTOG */\r
+\r
+#define PCD_TX_DTOG(USBx, bEpNum) do { \\r
+ register uint16_t _wEPVal; \\r
+ \\r
+ _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \\r
+ \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \\r
+ } while(0) /* PCD_TX_DTOG */\r
+/**\r
+ * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \\r
+ \\r
+ if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\\r
+ { \\r
+ PCD_RX_DTOG((USBx), (bEpNum)); \\r
+ } \\r
+ } while(0) /* PCD_CLEAR_RX_DTOG */\r
+\r
+#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \\r
+ \\r
+ if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\\r
+ { \\r
+ PCD_TX_DTOG((USBx), (bEpNum)); \\r
+ } \\r
+ } while(0) /* PCD_CLEAR_TX_DTOG */\r
+\r
+/**\r
+ * @brief Sets address in an endpoint register.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param bAddr Address.\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \\r
+ register uint16_t _wRegVal; \\r
+ \\r
+ _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \\r
+ \\r
+ PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \\r
+ } while(0) /* PCD_SET_EP_ADDRESS */\r
+\r
+/**\r
+ * @brief Gets address in an endpoint register.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))\r
+\r
+#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))\r
+#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))\r
+\r
+/**\r
+ * @brief sets address of the tx/rx buffer.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param wAddr address to be set (must be word aligned).\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \\r
+ register uint16_t *_wRegVal; \\r
+ register uint32_t _wRegBase = (uint32_t)USBx; \\r
+ \\r
+ _wRegBase += (uint32_t)(USBx)->BTABLE; \\r
+ _wRegVal = (uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \\r
+ *_wRegVal = ((wAddr) >> 1) << 1; \\r
+} while(0) /* PCD_SET_EP_TX_ADDRESS */\r
+\r
+#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \\r
+ register uint16_t *_wRegVal; \\r
+ register uint32_t _wRegBase = (uint32_t)USBx; \\r
+ \\r
+ _wRegBase += (uint32_t)(USBx)->BTABLE; \\r
+ _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \\r
+ *_wRegVal = ((wAddr) >> 1) << 1; \\r
+} while(0) /* PCD_SET_EP_RX_ADDRESS */\r
+\r
+/**\r
+ * @brief Gets address of the tx/rx buffer.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval address of the buffer.\r
+ */\r
+#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))\r
+#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))\r
+\r
+/**\r
+ * @brief Sets counter of rx buffer with no. of blocks.\r
+ * @param pdwReg Register pointer\r
+ * @param wCount Counter.\r
+ * @param wNBlocks no. of Blocks.\r
+ * @retval None\r
+ */\r
+#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \\r
+ (wNBlocks) = (wCount) >> 5; \\r
+ *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \\r
+ } while(0) /* PCD_CALC_BLK32 */\r
+\r
+#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \\r
+ (wNBlocks) = (wCount) >> 1; \\r
+ if (((wCount) & 0x1U) != 0U) \\r
+ { \\r
+ (wNBlocks)++; \\r
+ } \\r
+ *(pdwReg) = (uint16_t)((wNBlocks) << 10); \\r
+ } while(0) /* PCD_CALC_BLK2 */\r
+\r
+#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \\r
+ uint32_t wNBlocks; \\r
+ if ((wCount) == 0U) \\r
+ { \\r
+ *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \\r
+ *(pdwReg) |= USB_CNTRX_BLSIZE; \\r
+ } \\r
+ else if((wCount) < 62U) \\r
+ { \\r
+ PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \\r
+ } \\r
+ else \\r
+ { \\r
+ PCD_CALC_BLK32((pdwReg),(wCount), wNBlocks); \\r
+ } \\r
+ } while(0) /* PCD_SET_EP_CNT_RX_REG */\r
+\r
+#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \\r
+ register uint32_t _wRegBase = (uint32_t)(USBx); \\r
+ uint16_t *pdwReg; \\r
+ \\r
+ _wRegBase += (uint32_t)(USBx)->BTABLE; \\r
+ pdwReg = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \\r
+ PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \\r
+ } while(0)\r
+\r
+/**\r
+ * @brief sets counter for the tx/rx buffer.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param wCount Counter value.\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \\r
+ register uint32_t _wRegBase = (uint32_t)(USBx); \\r
+ uint16_t *_wRegVal; \\r
+ \\r
+ _wRegBase += (uint32_t)(USBx)->BTABLE; \\r
+ _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \\r
+ *_wRegVal = (uint16_t)(wCount); \\r
+} while(0)\r
+\r
+#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \\r
+ register uint32_t _wRegBase = (uint32_t)(USBx); \\r
+ uint16_t *_wRegVal; \\r
+ \\r
+ _wRegBase += (uint32_t)(USBx)->BTABLE; \\r
+ _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \\r
+ PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \\r
+} while(0)\r
+\r
+/**\r
+ * @brief gets counter of the tx buffer.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval Counter value\r
+ */\r
+#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)\r
+#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)\r
+\r
+/**\r
+ * @brief Sets buffer 0/1 address in a double buffer endpoint.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param wBuf0Addr buffer 0 address.\r
+ * @retval Counter value\r
+ */\r
+#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \\r
+ PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \\r
+ } while(0) /* PCD_SET_EP_DBUF0_ADDR */\r
+#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \\r
+ PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \\r
+ } while(0) /* PCD_SET_EP_DBUF1_ADDR */\r
+\r
+/**\r
+ * @brief Sets addresses in a double buffer endpoint.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param wBuf0Addr: buffer 0 address.\r
+ * @param wBuf1Addr = buffer 1 address.\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \\r
+ PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \\r
+ PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \\r
+ } while(0) /* PCD_SET_EP_DBUF_ADDR */\r
+\r
+/**\r
+ * @brief Gets buffer 0/1 address of a double buffer endpoint.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))\r
+#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))\r
+\r
+/**\r
+ * @brief Gets buffer 0/1 address of a double buffer endpoint.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @param bDir endpoint dir EP_DBUF_OUT = OUT\r
+ * EP_DBUF_IN = IN\r
+ * @param wCount: Counter value\r
+ * @retval None\r
+ */\r
+#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \\r
+ if ((bDir) == 0U) \\r
+ /* OUT endpoint */ \\r
+ { \\r
+ PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \\r
+ } \\r
+ else \\r
+ { \\r
+ if ((bDir) == 1U) \\r
+ { \\r
+ /* IN endpoint */ \\r
+ PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \\r
+ } \\r
+ } \\r
+ } while(0) /* SetEPDblBuf0Count*/\r
+\r
+#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \\r
+ register uint32_t _wBase = (uint32_t)(USBx); \\r
+ uint16_t *_wEPRegVal; \\r
+ \\r
+ if ((bDir) == 0U) \\r
+ { \\r
+ /* OUT endpoint */ \\r
+ PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \\r
+ } \\r
+ else \\r
+ { \\r
+ if ((bDir) == 1U) \\r
+ { \\r
+ /* IN endpoint */ \\r
+ _wBase += (uint32_t)(USBx)->BTABLE; \\r
+ _wEPRegVal = (uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \\r
+ *_wEPRegVal = (uint16_t)(wCount); \\r
+ } \\r
+ } \\r
+ } while(0) /* SetEPDblBuf1Count */\r
+\r
+#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \\r
+ PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \\r
+ PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \\r
+ } while(0) /* PCD_SET_EP_DBUF_CNT */\r
+\r
+/**\r
+ * @brief Gets buffer 0/1 rx/tx counter for double buffering.\r
+ * @param USBx USB peripheral instance register address.\r
+ * @param bEpNum Endpoint Number.\r
+ * @retval None\r
+ */\r
+#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))\r
+#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))\r
+\r
+#endif /* defined (USB) */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+#endif /* defined (USB) || defined (USB_OTG_FS) */\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* STM32L4xx_HAL_PCD_H */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
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