--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32l4xx_hal_gpio_ex.h\r
+ * @author MCD Application Team\r
+ * @brief Header file of GPIO HAL Extended module.\r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * <h2><center>© Copyright (c) 2017 STMicroelectronics.\r
+ * All rights reserved.</center></h2>\r
+ *\r
+ * This software component is licensed by ST under BSD 3-Clause license,\r
+ * the "License"; You may not use this file except in compliance with the\r
+ * License. You may obtain a copy of the License at:\r
+ * opensource.org/licenses/BSD-3-Clause\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef __STM32L4xx_HAL_GPIO_EX_H\r
+#define __STM32L4xx_HAL_GPIO_EX_H\r
+\r
+#ifdef __cplusplus\r
+ extern "C" {\r
+#endif\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32l4xx_hal_def.h"\r
+\r
+/** @addtogroup STM32L4xx_HAL_Driver\r
+ * @{\r
+ */\r
+\r
+/** @defgroup GPIOEx GPIOEx\r
+ * @brief GPIO Extended HAL module driver\r
+ * @{\r
+ */\r
+\r
+/* Exported types ------------------------------------------------------------*/\r
+/* Exported constants --------------------------------------------------------*/\r
+/** @defgroup GPIOEx_Exported_Constants GPIOEx Exported Constants\r
+ * @{\r
+ */\r
+\r
+/** @defgroup GPIOEx_Alternate_function_selection GPIOEx Alternate function selection\r
+ * @{\r
+ */\r
+\r
+#if defined(STM32L412xx) || defined(STM32L422xx)\r
+/*--------------STM32L412xx/STM32L422xx---*/\r
+/**\r
+ * @brief AF 0 selection\r
+ */\r
+#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */\r
+#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */\r
+#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */\r
+#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 1 selection\r
+ */\r
+#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */\r
+#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 2 selection\r
+ */\r
+#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 3 selection\r
+ */\r
+#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART1 Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 4 selection\r
+ */\r
+#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */\r
+#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */\r
+#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 5 selection\r
+ */\r
+#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */\r
+#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 6 selection\r
+ */\r
+#define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 7 selection\r
+ */\r
+#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */\r
+#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */\r
+#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 8 selection\r
+ */\r
+#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 9 selection\r
+ */\r
+#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 10 selection\r
+ */\r
+#define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */\r
+#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 12 selection\r
+ */\r
+#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */\r
+\r
+\r
+/**\r
+ * @brief AF 14 selection\r
+ */\r
+#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */\r
+#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */\r
+#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 15 selection\r
+ */\r
+#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */\r
+\r
+#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)\r
+\r
+#endif /* STM32L412xx || STM32L422xx */\r
+\r
+#if defined(STM32L431xx) || defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx)\r
+/*--------------STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/STM32L443xx---*/\r
+/**\r
+ * @brief AF 0 selection\r
+ */\r
+#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */\r
+#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */\r
+#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */\r
+#if defined(STM32L433xx) || defined(STM32L443xx)\r
+#define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */\r
+#endif /* STM32L433xx || STM32L443xx */\r
+#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 1 selection\r
+ */\r
+#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */\r
+#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 2 selection\r
+ */\r
+#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 3 selection\r
+ */\r
+#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART1 Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 4 selection\r
+ */\r
+#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */\r
+#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */\r
+#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 5 selection\r
+ */\r
+#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */\r
+#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 6 selection\r
+ */\r
+#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */\r
+#define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 7 selection\r
+ */\r
+#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */\r
+#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */\r
+#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 8 selection\r
+ */\r
+#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 9 selection\r
+ */\r
+#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */\r
+#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 10 selection\r
+ */\r
+#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx)\r
+#define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */\r
+#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */\r
+#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */\r
+\r
+#if defined(STM32L433xx) || defined(STM32L443xx)\r
+/**\r
+ * @brief AF 11 selection\r
+ */\r
+#define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */\r
+#endif /* STM32L433xx || STM32L443xx */\r
+\r
+/**\r
+ * @brief AF 12 selection\r
+ */\r
+#define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */\r
+#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */\r
+#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */\r
+#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 13 selection\r
+ */\r
+#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 14 selection\r
+ */\r
+#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */\r
+#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */\r
+#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 15 selection\r
+ */\r
+#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */\r
+\r
+#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)\r
+\r
+#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */\r
+\r
+#if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)\r
+/*--------------STM32L451xx/STM32L452xx/STM32L462xx---------------------------*/\r
+/**\r
+ * @brief AF 0 selection\r
+ */\r
+#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */\r
+#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */\r
+#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */\r
+#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 1 selection\r
+ */\r
+#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */\r
+#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 2 selection\r
+ */\r
+#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */\r
+#define GPIO_AF2_I2C4 ((uint8_t)0x02) /* I2C4 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 3 selection\r
+ */\r
+#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */\r
+#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */\r
+#define GPIO_AF3_CAN1 ((uint8_t)0x03) /* CAN1 Alternate Function mapping */\r
+#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 4 selection\r
+ */\r
+#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */\r
+#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */\r
+#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */\r
+#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 5 selection\r
+ */\r
+#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */\r
+#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */\r
+#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 6 selection\r
+ */\r
+#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */\r
+#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */\r
+#define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 7 selection\r
+ */\r
+#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */\r
+#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */\r
+#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 8 selection\r
+ */\r
+#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */\r
+#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */\r
+#define GPIO_AF8_CAN1 ((uint8_t)0x08) /* CAN1 Alternate Function mapping */\r
+\r
+\r
+/**\r
+ * @brief AF 9 selection\r
+ */\r
+#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */\r
+#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 10 selection\r
+ */\r
+#if defined(STM32L452xx) || defined(STM32L462xx)\r
+#define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */\r
+#endif /* STM32L452xx || STM32L462xx */\r
+#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */\r
+#define GPIO_AF10_CAN1 ((uint8_t)0x0A) /* CAN1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 11 selection\r
+ */\r
+\r
+/**\r
+ * @brief AF 12 selection\r
+ */\r
+#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */\r
+#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */\r
+#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 13 selection\r
+ */\r
+#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 14 selection\r
+ */\r
+#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */\r
+#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */\r
+#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */\r
+#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 15 selection\r
+ */\r
+#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */\r
+\r
+#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)\r
+\r
+#endif /* STM32L451xx || STM32L452xx || STM32L462xx */\r
+\r
+#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)\r
+/*--------------STM32L471xx/STM32L475xx/STM32L476xx/STM32L485xx/STM32L486xx---*/\r
+/**\r
+ * @brief AF 0 selection\r
+ */\r
+#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */\r
+#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */\r
+#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */\r
+#if defined(STM32L476xx) || defined(STM32L486xx)\r
+#define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */\r
+#endif /* STM32L476xx || STM32L486xx */\r
+#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 1 selection\r
+ */\r
+#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */\r
+#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */\r
+#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */\r
+#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 2 selection\r
+ */\r
+#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */\r
+#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */\r
+#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 3 selection\r
+ */\r
+#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 4 selection\r
+ */\r
+#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */\r
+#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */\r
+#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 5 selection\r
+ */\r
+#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */\r
+#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 6 selection\r
+ */\r
+#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */\r
+#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 7 selection\r
+ */\r
+#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */\r
+#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */\r
+#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 8 selection\r
+ */\r
+#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */\r
+#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */\r
+#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */\r
+\r
+\r
+/**\r
+ * @brief AF 9 selection\r
+ */\r
+#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */\r
+#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 10 selection\r
+ */\r
+#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)\r
+#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */\r
+#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */\r
+#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */\r
+\r
+#if defined(STM32L476xx) || defined(STM32L486xx)\r
+/**\r
+ * @brief AF 11 selection\r
+ */\r
+#define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */\r
+#endif /* STM32L476xx || STM32L486xx */\r
+\r
+/**\r
+ * @brief AF 12 selection\r
+ */\r
+#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */\r
+#define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */\r
+#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */\r
+#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */\r
+#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 13 selection\r
+ */\r
+#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */\r
+#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */\r
+#define GPIO_AF13_TIM8_COMP2 ((uint8_t)0x0D) /* TIM8/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 14 selection\r
+ */\r
+#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */\r
+#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */\r
+#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */\r
+#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */\r
+#define GPIO_AF14_TIM8_COMP1 ((uint8_t)0x0E) /* TIM8/COMP1 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 15 selection\r
+ */\r
+#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */\r
+\r
+#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)\r
+\r
+#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */\r
+\r
+#if defined(STM32L496xx) || defined(STM32L4A6xx)\r
+/*--------------------------------STM32L496xx/STM32L4A6xx---------------------*/\r
+/**\r
+ * @brief AF 0 selection\r
+ */\r
+#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */\r
+#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */\r
+#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */\r
+#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 1 selection\r
+ */\r
+#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */\r
+#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */\r
+#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */\r
+#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 2 selection\r
+ */\r
+#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */\r
+#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */\r
+#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */\r
+#define GPIO_AF2_I2C4 ((uint8_t)0x02) /* I2C4 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 3 selection\r
+ */\r
+#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */\r
+#define GPIO_AF3_CAN2 ((uint8_t)0x03) /* CAN2 Alternate Function mapping */\r
+#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */\r
+#define GPIO_AF3_QUADSPI ((uint8_t)0x03) /* QUADSPI Alternate Function mapping */\r
+#define GPIO_AF3_SPI2 ((uint8_t)0x03) /* SPI2 Alternate Function mapping */\r
+#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 4 selection\r
+ */\r
+#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */\r
+#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */\r
+#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */\r
+#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */\r
+#define GPIO_AF4_DCMI ((uint8_t)0x04) /* DCMI Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 5 selection\r
+ */\r
+#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */\r
+#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */\r
+#define GPIO_AF5_DCMI ((uint8_t)0x05) /* DCMI Alternate Function mapping */\r
+#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */\r
+#define GPIO_AF5_QUADSPI ((uint8_t)0x05) /* QUADSPI Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 6 selection\r
+ */\r
+#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */\r
+#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */\r
+#define GPIO_AF6_I2C3 ((uint8_t)0x06) /* I2C3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 7 selection\r
+ */\r
+#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */\r
+#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */\r
+#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 8 selection\r
+ */\r
+#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */\r
+#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */\r
+#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */\r
+#define GPIO_AF8_CAN2 ((uint8_t)0x08) /* CAN2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 9 selection\r
+ */\r
+#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */\r
+#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 10 selection\r
+ */\r
+#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */\r
+#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */\r
+#define GPIO_AF10_CAN2 ((uint8_t)0x0A) /* CAN2 Alternate Function mapping */\r
+#define GPIO_AF10_DCMI ((uint8_t)0x0A) /* DCMI Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 11 selection\r
+ */\r
+#define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 12 selection\r
+ */\r
+#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */\r
+#define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */\r
+#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */\r
+#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */\r
+#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */\r
+#define GPIO_AF12_TIM1_COMP2 ((uint8_t)0x0C) /* TIM1/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF12_TIM1_COMP1 ((uint8_t)0x0C) /* TIM1/COMP1 Break in Alternate Function mapping */\r
+#define GPIO_AF12_TIM8_COMP2 ((uint8_t)0x0C) /* TIM8/COMP2 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 13 selection\r
+ */\r
+#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */\r
+#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */\r
+#define GPIO_AF13_TIM8_COMP2 ((uint8_t)0x0D) /* TIM8/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 14 selection\r
+ */\r
+#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */\r
+#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */\r
+#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */\r
+#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */\r
+#define GPIO_AF14_TIM8_COMP1 ((uint8_t)0x0E) /* TIM8/COMP1 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 15 selection\r
+ */\r
+#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */\r
+\r
+#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)\r
+\r
+#endif /* STM32L496xx || STM32L4A6xx */\r
+\r
+#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)\r
+/*---STM32L4R5xx/STM32L4R7xx/STM32L4R9xx/STM32L4S5xx/STM32L4S7xx/STM32L4S9xx--*/\r
+/**\r
+ * @brief AF 0 selection\r
+ */\r
+#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */\r
+#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */\r
+#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */\r
+#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 1 selection\r
+ */\r
+#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */\r
+#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */\r
+#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */\r
+#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 2 selection\r
+ */\r
+#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */\r
+#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */\r
+#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */\r
+#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */\r
+#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 3 selection\r
+ */\r
+#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */\r
+#define GPIO_AF3_OCTOSPIM_P1 ((uint8_t)0x03) /* OctoSPI Manager Port 1 Alternate Function mapping */\r
+#define GPIO_AF3_SAI1 ((uint8_t)0x03) /* SAI1 Alternate Function mapping */\r
+#define GPIO_AF3_SPI2 ((uint8_t)0x03) /* SPI2 Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */\r
+#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */\r
+#define GPIO_AF3_TIM8_COMP1 ((uint8_t)0x03) /* TIM8/COMP1 Break in Alternate Function mapping */\r
+#define GPIO_AF3_TIM8_COMP2 ((uint8_t)0x03) /* TIM8/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 4 selection\r
+ */\r
+#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */\r
+#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */\r
+#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */\r
+#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */\r
+#define GPIO_AF4_DCMI ((uint8_t)0x04) /* DCMI Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 5 selection\r
+ */\r
+#define GPIO_AF5_DCMI ((uint8_t)0x05) /* DCMI Alternate Function mapping */\r
+#define GPIO_AF5_DFSDM1 ((uint8_t)0x05) /* DFSDM1 Alternate Function mapping */\r
+#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */\r
+#define GPIO_AF5_OCTOSPIM_P1 ((uint8_t)0x05) /* OctoSPI Manager Port 1 Alternate Function mapping */\r
+#define GPIO_AF5_OCTOSPIM_P2 ((uint8_t)0x05) /* OctoSPI Manager Port 2 Alternate Function mapping */\r
+#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */\r
+#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */\r
+#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 6 selection\r
+ */\r
+#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */\r
+#define GPIO_AF6_I2C3 ((uint8_t)0x06) /* I2C3 Alternate Function mapping */\r
+#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 7 selection\r
+ */\r
+#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */\r
+#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */\r
+#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 8 selection\r
+ */\r
+#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */\r
+#define GPIO_AF8_SDMMC1 ((uint8_t)0x08) /* SDMMC1 Alternate Function mapping */\r
+#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */\r
+#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 9 selection\r
+ */\r
+#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */\r
+#define GPIO_AF9_LTDC ((uint8_t)0x09) /* LTDC Alternate Function mapping */\r
+#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 10 selection\r
+ */\r
+#define GPIO_AF10_DCMI ((uint8_t)0x0A) /* DCMI Alternate Function mapping */\r
+#define GPIO_AF10_OCTOSPIM_P1 ((uint8_t)0x0A) /* OctoSPI Manager Port 1 Alternate Function mapping */\r
+#define GPIO_AF10_OCTOSPIM_P2 ((uint8_t)0x0A) /* OctoSPI Manager Port 2 Alternate Function mapping */\r
+#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 11 selection\r
+ */\r
+#define GPIO_AF11_DSI ((uint8_t)0x0B) /* DSI Alternate Function mapping */\r
+#define GPIO_AF11_LTDC ((uint8_t)0x0B) /* LTDC Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 12 selection\r
+ */\r
+#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */\r
+#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */\r
+#define GPIO_AF12_DSI ((uint8_t)0x0C) /* DSI Alternate Function mapping */\r
+#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */\r
+#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */\r
+#define GPIO_AF12_TIM1_COMP1 ((uint8_t)0x0C) /* TIM1/COMP1 Break in Alternate Function mapping */\r
+#define GPIO_AF12_TIM1_COMP2 ((uint8_t)0x0C) /* TIM1/COMP2 Break in Alternate Function mapping */\r
+#define GPIO_AF12_TIM8_COMP2 ((uint8_t)0x0C) /* TIM8/COMP2 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 13 selection\r
+ */\r
+#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */\r
+#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */\r
+#define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 14 selection\r
+ */\r
+#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */\r
+#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */\r
+#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */\r
+#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */\r
+#define GPIO_AF14_TIM8_COMP2 ((uint8_t)0x0E) /* TIM8/COMP2 Break in Alternate Function mapping */\r
+\r
+/**\r
+ * @brief AF 15 selection\r
+ */\r
+#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */\r
+\r
+#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)\r
+\r
+#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported macro ------------------------------------------------------------*/\r
+/** @defgroup GPIOEx_Exported_Macros GPIOEx Exported Macros\r
+ * @{\r
+ */\r
+\r
+/** @defgroup GPIOEx_Get_Port_Index GPIOEx_Get Port Index\r
+* @{\r
+ */\r
+#if defined(STM32L412xx) || defined(STM32L422xx)\r
+\r
+#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\\r
+ ((__GPIOx__) == (GPIOB))? 1uL :\\r
+ ((__GPIOx__) == (GPIOC))? 2uL :\\r
+ ((__GPIOx__) == (GPIOD))? 3uL : 7uL)\r
+\r
+#endif /* STM32L412xx || STM32L422xx */\r
+\r
+#if defined(STM32L431xx) || defined(STM32L433xx) || defined(STM32L443xx)\r
+\r
+#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\\r
+ ((__GPIOx__) == (GPIOB))? 1uL :\\r
+ ((__GPIOx__) == (GPIOC))? 2uL :\\r
+ ((__GPIOx__) == (GPIOD))? 3uL :\\r
+ ((__GPIOx__) == (GPIOE))? 4uL : 7uL)\r
+\r
+#endif /* STM32L431xx || STM32L433xx || STM32L443xx */\r
+\r
+#if defined(STM32L432xx) || defined(STM32L442xx)\r
+\r
+#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\\r
+ ((__GPIOx__) == (GPIOB))? 1uL :\\r
+ ((__GPIOx__) == (GPIOC))? 2uL : 7uL)\r
+\r
+#endif /* STM32L432xx || STM32L442xx */\r
+\r
+#if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)\r
+\r
+#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\\r
+ ((__GPIOx__) == (GPIOB))? 1uL :\\r
+ ((__GPIOx__) == (GPIOC))? 2uL :\\r
+ ((__GPIOx__) == (GPIOD))? 3uL :\\r
+ ((__GPIOx__) == (GPIOE))? 4uL : 7uL)\r
+\r
+#endif /* STM32L451xx || STM32L452xx || STM32L462xx */\r
+\r
+#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)\r
+\r
+#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\\r
+ ((__GPIOx__) == (GPIOB))? 1uL :\\r
+ ((__GPIOx__) == (GPIOC))? 2uL :\\r
+ ((__GPIOx__) == (GPIOD))? 3uL :\\r
+ ((__GPIOx__) == (GPIOE))? 4uL :\\r
+ ((__GPIOx__) == (GPIOF))? 5uL :\\r
+ ((__GPIOx__) == (GPIOG))? 6uL : 7uL)\r
+\r
+#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */\r
+\r
+#if defined(STM32L496xx) || defined(STM32L4A6xx)\r
+\r
+#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\\r
+ ((__GPIOx__) == (GPIOB))? 1uL :\\r
+ ((__GPIOx__) == (GPIOC))? 2uL :\\r
+ ((__GPIOx__) == (GPIOD))? 3uL :\\r
+ ((__GPIOx__) == (GPIOE))? 4uL :\\r
+ ((__GPIOx__) == (GPIOF))? 5uL :\\r
+ ((__GPIOx__) == (GPIOG))? 6uL :\\r
+ ((__GPIOx__) == (GPIOH))? 7uL : 8uL)\r
+\r
+#endif /* STM32L496xx || STM32L4A6xx */\r
+\r
+#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)\r
+\r
+#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\\r
+ ((__GPIOx__) == (GPIOB))? 1uL :\\r
+ ((__GPIOx__) == (GPIOC))? 2uL :\\r
+ ((__GPIOx__) == (GPIOD))? 3uL :\\r
+ ((__GPIOx__) == (GPIOE))? 4uL :\\r
+ ((__GPIOx__) == (GPIOF))? 5uL :\\r
+ ((__GPIOx__) == (GPIOG))? 6uL :\\r
+ ((__GPIOx__) == (GPIOH))? 7uL : 8uL)\r
+\r
+#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported functions --------------------------------------------------------*/\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* __STM32L4xx_HAL_GPIO_EX_H */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r