+++ /dev/null
-/**\r
- ******************************************************************************\r
- * @file stm32l4xx_hal_pwr_ex.h\r
- * @author MCD Application Team\r
- * @brief Header file of PWR HAL Extended module.\r
- ******************************************************************************\r
- * @attention\r
- *\r
- * <h2><center>© Copyright (c) 2017 STMicroelectronics.\r
- * All rights reserved.</center></h2>\r
- *\r
- * This software component is licensed by ST under BSD 3-Clause license,\r
- * the "License"; You may not use this file except in compliance with the\r
- * License. You may obtain a copy of the License at:\r
- * opensource.org/licenses/BSD-3-Clause\r
- *\r
- ******************************************************************************\r
- */\r
-\r
-/* Define to prevent recursive inclusion -------------------------------------*/\r
-#ifndef __STM32L4xx_HAL_PWR_EX_H\r
-#define __STM32L4xx_HAL_PWR_EX_H\r
-\r
-#ifdef __cplusplus\r
- extern "C" {\r
-#endif\r
-\r
-/* Includes ------------------------------------------------------------------*/\r
-#include "stm32l4xx_hal_def.h"\r
-\r
-/** @addtogroup STM32L4xx_HAL_Driver\r
- * @{\r
- */\r
-\r
-/** @addtogroup PWREx\r
- * @{\r
- */\r
-\r
-\r
-/* Exported types ------------------------------------------------------------*/\r
-\r
-/** @defgroup PWREx_Exported_Types PWR Extended Exported Types\r
- * @{\r
- */\r
-\r
-\r
-/**\r
- * @brief PWR PVM configuration structure definition\r
- */\r
-typedef struct\r
-{\r
- uint32_t PVMType; /*!< PVMType: Specifies which voltage is monitored and against which threshold.\r
- This parameter can be a value of @ref PWREx_PVM_Type.\r
- @arg @ref PWR_PVM_1 Peripheral Voltage Monitoring 1 enable: VDDUSB versus 1.2 V (applicable when USB feature is supported).\r
-@if STM32L486xx\r
- @arg @ref PWR_PVM_2 Peripheral Voltage Monitoring 2 enable: VDDIO2 versus 0.9 V (applicable when VDDIO2 is present on device).\r
-@endif\r
- @arg @ref PWR_PVM_3 Peripheral Voltage Monitoring 3 enable: VDDA versus 1.62 V.\r
- @arg @ref PWR_PVM_4 Peripheral Voltage Monitoring 4 enable: VDDA versus 2.2 V. */\r
-\r
- uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.\r
- This parameter can be a value of @ref PWREx_PVM_Mode. */\r
-}PWR_PVMTypeDef;\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/* Exported constants --------------------------------------------------------*/\r
-\r
-/** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants\r
- * @{\r
- */\r
-\r
-/** @defgroup PWREx_WUP_Polarity Shift to apply to retrieve polarity information from PWR_WAKEUP_PINy_xxx constants\r
- * @{\r
- */\r
-#define PWR_WUP_POLARITY_SHIFT 0x05 /*!< Internal constant used to retrieve wakeup pin polariry */\r
-/**\r
- * @}\r
- */\r
-\r
-\r
-/** @defgroup PWREx_WakeUp_Pins PWR wake-up pins\r
- * @{\r
- */\r
-#define PWR_WAKEUP_PIN1 PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN2 PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN3 PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN4 PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN5 PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN1_HIGH PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN2_HIGH PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN3_HIGH PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN4_HIGH PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN5_HIGH PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */\r
-#define PWR_WAKEUP_PIN1_LOW (uint32_t)((PWR_CR4_WP1<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP1) /*!< Wakeup pin 1 (with low level polarity) */\r
-#define PWR_WAKEUP_PIN2_LOW (uint32_t)((PWR_CR4_WP2<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP2) /*!< Wakeup pin 2 (with low level polarity) */\r
-#define PWR_WAKEUP_PIN3_LOW (uint32_t)((PWR_CR4_WP3<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP3) /*!< Wakeup pin 3 (with low level polarity) */\r
-#define PWR_WAKEUP_PIN4_LOW (uint32_t)((PWR_CR4_WP4<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP4) /*!< Wakeup pin 4 (with low level polarity) */\r
-#define PWR_WAKEUP_PIN5_LOW (uint32_t)((PWR_CR4_WP5<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP5) /*!< Wakeup pin 5 (with low level polarity) */\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup PWREx_PVM_Type Peripheral Voltage Monitoring type\r
- * @{\r
- */\r
-#if defined(PWR_CR2_PVME1)\r
-#define PWR_PVM_1 PWR_CR2_PVME1 /*!< Peripheral Voltage Monitoring 1 enable: VDDUSB versus 1.2 V (applicable when USB feature is supported) */\r
-#endif /* PWR_CR2_PVME1 */\r
-#if defined(PWR_CR2_PVME2)\r
-#define PWR_PVM_2 PWR_CR2_PVME2 /*!< Peripheral Voltage Monitoring 2 enable: VDDIO2 versus 0.9 V (applicable when VDDIO2 is present on device) */\r
-#endif /* PWR_CR2_PVME2 */\r
-#define PWR_PVM_3 PWR_CR2_PVME3 /*!< Peripheral Voltage Monitoring 3 enable: VDDA versus 1.62 V */\r
-#define PWR_PVM_4 PWR_CR2_PVME4 /*!< Peripheral Voltage Monitoring 4 enable: VDDA versus 2.2 V */\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup PWREx_PVM_Mode PWR PVM interrupt and event mode\r
- * @{\r
- */\r
-#define PWR_PVM_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */\r
-#define PWR_PVM_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */\r
-#define PWR_PVM_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */\r
-#define PWR_PVM_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */\r
-#define PWR_PVM_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */\r
-#define PWR_PVM_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */\r
-#define PWR_PVM_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */\r
-/**\r
- * @}\r
- */\r
-\r
-\r
-\r
-/** @defgroup PWREx_Regulator_Voltage_Scale PWR Regulator voltage scale\r
- * @{\r
- */\r
-#if defined(PWR_CR5_R1MODE)\r
-#define PWR_REGULATOR_VOLTAGE_SCALE1_BOOST ((uint32_t)0x00000000) /*!< Voltage scaling range 1 boost mode */\r
-#endif\r
-#define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS_0 /*!< Voltage scaling range 1 normal mode */\r
-#define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 /*!< Voltage scaling range 2 */\r
-/**\r
- * @}\r
- */\r
-\r
-\r
-/** @defgroup PWREx_VBAT_Battery_Charging_Selection PWR battery charging resistor selection\r
- * @{\r
- */\r
-#define PWR_BATTERY_CHARGING_RESISTOR_5 ((uint32_t)0x00000000) /*!< VBAT charging through a 5 kOhms resistor */\r
-#define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_CR4_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup PWREx_VBAT_Battery_Charging PWR battery charging\r
- * @{\r
- */\r
-#define PWR_BATTERY_CHARGING_DISABLE ((uint32_t)0x00000000)\r
-#define PWR_BATTERY_CHARGING_ENABLE PWR_CR4_VBE\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup PWREx_GPIO_Bit_Number GPIO bit number for I/O setting in standby/shutdown mode\r
- * @{\r
- */\r
-#define PWR_GPIO_BIT_0 PWR_PUCRA_PA0 /*!< GPIO port I/O pin 0 */\r
-#define PWR_GPIO_BIT_1 PWR_PUCRA_PA1 /*!< GPIO port I/O pin 1 */\r
-#define PWR_GPIO_BIT_2 PWR_PUCRA_PA2 /*!< GPIO port I/O pin 2 */\r
-#define PWR_GPIO_BIT_3 PWR_PUCRA_PA3 /*!< GPIO port I/O pin 3 */\r
-#define PWR_GPIO_BIT_4 PWR_PUCRA_PA4 /*!< GPIO port I/O pin 4 */\r
-#define PWR_GPIO_BIT_5 PWR_PUCRA_PA5 /*!< GPIO port I/O pin 5 */\r
-#define PWR_GPIO_BIT_6 PWR_PUCRA_PA6 /*!< GPIO port I/O pin 6 */\r
-#define PWR_GPIO_BIT_7 PWR_PUCRA_PA7 /*!< GPIO port I/O pin 7 */\r
-#define PWR_GPIO_BIT_8 PWR_PUCRA_PA8 /*!< GPIO port I/O pin 8 */\r
-#define PWR_GPIO_BIT_9 PWR_PUCRA_PA9 /*!< GPIO port I/O pin 9 */\r
-#define PWR_GPIO_BIT_10 PWR_PUCRA_PA10 /*!< GPIO port I/O pin 10 */\r
-#define PWR_GPIO_BIT_11 PWR_PUCRA_PA11 /*!< GPIO port I/O pin 11 */\r
-#define PWR_GPIO_BIT_12 PWR_PUCRA_PA12 /*!< GPIO port I/O pin 12 */\r
-#define PWR_GPIO_BIT_13 PWR_PUCRA_PA13 /*!< GPIO port I/O pin 13 */\r
-#define PWR_GPIO_BIT_14 PWR_PDCRA_PA14 /*!< GPIO port I/O pin 14 */\r
-#define PWR_GPIO_BIT_15 PWR_PUCRA_PA15 /*!< GPIO port I/O pin 15 */\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup PWREx_GPIO GPIO port\r
- * @{\r
- */\r
-#define PWR_GPIO_A 0x00000000U /*!< GPIO port A */\r
-#define PWR_GPIO_B 0x00000001U /*!< GPIO port B */\r
-#define PWR_GPIO_C 0x00000002U /*!< GPIO port C */\r
-#if defined(GPIOD_BASE)\r
-#define PWR_GPIO_D 0x00000003U /*!< GPIO port D */\r
-#endif\r
-#if defined(GPIOE_BASE)\r
-#define PWR_GPIO_E 0x00000004U /*!< GPIO port E */\r
-#endif\r
-#if defined(GPIOF_BASE)\r
-#define PWR_GPIO_F 0x00000005U /*!< GPIO port F */\r
-#endif\r
-#if defined(GPIOG_BASE)\r
-#define PWR_GPIO_G 0x00000006U /*!< GPIO port G */\r
-#endif\r
-#define PWR_GPIO_H 0x00000007U /*!< GPIO port H */\r
-#if defined(GPIOI_BASE)\r
-#define PWR_GPIO_I 0x00000008U /*!< GPIO port I */\r
-#endif\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup PWREx_PVM_EXTI_LINE PWR PVM external interrupts lines\r
- * @{\r
- */\r
-#if defined(PWR_CR2_PVME1)\r
-#define PWR_EXTI_LINE_PVM1 ((uint32_t)0x00000008) /*!< External interrupt line 35 Connected to the PVM1 EXTI Line */\r
-#endif /* PWR_CR2_PVME1 */\r
-#if defined(PWR_CR2_PVME2)\r
-#define PWR_EXTI_LINE_PVM2 ((uint32_t)0x00000010) /*!< External interrupt line 36 Connected to the PVM2 EXTI Line */\r
-#endif /* PWR_CR2_PVME2 */\r
-#define PWR_EXTI_LINE_PVM3 ((uint32_t)0x00000020) /*!< External interrupt line 37 Connected to the PVM3 EXTI Line */\r
-#define PWR_EXTI_LINE_PVM4 ((uint32_t)0x00000040) /*!< External interrupt line 38 Connected to the PVM4 EXTI Line */\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup PWREx_PVM_EVENT_LINE PWR PVM event lines\r
- * @{\r
- */\r
-#if defined(PWR_CR2_PVME1)\r
-#define PWR_EVENT_LINE_PVM1 ((uint32_t)0x00000008) /*!< Event line 35 Connected to the PVM1 EXTI Line */\r
-#endif /* PWR_CR2_PVME1 */\r
-#if defined(PWR_CR2_PVME2)\r
-#define PWR_EVENT_LINE_PVM2 ((uint32_t)0x00000010) /*!< Event line 36 Connected to the PVM2 EXTI Line */\r
-#endif /* PWR_CR2_PVME2 */\r
-#define PWR_EVENT_LINE_PVM3 ((uint32_t)0x00000020) /*!< Event line 37 Connected to the PVM3 EXTI Line */\r
-#define PWR_EVENT_LINE_PVM4 ((uint32_t)0x00000040) /*!< Event line 38 Connected to the PVM4 EXTI Line */\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup PWREx_Flag PWR Status Flags\r
- * Elements values convention: 0000 0000 0XXY YYYYb\r
- * - Y YYYY : Flag position in the XX register (5 bits)\r
- * - XX : Status register (2 bits)\r
- * - 01: SR1 register\r
- * - 10: SR2 register\r
- * The only exception is PWR_FLAG_WU, encompassing all\r
- * wake-up flags and set to PWR_SR1_WUF.\r
- * @{\r
- */\r
-#define PWR_FLAG_WUF1 ((uint32_t)0x0020) /*!< Wakeup event on wakeup pin 1 */\r
-#define PWR_FLAG_WUF2 ((uint32_t)0x0021) /*!< Wakeup event on wakeup pin 2 */\r
-#define PWR_FLAG_WUF3 ((uint32_t)0x0022) /*!< Wakeup event on wakeup pin 3 */\r
-#define PWR_FLAG_WUF4 ((uint32_t)0x0023) /*!< Wakeup event on wakeup pin 4 */\r
-#define PWR_FLAG_WUF5 ((uint32_t)0x0024) /*!< Wakeup event on wakeup pin 5 */\r
-#define PWR_FLAG_WU PWR_SR1_WUF /*!< Encompass wakeup event on all wakeup pins */\r
-#define PWR_FLAG_SB ((uint32_t)0x0028) /*!< Standby flag */\r
-#if defined(PWR_SR1_EXT_SMPS_RDY)\r
-#define PWR_FLAG_EXT_SMPS ((uint32_t)0x002D) /*!< Switching to external SMPS ready flag */\r
-#endif /* PWR_SR1_EXT_SMPS_RDY */\r
-#define PWR_FLAG_WUFI ((uint32_t)0x002F) /*!< Wakeup on internal wakeup line */\r
-\r
-#define PWR_FLAG_REGLPS ((uint32_t)0x0048) /*!< Low-power regulator start flag */\r
-#define PWR_FLAG_REGLPF ((uint32_t)0x0049) /*!< Low-power regulator flag */\r
-#define PWR_FLAG_VOSF ((uint32_t)0x004A) /*!< Voltage scaling flag */\r
-#define PWR_FLAG_PVDO ((uint32_t)0x004B) /*!< Power Voltage Detector output flag */\r
-#if defined(PWR_CR2_PVME1)\r
-#define PWR_FLAG_PVMO1 ((uint32_t)0x004C) /*!< Power Voltage Monitoring 1 output flag */\r
-#endif /* PWR_CR2_PVME1 */\r
-#if defined(PWR_CR2_PVME2)\r
-#define PWR_FLAG_PVMO2 ((uint32_t)0x004D) /*!< Power Voltage Monitoring 2 output flag */\r
-#endif /* PWR_CR2_PVME2 */\r
-#define PWR_FLAG_PVMO3 ((uint32_t)0x004E) /*!< Power Voltage Monitoring 3 output flag */\r
-#define PWR_FLAG_PVMO4 ((uint32_t)0x004F) /*!< Power Voltage Monitoring 4 output flag */\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/* Exported macros -----------------------------------------------------------*/\r
-/** @defgroup PWREx_Exported_Macros PWR Extended Exported Macros\r
- * @{\r
- */\r
-\r
-#if defined(PWR_CR2_PVME1)\r
-/**\r
- * @brief Enable the PVM1 Extended Interrupt Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1)\r
-\r
-/**\r
- * @brief Disable the PVM1 Extended Interrupt Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1)\r
-\r
-/**\r
- * @brief Enable the PVM1 Event Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1)\r
-\r
-/**\r
- * @brief Disable the PVM1 Event Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1)\r
-\r
-/**\r
- * @brief Enable the PVM1 Extended Interrupt Rising Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1)\r
-\r
-/**\r
- * @brief Disable the PVM1 Extended Interrupt Rising Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1)\r
-\r
-/**\r
- * @brief Enable the PVM1 Extended Interrupt Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1)\r
-\r
-\r
-/**\r
- * @brief Disable the PVM1 Extended Interrupt Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1)\r
-\r
-\r
-/**\r
- * @brief PVM1 EXTI line configuration: set rising & falling edge trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_FALLING_EDGE() \\r
- do { \\r
- __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE(); \\r
- __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE(); \\r
- } while(0)\r
-\r
-/**\r
- * @brief Disable the PVM1 Extended Interrupt Rising & Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_FALLING_EDGE() \\r
- do { \\r
- __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); \\r
- __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); \\r
- } while(0)\r
-\r
-/**\r
- * @brief Generate a Software interrupt on selected EXTI line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM1)\r
-\r
-/**\r
- * @brief Check whether the specified PVM1 EXTI interrupt flag is set or not.\r
- * @retval EXTI PVM1 Line Status.\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM1)\r
-\r
-/**\r
- * @brief Clear the PVM1 EXTI flag.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM1)\r
-\r
-#endif /* PWR_CR2_PVME1 */\r
-\r
-\r
-#if defined(PWR_CR2_PVME2)\r
-/**\r
- * @brief Enable the PVM2 Extended Interrupt Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2)\r
-\r
-/**\r
- * @brief Disable the PVM2 Extended Interrupt Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2)\r
-\r
-/**\r
- * @brief Enable the PVM2 Event Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2)\r
-\r
-/**\r
- * @brief Disable the PVM2 Event Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2)\r
-\r
-/**\r
- * @brief Enable the PVM2 Extended Interrupt Rising Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2)\r
-\r
-/**\r
- * @brief Disable the PVM2 Extended Interrupt Rising Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2)\r
-\r
-/**\r
- * @brief Enable the PVM2 Extended Interrupt Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2)\r
-\r
-\r
-/**\r
- * @brief Disable the PVM2 Extended Interrupt Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2)\r
-\r
-\r
-/**\r
- * @brief PVM2 EXTI line configuration: set rising & falling edge trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_FALLING_EDGE() \\r
- do { \\r
- __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE(); \\r
- __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE(); \\r
- } while(0)\r
-\r
-/**\r
- * @brief Disable the PVM2 Extended Interrupt Rising & Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_FALLING_EDGE() \\r
- do { \\r
- __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE(); \\r
- __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE(); \\r
- } while(0)\r
-\r
-/**\r
- * @brief Generate a Software interrupt on selected EXTI line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM2)\r
-\r
-/**\r
- * @brief Check whether the specified PVM2 EXTI interrupt flag is set or not.\r
- * @retval EXTI PVM2 Line Status.\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM2)\r
-\r
-/**\r
- * @brief Clear the PVM2 EXTI flag.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM2)\r
-\r
-#endif /* PWR_CR2_PVME2 */\r
-\r
-\r
-/**\r
- * @brief Enable the PVM3 Extended Interrupt Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3)\r
-\r
-/**\r
- * @brief Disable the PVM3 Extended Interrupt Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3)\r
-\r
-/**\r
- * @brief Enable the PVM3 Event Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3)\r
-\r
-/**\r
- * @brief Disable the PVM3 Event Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3)\r
-\r
-/**\r
- * @brief Enable the PVM3 Extended Interrupt Rising Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3)\r
-\r
-/**\r
- * @brief Disable the PVM3 Extended Interrupt Rising Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3)\r
-\r
-/**\r
- * @brief Enable the PVM3 Extended Interrupt Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3)\r
-\r
-\r
-/**\r
- * @brief Disable the PVM3 Extended Interrupt Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3)\r
-\r
-\r
-/**\r
- * @brief PVM3 EXTI line configuration: set rising & falling edge trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_FALLING_EDGE() \\r
- do { \\r
- __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE(); \\r
- __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE(); \\r
- } while(0)\r
-\r
-/**\r
- * @brief Disable the PVM3 Extended Interrupt Rising & Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_FALLING_EDGE() \\r
- do { \\r
- __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); \\r
- __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); \\r
- } while(0)\r
-\r
-/**\r
- * @brief Generate a Software interrupt on selected EXTI line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM3)\r
-\r
-/**\r
- * @brief Check whether the specified PVM3 EXTI interrupt flag is set or not.\r
- * @retval EXTI PVM3 Line Status.\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM3)\r
-\r
-/**\r
- * @brief Clear the PVM3 EXTI flag.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM3_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM3)\r
-\r
-\r
-\r
-\r
-/**\r
- * @brief Enable the PVM4 Extended Interrupt Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4)\r
-\r
-/**\r
- * @brief Disable the PVM4 Extended Interrupt Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4)\r
-\r
-/**\r
- * @brief Enable the PVM4 Event Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4)\r
-\r
-/**\r
- * @brief Disable the PVM4 Event Line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4)\r
-\r
-/**\r
- * @brief Enable the PVM4 Extended Interrupt Rising Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4)\r
-\r
-/**\r
- * @brief Disable the PVM4 Extended Interrupt Rising Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4)\r
-\r
-/**\r
- * @brief Enable the PVM4 Extended Interrupt Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4)\r
-\r
-\r
-/**\r
- * @brief Disable the PVM4 Extended Interrupt Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4)\r
-\r
-\r
-/**\r
- * @brief PVM4 EXTI line configuration: set rising & falling edge trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_FALLING_EDGE() \\r
- do { \\r
- __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE(); \\r
- __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE(); \\r
- } while(0)\r
-\r
-/**\r
- * @brief Disable the PVM4 Extended Interrupt Rising & Falling Trigger.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_FALLING_EDGE() \\r
- do { \\r
- __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE(); \\r
- __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE(); \\r
- } while(0)\r
-\r
-/**\r
- * @brief Generate a Software interrupt on selected EXTI line.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM4)\r
-\r
-/**\r
- * @brief Check whether or not the specified PVM4 EXTI interrupt flag is set.\r
- * @retval EXTI PVM4 Line Status.\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM4)\r
-\r
-/**\r
- * @brief Clear the PVM4 EXTI flag.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_PVM4_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM4)\r
-\r
-\r
-/**\r
- * @brief Configure the main internal regulator output voltage.\r
- * @param __REGULATOR__: specifies the regulator output voltage to achieve\r
- * a tradeoff between performance and power consumption.\r
- * This parameter can be one of the following values:\r
- * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode,\r
- * typical output voltage at 1.2 V,\r
- * system frequency up to 80 MHz.\r
- * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode,\r
- * typical output voltage at 1.0 V,\r
- * system frequency up to 26 MHz.\r
- * @note This macro is similar to HAL_PWREx_ControlVoltageScaling() API but doesn't check\r
- * whether or not VOSF flag is cleared when moving from range 2 to range 1. User\r
- * may resort to __HAL_PWR_GET_FLAG() macro to check VOSF bit resetting.\r
- * @retval None\r
- */\r
-#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \\r
- __IO uint32_t tmpreg; \\r
- MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \\r
- /* Delay after an RCC peripheral clock enabling */ \\r
- tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \\r
- UNUSED(tmpreg); \\r
- } while(0)\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/* Private macros --------------------------------------------------------*/\r
-/** @addtogroup PWREx_Private_Macros PWR Extended Private Macros\r
- * @{\r
- */\r
-\r
-#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \\r
- ((PIN) == PWR_WAKEUP_PIN2) || \\r
- ((PIN) == PWR_WAKEUP_PIN3) || \\r
- ((PIN) == PWR_WAKEUP_PIN4) || \\r
- ((PIN) == PWR_WAKEUP_PIN5) || \\r
- ((PIN) == PWR_WAKEUP_PIN1_HIGH) || \\r
- ((PIN) == PWR_WAKEUP_PIN2_HIGH) || \\r
- ((PIN) == PWR_WAKEUP_PIN3_HIGH) || \\r
- ((PIN) == PWR_WAKEUP_PIN4_HIGH) || \\r
- ((PIN) == PWR_WAKEUP_PIN5_HIGH) || \\r
- ((PIN) == PWR_WAKEUP_PIN1_LOW) || \\r
- ((PIN) == PWR_WAKEUP_PIN2_LOW) || \\r
- ((PIN) == PWR_WAKEUP_PIN3_LOW) || \\r
- ((PIN) == PWR_WAKEUP_PIN4_LOW) || \\r
- ((PIN) == PWR_WAKEUP_PIN5_LOW))\r
-\r
-#if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \\r
- defined (STM32L496xx) || defined (STM32L4A6xx) || \\r
- defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)\r
-#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\\r
- ((TYPE) == PWR_PVM_2) ||\\r
- ((TYPE) == PWR_PVM_3) ||\\r
- ((TYPE) == PWR_PVM_4))\r
-#elif defined (STM32L471xx)\r
-#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_2) ||\\r
- ((TYPE) == PWR_PVM_3) ||\\r
- ((TYPE) == PWR_PVM_4))\r
-#endif\r
-\r
-#if defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L433xx) || defined (STM32L443xx) || defined (STM32L452xx) || defined (STM32L462xx)\r
-#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\\r
- ((TYPE) == PWR_PVM_3) ||\\r
- ((TYPE) == PWR_PVM_4))\r
-#elif defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L442xx) || defined (STM32L451xx)\r
-#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_3) ||\\r
- ((TYPE) == PWR_PVM_4))\r
-#endif\r
-\r
-#define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\\r
- ((MODE) == PWR_PVM_MODE_IT_RISING) ||\\r
- ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\\r
- ((MODE) == PWR_PVM_MODE_IT_RISING_FALLING) ||\\r
- ((MODE) == PWR_PVM_MODE_EVENT_RISING) ||\\r
- ((MODE) == PWR_PVM_MODE_EVENT_FALLING) ||\\r
- ((MODE) == PWR_PVM_MODE_EVENT_RISING_FALLING))\r
-\r
-#if defined(PWR_CR5_R1MODE)\r
-#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) || \\r
- ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \\r
- ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2))\r
-#else\r
-#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \\r
- ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2))\r
-#endif\r
-\r
-\r
-#define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\\r
- ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5))\r
-\r
-#define IS_PWR_BATTERY_CHARGING(CHARGING) (((CHARGING) == PWR_BATTERY_CHARGING_DISABLE) ||\\r
- ((CHARGING) == PWR_BATTERY_CHARGING_ENABLE))\r
-\r
-#define IS_PWR_GPIO_BIT_NUMBER(BIT_NUMBER) (((BIT_NUMBER) & GPIO_PIN_MASK) != (uint32_t)0x00)\r
-\r
-\r
-#if defined (STM32L412xx) || defined (STM32L422xx)\r
-#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\\r
- ((GPIO) == PWR_GPIO_B) ||\\r
- ((GPIO) == PWR_GPIO_C) ||\\r
- ((GPIO) == PWR_GPIO_D) ||\\r
- ((GPIO) == PWR_GPIO_H))\r
-#elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) || \\r
- defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)\r
-#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\\r
- ((GPIO) == PWR_GPIO_B) ||\\r
- ((GPIO) == PWR_GPIO_C) ||\\r
- ((GPIO) == PWR_GPIO_D) ||\\r
- ((GPIO) == PWR_GPIO_E) ||\\r
- ((GPIO) == PWR_GPIO_H))\r
-#elif defined (STM32L432xx) || defined (STM32L442xx)\r
-#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\\r
- ((GPIO) == PWR_GPIO_B) ||\\r
- ((GPIO) == PWR_GPIO_C) ||\\r
- ((GPIO) == PWR_GPIO_H))\r
-#elif defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)\r
-#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\\r
- ((GPIO) == PWR_GPIO_B) ||\\r
- ((GPIO) == PWR_GPIO_C) ||\\r
- ((GPIO) == PWR_GPIO_D) ||\\r
- ((GPIO) == PWR_GPIO_E) ||\\r
- ((GPIO) == PWR_GPIO_F) ||\\r
- ((GPIO) == PWR_GPIO_G) ||\\r
- ((GPIO) == PWR_GPIO_H))\r
-#elif defined (STM32L496xx) || defined (STM32L4A6xx) || \\r
- defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)\r
-#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\\r
- ((GPIO) == PWR_GPIO_B) ||\\r
- ((GPIO) == PWR_GPIO_C) ||\\r
- ((GPIO) == PWR_GPIO_D) ||\\r
- ((GPIO) == PWR_GPIO_E) ||\\r
- ((GPIO) == PWR_GPIO_F) ||\\r
- ((GPIO) == PWR_GPIO_G) ||\\r
- ((GPIO) == PWR_GPIO_H) ||\\r
- ((GPIO) == PWR_GPIO_I))\r
-#endif\r
-\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-\r
-/** @addtogroup PWREx_Exported_Functions PWR Extended Exported Functions\r
- * @{\r
- */\r
-\r
-/** @addtogroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions\r
- * @{\r
- */\r
-\r
-\r
-/* Peripheral Control functions **********************************************/\r
-uint32_t HAL_PWREx_GetVoltageRange(void);\r
-HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);\r
-void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection);\r
-void HAL_PWREx_DisableBatteryCharging(void);\r
-#if defined(PWR_CR2_USV)\r
-void HAL_PWREx_EnableVddUSB(void);\r
-void HAL_PWREx_DisableVddUSB(void);\r
-#endif /* PWR_CR2_USV */\r
-#if defined(PWR_CR2_IOSV)\r
-void HAL_PWREx_EnableVddIO2(void);\r
-void HAL_PWREx_DisableVddIO2(void);\r
-#endif /* PWR_CR2_IOSV */\r
-void HAL_PWREx_EnableInternalWakeUpLine(void);\r
-void HAL_PWREx_DisableInternalWakeUpLine(void);\r
-HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);\r
-HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);\r
-HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);\r
-HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);\r
-void HAL_PWREx_EnablePullUpPullDownConfig(void);\r
-void HAL_PWREx_DisablePullUpPullDownConfig(void);\r
-void HAL_PWREx_EnableSRAM2ContentRetention(void);\r
-void HAL_PWREx_DisableSRAM2ContentRetention(void);\r
-#if defined(PWR_CR1_RRSTP)\r
-void HAL_PWREx_EnableSRAM3ContentRetention(void);\r
-void HAL_PWREx_DisableSRAM3ContentRetention(void);\r
-#endif /* PWR_CR1_RRSTP */\r
-#if defined(PWR_CR3_DSIPDEN)\r
-void HAL_PWREx_EnableDSIPinsPDActivation(void);\r
-void HAL_PWREx_DisableDSIPinsPDActivation(void);\r
-#endif /* PWR_CR3_DSIPDEN */\r
-#if defined(PWR_CR2_PVME1)\r
-void HAL_PWREx_EnablePVM1(void);\r
-void HAL_PWREx_DisablePVM1(void);\r
-#endif /* PWR_CR2_PVME1 */\r
-#if defined(PWR_CR2_PVME2)\r
-void HAL_PWREx_EnablePVM2(void);\r
-void HAL_PWREx_DisablePVM2(void);\r
-#endif /* PWR_CR2_PVME2 */\r
-void HAL_PWREx_EnablePVM3(void);\r
-void HAL_PWREx_DisablePVM3(void);\r
-void HAL_PWREx_EnablePVM4(void);\r
-void HAL_PWREx_DisablePVM4(void);\r
-HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM);\r
-#if defined(PWR_CR3_ENULP)\r
-void HAL_PWREx_EnableBORPVD_ULP(void);\r
-void HAL_PWREx_DisableBORPVD_ULP(void);\r
-#endif /* PWR_CR3_ENULP */\r
-#if defined(PWR_CR4_EXT_SMPS_ON)\r
-void HAL_PWREx_EnableExtSMPS_0V95(void);\r
-void HAL_PWREx_DisableExtSMPS_0V95(void);\r
-#endif /* PWR_CR4_EXT_SMPS_ON */\r
-\r
-\r
-/* Low Power modes configuration functions ************************************/\r
-void HAL_PWREx_EnableLowPowerRunMode(void);\r
-HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void);\r
-void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry);\r
-void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry);\r
-void HAL_PWREx_EnterSTOP2Mode(uint8_t STOPEntry);\r
-void HAL_PWREx_EnterSHUTDOWNMode(void);\r
-\r
-void HAL_PWREx_PVD_PVM_IRQHandler(void);\r
-#if defined(PWR_CR2_PVME1)\r
-void HAL_PWREx_PVM1Callback(void);\r
-#endif /* PWR_CR2_PVME1 */\r
-#if defined(PWR_CR2_PVME2)\r
-void HAL_PWREx_PVM2Callback(void);\r
-#endif /* PWR_CR2_PVME2 */\r
-void HAL_PWREx_PVM3Callback(void);\r
-void HAL_PWREx_PVM4Callback(void);\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-\r
-#endif /* __STM32L4xx_HAL_PWR_EX_H */\r
-\r
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
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