--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32l4xx_hal_uart_ex.h\r
+ * @author MCD Application Team\r
+ * @brief Header file of UART HAL Extended module.\r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * <h2><center>© Copyright (c) 2017 STMicroelectronics.\r
+ * All rights reserved.</center></h2>\r
+ *\r
+ * This software component is licensed by ST under BSD 3-Clause license,\r
+ * the "License"; You may not use this file except in compliance with the\r
+ * License. You may obtain a copy of the License at:\r
+ * opensource.org/licenses/BSD-3-Clause\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef STM32L4xx_HAL_UART_EX_H\r
+#define STM32L4xx_HAL_UART_EX_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32l4xx_hal_def.h"\r
+\r
+/** @addtogroup STM32L4xx_HAL_Driver\r
+ * @{\r
+ */\r
+\r
+/** @addtogroup UARTEx\r
+ * @{\r
+ */\r
+\r
+/* Exported types ------------------------------------------------------------*/\r
+/** @defgroup UARTEx_Exported_Types UARTEx Exported Types\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief UART wake up from stop mode parameters\r
+ */\r
+typedef struct\r
+{\r
+ uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF).\r
+ This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.\r
+ If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must\r
+ be filled up. */\r
+\r
+ uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.\r
+ This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */\r
+\r
+ uint8_t Address; /*!< UART/USART node address (7-bit long max). */\r
+} UART_WakeUpTypeDef;\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported constants --------------------------------------------------------*/\r
+/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants\r
+ * @{\r
+ */\r
+\r
+/** @defgroup UARTEx_Word_Length UARTEx Word Length\r
+ * @{\r
+ */\r
+#define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */\r
+#define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */\r
+#define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length\r
+ * @{\r
+ */\r
+#define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */\r
+#define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */\r
+/**\r
+ * @}\r
+ */\r
+\r
+#if defined(USART_CR1_FIFOEN)\r
+/** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode\r
+ * @brief UART FIFO mode\r
+ * @{\r
+ */\r
+#define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */\r
+#define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level\r
+ * @brief UART TXFIFO threshold level\r
+ * @{\r
+ */\r
+#define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */\r
+#define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */\r
+#define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */\r
+#define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */\r
+#define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */\r
+#define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level\r
+ * @brief UART RXFIFO threshold level\r
+ * @{\r
+ */\r
+#define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */\r
+#define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */\r
+#define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */\r
+#define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */\r
+#define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */\r
+#define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */\r
+/**\r
+ * @}\r
+ */\r
+#endif /* USART_CR1_FIFOEN */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported macros -----------------------------------------------------------*/\r
+/* Exported functions --------------------------------------------------------*/\r
+/** @addtogroup UARTEx_Exported_Functions\r
+ * @{\r
+ */\r
+\r
+/** @addtogroup UARTEx_Exported_Functions_Group1\r
+ * @{\r
+ */\r
+\r
+/* Initialization and de-initialization functions ****************************/\r
+HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime,\r
+ uint32_t DeassertionTime);\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup UARTEx_Exported_Functions_Group2\r
+ * @{\r
+ */\r
+\r
+void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);\r
+\r
+#if defined(USART_CR1_FIFOEN)\r
+void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart);\r
+void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart);\r
+#endif /* USART_CR1_FIFOEN */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup UARTEx_Exported_Functions_Group3\r
+ * @{\r
+ */\r
+\r
+/* Peripheral Control functions **********************************************/\r
+HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);\r
+HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);\r
+HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);\r
+#if defined(USART_CR3_UCESM)\r
+HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart);\r
+HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart);\r
+#endif /* USART_CR3_UCESM */\r
+HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);\r
+#if defined(USART_CR1_FIFOEN)\r
+HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart);\r
+HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart);\r
+HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);\r
+HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);\r
+#endif /* USART_CR1_FIFOEN */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Private macros ------------------------------------------------------------*/\r
+/** @defgroup UARTEx_Private_Macros UARTEx Private Macros\r
+ * @{\r
+ */\r
+\r
+/** @brief Report the UART clock source.\r
+ * @param __HANDLE__ specifies the UART Handle.\r
+ * @param __CLOCKSOURCE__ output variable.\r
+ * @retval UART clocking source, written in __CLOCKSOURCE__.\r
+ */\r
+#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) \\r
+ || defined (STM32L496xx) || defined (STM32L4A6xx) \\r
+ || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)\r
+#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \\r
+ do { \\r
+ if((__HANDLE__)->Instance == USART1) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART1_SOURCE()) \\r
+ { \\r
+ case RCC_USART1CLKSOURCE_PCLK2: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == USART2) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART2_SOURCE()) \\r
+ { \\r
+ case RCC_USART2CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == USART3) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART3_SOURCE()) \\r
+ { \\r
+ case RCC_USART3CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_USART3CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART3CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART3CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == UART4) \\r
+ { \\r
+ switch(__HAL_RCC_GET_UART4_SOURCE()) \\r
+ { \\r
+ case RCC_UART4CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_UART4CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_UART4CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_UART4CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == UART5) \\r
+ { \\r
+ switch(__HAL_RCC_GET_UART5_SOURCE()) \\r
+ { \\r
+ case RCC_UART5CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_UART5CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_UART5CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_UART5CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == LPUART1) \\r
+ { \\r
+ switch(__HAL_RCC_GET_LPUART1_SOURCE()) \\r
+ { \\r
+ case RCC_LPUART1CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else \\r
+ { \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ } \\r
+ } while(0U)\r
+#elif defined (STM32L412xx) || defined (STM32L422xx) \\r
+ || defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx)\r
+#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \\r
+ do { \\r
+ if((__HANDLE__)->Instance == USART1) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART1_SOURCE()) \\r
+ { \\r
+ case RCC_USART1CLKSOURCE_PCLK2: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == USART2) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART2_SOURCE()) \\r
+ { \\r
+ case RCC_USART2CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == USART3) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART3_SOURCE()) \\r
+ { \\r
+ case RCC_USART3CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_USART3CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART3CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART3CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == LPUART1) \\r
+ { \\r
+ switch(__HAL_RCC_GET_LPUART1_SOURCE()) \\r
+ { \\r
+ case RCC_LPUART1CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else \\r
+ { \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ } \\r
+ } while(0U)\r
+#elif defined (STM32L432xx) || defined (STM32L442xx)\r
+#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \\r
+ do { \\r
+ if((__HANDLE__)->Instance == USART1) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART1_SOURCE()) \\r
+ { \\r
+ case RCC_USART1CLKSOURCE_PCLK2: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == USART2) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART2_SOURCE()) \\r
+ { \\r
+ case RCC_USART2CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == LPUART1) \\r
+ { \\r
+ switch(__HAL_RCC_GET_LPUART1_SOURCE()) \\r
+ { \\r
+ case RCC_LPUART1CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else \\r
+ { \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ } \\r
+ } while(0U)\r
+#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)\r
+#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \\r
+ do { \\r
+ if((__HANDLE__)->Instance == USART1) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART1_SOURCE()) \\r
+ { \\r
+ case RCC_USART1CLKSOURCE_PCLK2: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART1CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == USART2) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART2_SOURCE()) \\r
+ { \\r
+ case RCC_USART2CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART2CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == USART3) \\r
+ { \\r
+ switch(__HAL_RCC_GET_USART3_SOURCE()) \\r
+ { \\r
+ case RCC_USART3CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_USART3CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_USART3CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_USART3CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == UART4) \\r
+ { \\r
+ switch(__HAL_RCC_GET_UART4_SOURCE()) \\r
+ { \\r
+ case RCC_UART4CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_UART4CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_UART4CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_UART4CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else if((__HANDLE__)->Instance == LPUART1) \\r
+ { \\r
+ switch(__HAL_RCC_GET_LPUART1_SOURCE()) \\r
+ { \\r
+ case RCC_LPUART1CLKSOURCE_PCLK1: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_HSI: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_SYSCLK: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \\r
+ break; \\r
+ case RCC_LPUART1CLKSOURCE_LSE: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \\r
+ break; \\r
+ default: \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ break; \\r
+ } \\r
+ } \\r
+ else \\r
+ { \\r
+ (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \\r
+ } \\r
+ } while(0U)\r
+#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx ||\r
+ * STM32L496xx || STM32L4A6xx ||\r
+ * STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx\r
+ */\r
+\r
+/** @brief Report the UART mask to apply to retrieve the received data\r
+ * according to the word length and to the parity bits activation.\r
+ * @note If PCE = 1, the parity bit is not included in the data extracted\r
+ * by the reception API().\r
+ * This masking operation is not carried out in the case of\r
+ * DMA transfers.\r
+ * @param __HANDLE__ specifies the UART Handle.\r
+ * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.\r
+ */\r
+#define UART_MASK_COMPUTATION(__HANDLE__) \\r
+ do { \\r
+ if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \\r
+ { \\r
+ if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \\r
+ { \\r
+ (__HANDLE__)->Mask = 0x01FFU ; \\r
+ } \\r
+ else \\r
+ { \\r
+ (__HANDLE__)->Mask = 0x00FFU ; \\r
+ } \\r
+ } \\r
+ else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \\r
+ { \\r
+ if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \\r
+ { \\r
+ (__HANDLE__)->Mask = 0x00FFU ; \\r
+ } \\r
+ else \\r
+ { \\r
+ (__HANDLE__)->Mask = 0x007FU ; \\r
+ } \\r
+ } \\r
+ else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \\r
+ { \\r
+ if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \\r
+ { \\r
+ (__HANDLE__)->Mask = 0x007FU ; \\r
+ } \\r
+ else \\r
+ { \\r
+ (__HANDLE__)->Mask = 0x003FU ; \\r
+ } \\r
+ } \\r
+ else \\r
+ { \\r
+ (__HANDLE__)->Mask = 0x0000U; \\r
+ } \\r
+ } while(0U)\r
+\r
+/**\r
+ * @brief Ensure that UART frame length is valid.\r
+ * @param __LENGTH__ UART frame length.\r
+ * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)\r
+ */\r
+#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \\r
+ ((__LENGTH__) == UART_WORDLENGTH_8B) || \\r
+ ((__LENGTH__) == UART_WORDLENGTH_9B))\r
+\r
+/**\r
+ * @brief Ensure that UART wake-up address length is valid.\r
+ * @param __ADDRESS__ UART wake-up address length.\r
+ * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)\r
+ */\r
+#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \\r
+ ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))\r
+\r
+#if defined(USART_CR1_FIFOEN)\r
+/**\r
+ * @brief Ensure that UART TXFIFO threshold level is valid.\r
+ * @param __THRESHOLD__ UART TXFIFO threshold level.\r
+ * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)\r
+ */\r
+#define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \\r
+ ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \\r
+ ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \\r
+ ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \\r
+ ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \\r
+ ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8))\r
+\r
+/**\r
+ * @brief Ensure that UART RXFIFO threshold level is valid.\r
+ * @param __THRESHOLD__ UART RXFIFO threshold level.\r
+ * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)\r
+ */\r
+#define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \\r
+ ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \\r
+ ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \\r
+ ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \\r
+ ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \\r
+ ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8))\r
+#endif /* USART_CR1_FIFOEN */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Private functions ---------------------------------------------------------*/\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* STM32L4xx_HAL_UART_EX_H */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
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