--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32l4xx_ll_usb.h\r
+ * @author MCD Application Team\r
+ * @brief Header file of USB Low Layer HAL module.\r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * <h2><center>© Copyright (c) 2017 STMicroelectronics.\r
+ * All rights reserved.</center></h2>\r
+ *\r
+ * This software component is licensed by ST under BSD 3-Clause license,\r
+ * the "License"; You may not use this file except in compliance with the\r
+ * License. You may obtain a copy of the License at:\r
+ * opensource.org/licenses/BSD-3-Clause\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef STM32L4xx_LL_USB_H\r
+#define STM32L4xx_LL_USB_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32l4xx_hal_def.h"\r
+\r
+#if defined (USB) || defined (USB_OTG_FS)\r
+/** @addtogroup STM32L4xx_HAL_Driver\r
+ * @{\r
+ */\r
+\r
+/** @addtogroup USB_LL\r
+ * @{\r
+ */\r
+\r
+/* Exported types ------------------------------------------------------------*/\r
+\r
+/**\r
+ * @brief USB Mode definition\r
+ */\r
+#if defined (USB_OTG_FS)\r
+\r
+typedef enum\r
+{\r
+ USB_DEVICE_MODE = 0,\r
+ USB_HOST_MODE = 1,\r
+ USB_DRD_MODE = 2\r
+} USB_ModeTypeDef;\r
+\r
+/**\r
+ * @brief URB States definition\r
+ */\r
+typedef enum\r
+{\r
+ URB_IDLE = 0,\r
+ URB_DONE,\r
+ URB_NOTREADY,\r
+ URB_NYET,\r
+ URB_ERROR,\r
+ URB_STALL\r
+} USB_OTG_URBStateTypeDef;\r
+\r
+/**\r
+ * @brief Host channel States definition\r
+ */\r
+typedef enum\r
+{\r
+ HC_IDLE = 0,\r
+ HC_XFRC,\r
+ HC_HALTED,\r
+ HC_NAK,\r
+ HC_NYET,\r
+ HC_STALL,\r
+ HC_XACTERR,\r
+ HC_BBLERR,\r
+ HC_DATATGLERR\r
+} USB_OTG_HCStateTypeDef;\r
+\r
+/**\r
+ * @brief USB OTG Initialization Structure definition\r
+ */\r
+typedef struct\r
+{\r
+ uint32_t dev_endpoints; /*!< Device Endpoints number.\r
+ This parameter depends on the used USB core.\r
+ This parameter must be a number between Min_Data = 1 and Max_Data = 15 */\r
+\r
+ uint32_t Host_channels; /*!< Host Channels number.\r
+ This parameter Depends on the used USB core.\r
+ This parameter must be a number between Min_Data = 1 and Max_Data = 15 */\r
+\r
+ uint32_t speed; /*!< USB Core speed.\r
+ This parameter can be any value of @ref USB_Core_Speed_ */\r
+\r
+ uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA used only for OTG HS. */\r
+\r
+ uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */\r
+\r
+ uint32_t phy_itface; /*!< Select the used PHY interface.\r
+ This parameter can be any value of @ref USB_Core_PHY_ */\r
+\r
+ uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */\r
+\r
+ uint32_t low_power_enable; /*!< Enable or disable the low power mode. */\r
+\r
+ uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */\r
+\r
+ uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */\r
+\r
+ uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */\r
+\r
+ uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */\r
+\r
+ uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */\r
+} USB_OTG_CfgTypeDef;\r
+\r
+typedef struct\r
+{\r
+ uint8_t num; /*!< Endpoint number\r
+ This parameter must be a number between Min_Data = 1 and Max_Data = 15 */\r
+\r
+ uint8_t is_in; /*!< Endpoint direction\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint8_t is_stall; /*!< Endpoint stall condition\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint8_t type; /*!< Endpoint type\r
+ This parameter can be any value of @ref USB_EP_Type_ */\r
+\r
+ uint8_t data_pid_start; /*!< Initial data PID\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint8_t even_odd_frame; /*!< IFrame parity\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint16_t tx_fifo_num; /*!< Transmission FIFO number\r
+ This parameter must be a number between Min_Data = 1 and Max_Data = 15 */\r
+\r
+ uint32_t maxpacket; /*!< Endpoint Max packet size\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */\r
+\r
+ uint8_t *xfer_buff; /*!< Pointer to transfer buffer */\r
+\r
+ uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */\r
+\r
+ uint32_t xfer_len; /*!< Current transfer length */\r
+\r
+ uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */\r
+} USB_OTG_EPTypeDef;\r
+\r
+typedef struct\r
+{\r
+ uint8_t dev_addr ; /*!< USB device address.\r
+ This parameter must be a number between Min_Data = 1 and Max_Data = 255 */\r
+\r
+ uint8_t ch_num; /*!< Host channel number.\r
+ This parameter must be a number between Min_Data = 1 and Max_Data = 15 */\r
+\r
+ uint8_t ep_num; /*!< Endpoint number.\r
+ This parameter must be a number between Min_Data = 1 and Max_Data = 15 */\r
+\r
+ uint8_t ep_is_in; /*!< Endpoint direction\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint8_t speed; /*!< USB Host speed.\r
+ This parameter can be any value of @ref USB_Core_Speed_ */\r
+\r
+ uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */\r
+\r
+ uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */\r
+\r
+ uint8_t ep_type; /*!< Endpoint Type.\r
+ This parameter can be any value of @ref USB_EP_Type_ */\r
+\r
+ uint16_t max_packet; /*!< Endpoint Max packet size.\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */\r
+\r
+ uint8_t data_pid; /*!< Initial data PID.\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */\r
+\r
+ uint32_t xfer_len; /*!< Current transfer length. */\r
+\r
+ uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */\r
+\r
+ uint8_t toggle_in; /*!< IN transfer current toggle flag.\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint8_t toggle_out; /*!< OUT transfer current toggle flag\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */\r
+\r
+ uint32_t ErrCnt; /*!< Host channel error count.*/\r
+\r
+ USB_OTG_URBStateTypeDef urb_state; /*!< URB state.\r
+ This parameter can be any value of @ref USB_OTG_URBStateTypeDef */\r
+\r
+ USB_OTG_HCStateTypeDef state; /*!< Host Channel state.\r
+ This parameter can be any value of @ref USB_OTG_HCStateTypeDef */\r
+} USB_OTG_HCTypeDef;\r
+#endif /* defined (USB_OTG_FS) */\r
+\r
+#if defined (USB)\r
+\r
+typedef enum\r
+{\r
+ USB_DEVICE_MODE = 0\r
+} USB_ModeTypeDef;\r
+\r
+/**\r
+ * @brief USB Initialization Structure definition\r
+ */\r
+typedef struct\r
+{\r
+ uint32_t dev_endpoints; /*!< Device Endpoints number.\r
+ This parameter depends on the used USB core.\r
+ This parameter must be a number between Min_Data = 1 and Max_Data = 15 */\r
+\r
+ uint32_t speed; /*!< USB Core speed.\r
+ This parameter can be any value of @ref USB_Core_Speed */\r
+\r
+ uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */\r
+\r
+ uint32_t phy_itface; /*!< Select the used PHY interface.\r
+ This parameter can be any value of @ref USB_Core_PHY */\r
+\r
+ uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */\r
+\r
+ uint32_t low_power_enable; /*!< Enable or disable Low Power mode */\r
+\r
+ uint32_t lpm_enable; /*!< Enable or disable Battery charging. */\r
+\r
+ uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */\r
+} USB_CfgTypeDef;\r
+\r
+typedef struct\r
+{\r
+ uint8_t num; /*!< Endpoint number\r
+ This parameter must be a number between Min_Data = 1 and Max_Data = 15 */\r
+\r
+ uint8_t is_in; /*!< Endpoint direction\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint8_t is_stall; /*!< Endpoint stall condition\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint8_t type; /*!< Endpoint type\r
+ This parameter can be any value of @ref USB_EP_Type */\r
+\r
+ uint8_t data_pid_start; /*!< Initial data PID\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 1 */\r
+\r
+ uint16_t pmaadress; /*!< PMA Address\r
+ This parameter can be any value between Min_addr = 0 and Max_addr = 1K */\r
+\r
+ uint16_t pmaaddr0; /*!< PMA Address0\r
+ This parameter can be any value between Min_addr = 0 and Max_addr = 1K */\r
+\r
+ uint16_t pmaaddr1; /*!< PMA Address1\r
+ This parameter can be any value between Min_addr = 0 and Max_addr = 1K */\r
+\r
+ uint8_t doublebuffer; /*!< Double buffer enable\r
+ This parameter can be 0 or 1 */\r
+\r
+ uint16_t tx_fifo_num; /*!< This parameter is not required by USB Device FS peripheral, it is used\r
+ only by USB OTG FS peripheral\r
+ This parameter is added to ensure compatibility across USB peripherals */\r
+\r
+ uint32_t maxpacket; /*!< Endpoint Max packet size\r
+ This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */\r
+\r
+ uint8_t *xfer_buff; /*!< Pointer to transfer buffer */\r
+\r
+ uint32_t xfer_len; /*!< Current transfer length */\r
+\r
+ uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */\r
+\r
+} USB_EPTypeDef;\r
+#endif /* defined (USB) */\r
+\r
+/* Exported constants --------------------------------------------------------*/\r
+\r
+/** @defgroup PCD_Exported_Constants PCD Exported Constants\r
+ * @{\r
+ */\r
+\r
+#if defined (USB_OTG_FS)\r
+/** @defgroup USB_OTG_CORE VERSION ID\r
+ * @{\r
+ */\r
+#define USB_OTG_CORE_ID_300A 0x4F54300AU\r
+#define USB_OTG_CORE_ID_310A 0x4F54310AU\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_Core_Mode_ USB Core Mode\r
+ * @{\r
+ */\r
+#define USB_OTG_MODE_DEVICE 0U\r
+#define USB_OTG_MODE_HOST 1U\r
+#define USB_OTG_MODE_DRD 2U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL Device Speed\r
+ * @{\r
+ */\r
+#define USBD_FS_SPEED 2U\r
+#define USBH_FS_SPEED 1U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_Core_Speed USB Low Layer Core Speed\r
+ * @{\r
+ */\r
+#define USB_OTG_SPEED_FULL 3U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_Core_PHY USB Low Layer Core PHY\r
+ * @{\r
+ */\r
+#define USB_OTG_ULPI_PHY 1U\r
+#define USB_OTG_EMBEDDED_PHY 2U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_Turnaround_Timeout Turnaround Timeout Value\r
+ * @{\r
+ */\r
+#ifndef USBD_FS_TRDT_VALUE\r
+#define USBD_FS_TRDT_VALUE 5U\r
+#define USBD_DEFAULT_TRDT_VALUE 9U\r
+#endif /* USBD_HS_TRDT_VALUE */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_Core_MPS USB Low Layer Core MPS\r
+ * @{\r
+ */\r
+#define USB_OTG_FS_MAX_PACKET_SIZE 64U\r
+#define USB_OTG_MAX_EP0_SIZE 64U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_Core_PHY_Frequency USB Low Layer Core PHY Frequency\r
+ * @{\r
+ */\r
+#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1)\r
+#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1)\r
+#define DSTS_ENUMSPD_LS_PHY_6MHZ (2U << 1)\r
+#define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_CORE_Frame_Interval USB Low Layer Core Frame Interval\r
+ * @{\r
+ */\r
+#define DCFG_FRAME_INTERVAL_80 0U\r
+#define DCFG_FRAME_INTERVAL_85 1U\r
+#define DCFG_FRAME_INTERVAL_90 2U\r
+#define DCFG_FRAME_INTERVAL_95 3U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS\r
+ * @{\r
+ */\r
+#define DEP0CTL_MPS_64 0U\r
+#define DEP0CTL_MPS_32 1U\r
+#define DEP0CTL_MPS_16 2U\r
+#define DEP0CTL_MPS_8 3U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_EP_Speed USB Low Layer EP Speed\r
+ * @{\r
+ */\r
+#define EP_SPEED_LOW 0U\r
+#define EP_SPEED_FULL 1U\r
+#define EP_SPEED_HIGH 2U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_EP_Type USB Low Layer EP Type\r
+ * @{\r
+ */\r
+#define EP_TYPE_CTRL 0U\r
+#define EP_TYPE_ISOC 1U\r
+#define EP_TYPE_BULK 2U\r
+#define EP_TYPE_INTR 3U\r
+#define EP_TYPE_MSK 3U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_STS_Defines USB Low Layer STS Defines\r
+ * @{\r
+ */\r
+#define STS_GOUT_NAK 1U\r
+#define STS_DATA_UPDT 2U\r
+#define STS_XFER_COMP 3U\r
+#define STS_SETUP_COMP 4U\r
+#define STS_SETUP_UPDT 6U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_HCFG_SPEED_Defines USB Low Layer HCFG Speed Defines\r
+ * @{\r
+ */\r
+#define HCFG_30_60_MHZ 0U\r
+#define HCFG_48_MHZ 1U\r
+#define HCFG_6_MHZ 2U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_HPRT0_PRTSPD_SPEED_Defines USB Low Layer HPRT0 PRTSPD Speed Defines\r
+ * @{\r
+ */\r
+#define HPRT0_PRTSPD_HIGH_SPEED 0U\r
+#define HPRT0_PRTSPD_FULL_SPEED 1U\r
+#define HPRT0_PRTSPD_LOW_SPEED 2U\r
+/**\r
+ * @}\r
+ */\r
+\r
+#define HCCHAR_CTRL 0U\r
+#define HCCHAR_ISOC 1U\r
+#define HCCHAR_BULK 2U\r
+#define HCCHAR_INTR 3U\r
+\r
+#define HC_PID_DATA0 0U\r
+#define HC_PID_DATA2 1U\r
+#define HC_PID_DATA1 2U\r
+#define HC_PID_SETUP 3U\r
+\r
+#define GRXSTS_PKTSTS_IN 2U\r
+#define GRXSTS_PKTSTS_IN_XFER_COMP 3U\r
+#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5U\r
+#define GRXSTS_PKTSTS_CH_HALTED 7U\r
+\r
+#define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_PCGCCTL_BASE)\r
+#define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_HOST_PORT_BASE)\r
+\r
+#define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)(USBx_BASE + USB_OTG_DEVICE_BASE))\r
+#define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)(USBx_BASE + USB_OTG_IN_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE)))\r
+#define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)(USBx_BASE + USB_OTG_OUT_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE)))\r
+#define USBx_DFIFO(i) *(__IO uint32_t *)(USBx_BASE + USB_OTG_FIFO_BASE + ((i) * USB_OTG_FIFO_SIZE))\r
+\r
+#define USBx_HOST ((USB_OTG_HostTypeDef *)(USBx_BASE + USB_OTG_HOST_BASE))\r
+#define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)(USBx_BASE + USB_OTG_HOST_CHANNEL_BASE + ((i) * USB_OTG_HOST_CHANNEL_SIZE)))\r
+#endif /* defined (USB_OTG_FS) */\r
+\r
+#if defined (USB)\r
+/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS\r
+ * @{\r
+ */\r
+#define DEP0CTL_MPS_64 0U\r
+#define DEP0CTL_MPS_32 1U\r
+#define DEP0CTL_MPS_16 2U\r
+#define DEP0CTL_MPS_8 3U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL_EP_Type USB Low Layer EP Type\r
+ * @{\r
+ */\r
+#define EP_TYPE_CTRL 0U\r
+#define EP_TYPE_ISOC 1U\r
+#define EP_TYPE_BULK 2U\r
+#define EP_TYPE_INTR 3U\r
+#define EP_TYPE_MSK 3U\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup USB_LL Device Speed\r
+ * @{\r
+ */\r
+#define USBD_FS_SPEED 2U\r
+/**\r
+ * @}\r
+ */\r
+\r
+#define BTABLE_ADDRESS 0x000U\r
+#define PMA_ACCESS 1U\r
+#endif /* defined (USB) */\r
+#if defined (USB_OTG_FS)\r
+#define EP_ADDR_MSK 0xFU\r
+#endif /* defined (USB_OTG_FS) */\r
+#if defined (USB)\r
+#define EP_ADDR_MSK 0x7U\r
+#endif /* defined (USB) */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported macro ------------------------------------------------------------*/\r
+/** @defgroup USB_LL_Exported_Macros USB Low Layer Exported Macros\r
+ * @{\r
+ */\r
+#if defined (USB_OTG_FS)\r
+#define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))\r
+#define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))\r
+\r
+#define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))\r
+#define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))\r
+#endif /* defined (USB_OTG_FS) */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/* Exported functions --------------------------------------------------------*/\r
+/** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions\r
+ * @{\r
+ */\r
+#if defined (USB_OTG_FS)\r
+HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);\r
+HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);\r
+HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_SetTurnaroundTime(USB_OTG_GlobalTypeDef *USBx, uint32_t hclk, uint8_t speed);\r
+HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_ModeTypeDef mode);\r
+HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx, uint8_t speed);\r
+HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num);\r
+HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);\r
+void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);\r
+HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address);\r
+HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_ActivateSetup(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t *psetup);\r
+uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);\r
+uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);\r
+uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef *USBx);\r
+uint32_t USB_ReadDevAllOutEpInterrupt(USB_OTG_GlobalTypeDef *USBx);\r
+uint32_t USB_ReadDevOutEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum);\r
+uint32_t USB_ReadDevAllInEpInterrupt(USB_OTG_GlobalTypeDef *USBx);\r
+uint32_t USB_ReadDevInEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum);\r
+void USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);\r
+\r
+HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);\r
+HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq);\r
+HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state);\r
+uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx);\r
+uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,\r
+ uint8_t ch_num,\r
+ uint8_t epnum,\r
+ uint8_t dev_address,\r
+ uint8_t speed,\r
+ uint8_t ep_type,\r
+ uint16_t mps);\r
+HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc);\r
+uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num);\r
+HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num);\r
+HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx);\r
+HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx);\r
+#endif /* defined (USB_OTG_FS) */\r
+\r
+#if defined (USB)\r
+HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);\r
+HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);\r
+HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);\r
+HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);\r
+HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode);\r
+HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx, uint8_t speed);\r
+HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx);\r
+HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num);\r
+HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);\r
+void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len);\r
+HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);\r
+HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address);\r
+HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx);\r
+HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx);\r
+HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx);\r
+HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup);\r
+uint32_t USB_ReadInterrupts(USB_TypeDef *USBx);\r
+uint32_t USB_ReadDevAllOutEpInterrupt(USB_TypeDef *USBx);\r
+uint32_t USB_ReadDevOutEPInterrupt(USB_TypeDef *USBx, uint8_t epnum);\r
+uint32_t USB_ReadDevAllInEpInterrupt(USB_TypeDef *USBx);\r
+uint32_t USB_ReadDevInEPInterrupt(USB_TypeDef *USBx, uint8_t epnum);\r
+void USB_ClearInterrupts(USB_TypeDef *USBx, uint32_t interrupt);\r
+\r
+HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx);\r
+HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx);\r
+void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);\r
+void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);\r
+#endif /* defined (USB) */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+#endif /* defined (USB) || defined (USB_OTG_FS) */\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+\r
+#endif /* STM32L4xx_LL_USB_H */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r