--- /dev/null
+/*******************************************************************************\r
+* DISCLAIMER\r
+* This software is supplied by Renesas Electronics Corporation and is only\r
+* intended for use with Renesas products. No other uses are authorized. This\r
+* software is owned by Renesas Electronics Corporation and is protected under\r
+* all applicable laws, including copyright laws.\r
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING\r
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT\r
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE\r
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.\r
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS\r
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE\r
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR\r
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE\r
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.\r
+* Renesas reserves the right, without notice, to make changes to this software\r
+* and to discontinue the availability of this software. By using this software,\r
+* you agree to the additional terms and conditions found by accessing the\r
+* following link:\r
+* http://www.renesas.com/disclaimer\r
+*\r
+* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved.\r
+*******************************************************************************/\r
+/*******************************************************************************\r
+* System Name : RZ/T1 Init program\r
+* File Name : loader_init2.c\r
+* Version : 0.1\r
+* Device : R7S9100xx\r
+* Abstract : Loader program 2\r
+* Tool-Chain : IAR Embedded Workbench Ver.7.20\r
+* OS : not use\r
+* H/W Platform : Renesas Starter Kit for RZ/T1(Preliminary)\r
+* Description : Initialize the peripheral settings of RZ/T1\r
+* Limitation : none\r
+*******************************************************************************/\r
+/*******************************************************************************\r
+* History : DD.MM.YYYY Version Description\r
+* : First Release\r
+*******************************************************************************/\r
+#ifdef __ICCARM__\r
+\r
+#pragma section="VECTOR_RBLOCK"\r
+#pragma section="VECTOR_WBLOCK"\r
+#pragma section="USER_PRG_RBLOCK"\r
+#pragma section="USER_PRG_WBLOCK"\r
+#pragma section="USER_DATA_RBLOCK"\r
+#pragma section="USER_DATA_WBLOCK"\r
+\r
+#endif // __ICCARM__\r
+\r
+/*******************************************************************************\r
+Includes <System Includes> , "Project Includes"\r
+*******************************************************************************/\r
+#include <stdint.h>\r
+#include <Renesas/ior7s910017.h>\r
+#include "r_system.h"\r
+#include "r_reset.h"\r
+#include "r_cpg.h"\r
+#include "r_atcm_init.h"\r
+#include "r_port.h"\r
+#include "r_mpc.h"\r
+#include "r_ecm.h"\r
+\r
+\r
+/*******************************************************************************\r
+Macro definitions\r
+*******************************************************************************/\r
+\r
+/*******************************************************************************\r
+Typedef definitions\r
+*******************************************************************************/\r
+\r
+/*******************************************************************************\r
+Imported global variables and functions (from other files)\r
+*******************************************************************************/\r
+extern int _main(void);\r
+extern void bus_init(void);\r
+extern void set_low_vec(void);\r
+extern void cache_init(void);\r
+extern void __iar_data_init3(void);\r
+\r
+/*******************************************************************************\r
+Exported global variables and functions (to be accessed by other files)\r
+*******************************************************************************/\r
+\r
+/*******************************************************************************\r
+Private variables and functions\r
+*******************************************************************************/\r
+void loader_init2(void);\r
+void reset_check(void);\r
+void cpg_init(void);\r
+\r
+/*******************************************************************************\r
+* Function Name : loader_init2\r
+* Description : Initialize sysytem by loader program 2\r
+* Arguments : none\r
+* Return Value : none\r
+*******************************************************************************/\r
+void loader_init2(void)\r
+{ \r
+ /* Check the reset source */\r
+ reset_check();\r
+ \r
+ /* Set CPU clock and LOCO clock */\r
+ cpg_init();\r
+ \r
+ /* Set ATCM access wait to 1-wait with optimization */\r
+ /* Caution: ATCM_WAIT_0 is permitted if CPUCLK = 150MHz or 300MHz.\r
+ ATCM_WAIT_1_OPT is permitted if CPUCLK = 450MHz or 600MHz.*/\r
+ R_ATCM_WaitSet(ATCM_WAIT_1_OPT);\r
+ \r
+ /* Copy the variable data */\r
+ __iar_data_init3();\r
+\r
+ /* Initialize I1, D1 Cache and MPU setting */\r
+ cache_init();\r
+ \r
+ /* Set RZ/T1 to Low-vector (SCTLR.V = 0) */\r
+ set_low_vec(); \r
+ \r
+ /* Jump to _main() */\r
+ _main();\r
+\r
+}\r
+\r
+/*******************************************************************************\r
+ End of function loader_init2\r
+*******************************************************************************/\r
+\r
+/*******************************************************************************\r
+* Function Name : reset_check\r
+* Description : Check the reset source and execute the each sequence.\r
+* When error source number 35 is generated, set P77 pin to High.\r
+* Arguments : none\r
+* Return Value : none\r
+*******************************************************************************/\r
+void reset_check(void)\r
+{\r
+ volatile uint8_t result;\r
+ volatile uint32_t dummy;\r
+ \r
+ /* Check the reset status flag and execute the each sequence */\r
+ if (RST_SOURCE_ECM == SYSTEM.RSTSR0.LONG) // ECM reset is generated\r
+ {\r
+ /* Clear reset status flag */ \r
+ r_rst_write_enable(); // Enable writing to the RSTSR0 register\r
+ SYSTEM.RSTSR0.LONG = 0x00000000; // Clear reset factor flag\r
+ r_rst_write_disable(); // Disable writing to the RSTSR0 register\r
+ \r
+ /* Please coding the User program */ \r
+ \r
+ }\r
+ else if (RST_SOURCE_SWR1 == SYSTEM.RSTSR0.LONG) // Software reset 1 is generated\r
+ {\r
+ /* Clear reset status flag */ \r
+ r_rst_write_enable(); // Enable writing to the RSTSR0 register\r
+ SYSTEM.RSTSR0.LONG = 0x00000000; // Clear reset factor flag\r
+ r_rst_write_disable(); // Disable writing to the RSTSR0 register\r
+ \r
+ /* Please coding the User program */ \r
+ \r
+ }\r
+ else if (RST_SOURCE_RES == SYSTEM.RSTSR0.LONG) // RES# pin reset is generated\r
+ {\r
+ /* Clear reset status flag */ \r
+ r_rst_write_enable(); // Enable writing to the RSTSR0 register\r
+ SYSTEM.RSTSR0.LONG = 0x00000000; // Clear reset factor flag\r
+ r_rst_write_disable(); // Disable writing to the RSTSR0 register\r
+ \r
+ /* Please coding the User program */ \r
+ \r
+ }\r
+ else // Any reset is not generated\r
+ { \r
+ /* Please coding the User program */ \r
+ }\r
+\r
+}\r
+\r
+/*******************************************************************************\r
+ End of function reset_check\r
+*******************************************************************************/\r
+\r
+/*******************************************************************************\r
+* Function Name : cpg_init\r
+* Description : Set CPU clock and LOCO clock by CPG function\r
+* Arguments : none\r
+* Return Value : none\r
+*******************************************************************************/\r
+void cpg_init(void)\r
+{\r
+ volatile uint32_t dummy; \r
+ \r
+ /* Enables writing to the registers related to CPG function */\r
+ R_CPG_WriteEnable();\r
+ \r
+ /* Enables LOCO clock operation */\r
+ SYSTEM.LOCOCR.BIT.LCSTP = CPG_LOCO_ENABLE;\r
+ \r
+ /* Set CPUCLK to 450MHz, and dummy read at three times */\r
+ SYSTEM.PLL1CR.LONG = CPG_CPUCLK_450_MHz;\r
+ dummy = SYSTEM.PLL1CR.LONG;\r
+ dummy = SYSTEM.PLL1CR.LONG;\r
+ dummy = SYSTEM.PLL1CR.LONG;\r
+ \r
+ /* Enables PLL1 operation */\r
+ SYSTEM.PLL1CR2.LONG = CPG_PLL1_ON; \r
+ \r
+ /* Disables writing to the registers related to CPG function */\r
+ R_CPG_WriteDisable(); \r
+ \r
+ /* Wait about 100us for PLL1 (and LOCO) stabilization */\r
+ R_CPG_PLL_Wait();\r
+\r
+ /* Enables writing to the registers related to CPG function */\r
+ R_CPG_WriteEnable(); \r
+ \r
+ /* Selects the PLL1 as clock source */\r
+ SYSTEM.SCKCR2.LONG = CPG_SELECT_PLL1;\r
+ \r
+ /* Disables writing to the registers related to CPG function */\r
+ R_CPG_WriteDisable();\r
+ \r
+}\r
+\r
+/*******************************************************************************\r
+ End of function cpg_init\r
+*******************************************************************************/\r
+\r
+\r
+/* End of File */\r
+\r
+\r
projects / freertos / blobdiff