--- /dev/null
+/*\r
+ FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+\r
+ >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
+ details. You should have received a copy of the GNU General Public License\r
+ and the FreeRTOS license exception along with FreeRTOS; if not itcan be\r
+ viewed here: http://www.freertos.org/a00114.html and also obtained by\r
+ writing to Real Time Engineers Ltd., contact details for whom are available\r
+ on the FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
+ license and Real Time Engineers Ltd. contact details.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
+ fully thread aware and reentrant UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems, who sell the code with commercial support,\r
+ indemnification and middleware, under the OpenRTOS brand.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+*/\r
+\r
+ .global vRegTest1Implementation\r
+ .global vRegTest2Implementation\r
+ .extern ulRegTest1LoopCounter\r
+ .extern ulRegTest2LoopCounter\r
+\r
+ .text\r
+ .arm\r
+\r
+ /* This function is explained in the comments at the top of main-full.c. */\r
+.type vRegTest1Implementation, %function\r
+vRegTest1Implementation:\r
+\r
+ /* Fill each general purpose register with a known value. */\r
+ mov r0, #0xFF\r
+ mov r1, #0x11\r
+ mov r2, #0x22\r
+ mov r3, #0x33\r
+ mov r4, #0x44\r
+ mov r5, #0x55\r
+ mov r6, #0x66\r
+ mov r7, #0x77\r
+ mov r8, #0x88\r
+ mov r9, #0x99\r
+ mov r10, #0xAA\r
+ mov r11, #0xBB\r
+ mov r12, #0xCC\r
+ mov r14, #0xEE\r
+\r
+ /* Fill each FPU register with a known value. */\r
+ vmov d0, r0, r1\r
+ vmov d1, r2, r3\r
+ vmov d2, r4, r5\r
+ vmov d3, r6, r7\r
+ vmov d4, r8, r9\r
+ vmov d5, r10, r11\r
+ vmov d6, r0, r1\r
+ vmov d7, r2, r3\r
+ vmov d8, r4, r5\r
+ vmov d9, r6, r7\r
+ vmov d10, r8, r9\r
+ vmov d11, r10, r11\r
+ vmov d12, r0, r1\r
+ vmov d13, r2, r3\r
+ vmov d14, r4, r5\r
+ vmov d15, r6, r7\r
+\r
+ /* Loop, checking each iteration that each register still contains the\r
+ expected value. */\r
+reg1_loop:\r
+ /* Yield to increase test coverage */\r
+ svc 0\r
+\r
+ /* Check all the VFP registers still contain the values set above.\r
+ First save registers that are clobbered by the test. */\r
+ push { r0-r1 }\r
+\r
+ vmov r0, r1, d0\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d1\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d2\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d3\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d4\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d5\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d6\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d7\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d8\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d9\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d10\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d11\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d12\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d13\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d14\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d15\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+\r
+ /* Restore the registers that were clobbered by the test. */\r
+ pop {r0-r1}\r
+\r
+ /* VFP register test passed. Jump to the core register test. */\r
+ b reg1_loopf_pass\r
+\r
+reg1_error_loopf:\r
+ /* If this line is hit then a VFP register value was found to be\r
+ incorrect. */\r
+ b reg1_error_loopf\r
+\r
+reg1_loopf_pass:\r
+\r
+ /* Test each general purpose register to check that it still contains the\r
+ expected known value, jumping to reg1_error_loop if any register contains\r
+ an unexpected value. */\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loop\r
+ cmp r1, #0x11\r
+ bne reg1_error_loop\r
+ cmp r2, #0x22\r
+ bne reg1_error_loop\r
+ cmp r3, #0x33\r
+ bne reg1_error_loop\r
+ cmp r4, #0x44\r
+ bne reg1_error_loop\r
+ cmp r5, #0x55\r
+ bne reg1_error_loop\r
+ cmp r6, #0x66\r
+ bne reg1_error_loop\r
+ cmp r7, #0x77\r
+ bne reg1_error_loop\r
+ cmp r8, #0x88\r
+ bne reg1_error_loop\r
+ cmp r9, #0x99\r
+ bne reg1_error_loop\r
+ cmp r10, #0xAA\r
+ bne reg1_error_loop\r
+ cmp r11, #0xBB\r
+ bne reg1_error_loop\r
+ cmp r12, #0xCC\r
+ bne reg1_error_loop\r
+ cmp r14, #0xEE\r
+ bne reg1_error_loop\r
+\r
+ /* Everything passed, increment the loop counter. */\r
+ push { r0-r1 }\r
+ ldr r0, =ulRegTest1LoopCounter\r
+ ldr r1, [r0]\r
+ adds r1, r1, #1\r
+ str r1, [r0]\r
+ pop { r0-r1 }\r
+\r
+ /* Start again. */\r
+ b reg1_loop\r
+\r
+reg1_error_loop:\r
+ /* If this line is hit then there was an error in a core register value.\r
+ The loop ensures the loop counter stops incrementing. */\r
+ b reg1_error_loop\r
+ nop\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+.type vRegTest2Implementation, %function\r
+vRegTest2Implementation:\r
+\r
+ /* Put a known value in each register. */\r
+ mov r0, #0xFF000000\r
+ mov r1, #0x11000000\r
+ mov r2, #0x22000000\r
+ mov r3, #0x33000000\r
+ mov r4, #0x44000000\r
+ mov r5, #0x55000000\r
+ mov r6, #0x66000000\r
+ mov r7, #0x77000000\r
+ mov r8, #0x88000000\r
+ mov r9, #0x99000000\r
+ mov r10, #0xAA000000\r
+ mov r11, #0xBB000000\r
+ mov r12, #0xCC000000\r
+ mov r14, #0xEE000000\r
+\r
+ /* Likewise the floating point registers */\r
+ vmov d0, r0, r1\r
+ vmov d1, r2, r3\r
+ vmov d2, r4, r5\r
+ vmov d3, r6, r7\r
+ vmov d4, r8, r9\r
+ vmov d5, r10, r11\r
+ vmov d6, r0, r1\r
+ vmov d7, r2, r3\r
+ vmov d8, r4, r5\r
+ vmov d9, r6, r7\r
+ vmov d10, r8, r9\r
+ vmov d11, r10, r11\r
+ vmov d12, r0, r1\r
+ vmov d13, r2, r3\r
+ vmov d14, r4, r5\r
+ vmov d15, r6, r7\r
+\r
+ /* Loop, checking each iteration that each register still contains the\r
+ expected value. */\r
+reg2_loop:\r
+ /* Check all the VFP registers still contain the values set above.\r
+ First save registers that are clobbered by the test. */\r
+ push { r0-r1 }\r
+\r
+ vmov r0, r1, d0\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d1\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d2\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d3\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d4\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d5\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d6\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d7\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d8\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d9\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d10\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d11\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d12\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d13\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d14\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d15\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+\r
+ /* Restore the registers that were clobbered by the test. */\r
+ pop {r0-r1}\r
+\r
+ /* VFP register test passed. Jump to the core register test. */\r
+ b reg2_loopf_pass\r
+\r
+reg2_error_loopf:\r
+ /* If this line is hit then a VFP register value was found to be\r
+ incorrect. */\r
+ b reg2_error_loopf\r
+\r
+reg2_loopf_pass:\r
+\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loop\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loop\r
+ cmp r2, #0x22000000\r
+ bne reg2_error_loop\r
+ cmp r3, #0x33000000\r
+ bne reg2_error_loop\r
+ cmp r4, #0x44000000\r
+ bne reg2_error_loop\r
+ cmp r5, #0x55000000\r
+ bne reg2_error_loop\r
+ cmp r6, #0x66000000\r
+ bne reg2_error_loop\r
+ cmp r7, #0x77000000\r
+ bne reg2_error_loop\r
+ cmp r8, #0x88000000\r
+ bne reg2_error_loop\r
+ cmp r9, #0x99000000\r
+ bne reg2_error_loop\r
+ cmp r10, #0xAA000000\r
+ bne reg2_error_loop\r
+ cmp r11, #0xBB000000\r
+ bne reg2_error_loop\r
+ cmp r12, #0xCC000000\r
+ bne reg2_error_loop\r
+ cmp r14, #0xEE000000\r
+ bne reg2_error_loop\r
+\r
+ /* Everything passed, increment the loop counter. */\r
+ push { r0-r1 }\r
+ ldr r0, =ulRegTest2LoopCounter\r
+ ldr r1, [r0]\r
+ adds r1, r1, #1\r
+ str r1, [r0]\r
+ pop { r0-r1 }\r
+\r
+ /* Start again. */\r
+ b reg2_loop\r
+\r
+reg2_error_loop:\r
+ /* If this line is hit then there was an error in a core register value.\r
+ The loop ensures the loop counter stops incrementing. */\r
+ b reg2_error_loop\r
+ nop\r
+\r
+\r
+ .end\r
+\r
projects / freertos / blobdiff